AN4337 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 14
Technical content
Datasheet sections
- 1 Avalanche failure mode
- 2 Avalanche phenomenon in the flyback converter
- 3 I AR and E AS electrical thermal approach
- 3.1 E AS power/thermal evaluations
- 3.2 I AR electrical evaluations
- 4 Conclusions
- 5 Revision history
The avalanche issue: comparing the impacts of the I AR and E AS parameters By Vittorio Giuffrida Introduction Generally, power MOSFETs are considered rugged with respect to the avalanche phenomenon, however, the quantification of the level of ruggedness depends on the I AR avalanche current and EAS avalanche energy. These two parameters determine the capacity of a MOSFET to be safe during the avalanche. This paper explores the theory of the avalanche effect in a flyback converter, in order to understand how the I AR and E AS parameters affect MOSFET operation and, consequently, how to manage a voltage overshoot higher than the V (BR)DSS absolute maximum rating.
1 Avalanche failure mode
without any bipolar latch up. Figure 1. MOSFET inside structure
2 Avalanche phenomenon in the flyback converter
Figure 2. Flyback circuit schematic where V flyback is the reflected output voltage. avalanche energy needs to be monitored.
Figure 3. Details of avalanche phenomenon
3 I AR and E AS electrical thermal approach
avalanche phenomenon in order to understand if a MOSFET device can function safely.
3.1 E AS power/thermal evaluations
Elk , due to the leakage inductance, dissipated in the power device. Table 1. Electrical rating, absolute maximum rating
- Maximum avalanche current Ip=4 A.
- Starting temperature 25 °C.
- Primary inductance value Lprimary=550 µH.
- Leakage inductance ~ 13 µH.
- Transformer ratio N=2.
- Output voltage Vout=48 V In these conditions, the energy due to the leakage inductance is 123 µJ. This is the maximum avalanche energy that the MOSFET device must sustain during breakdown. If we presume the case temperature to be fixed at 25 °C, we can estimate the temperature increase due to the avalanche single pulse power dissipation via the following equation: Equation 4 Where ∆t ~ 100 ns is the avalanche pulse duration ( Equation 2 ). With: Equation 5 K thermal transient depends on the duration of the pulse. It can be estimated through the thermal impedance curve using the following equation: Equation 6
Table 2. Thermal data
Figure 4. Z thj-c thermal impedance
Figure 5. Z for a MOSFET in terms of E AS single pulse avalanche energy. AS =100 mJ and Ip=5.4 A (data specifications).
be addressed rather than the E AS one.
3.2 I AR electrical evaluations
versa, the MOSFET is certainly safe if the maximum avalanche current is lower than I AR . in a real flyback converter can have the value of 5.8 mH. monitored more than avalanche energy. Below is a waveform with typical saturation phenomenon during the avalanche. Figure 6. Saturation phenomenon during the avalanche increase can satisfy this requirement.
Figure 7. Typical clamp circuit of flyback topology satisfying the initial objective.
4 Conclusions
Understanding how to approach a voltage overshoot which exceeds the V (BR)DSS absolute maximum rating is the key to designing reliable and, consequently, safe MOSFETs. The example in this paper provides step-by-step guidelines on how to obtain the safety margin in terms of I AR and E AS specifications when a MOSFET functions in a flyback converter. In particular, this example suggests that a MOSFET device is safe if the avalanche energy is lower than the E AS datasheet specification and the avalanche current is lower than the I AR absolute maximum rating; vice versa, a MOSFET is certainly safe if the maximum avalanche current is lower than I AR .
5 Revision history
Table 3. Document revision history 05-Jun-2014 1 Initial release.