AN4296 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
Datasheet sections
- 1 Overview of STM32F303xB/C and STM3 2F358xC CCM RAM
- 1.1 Purpose
- 1.2 STM32F303xB/C and STM32F358xC CCM RAM features
- 1.2.1 CCM RAM mapping
- 1.2.2 CCM RAM remapping
- 1.2.3 CCM RAM write protection
- 1.2.4 CCM RAM parity check
- 2 Execute application code from CCM RAM
- 2.1.1 Executing a source file fr om CCM RAM
- 2.1.2 Executing one or more functions from CCM RAM
- 2.2 Executing an interrupt handler from CCM RAM
- 2.2.2 Updating the startup file
- 2.2.3 Place the interrupt handler in CCM RAM
- 2.2.4 Remap the vector table to CCM RAM
- 3 Execute application code from CCM RAM
- 3.1 Executing a function or an interrupt handler from CCM RAM
- 3.2 Executing a source file from CCM RAM
- 3.3 Executing a library or a library module from CCM RAM
- 4 Execute application code from CCM RAM
- 4.1 Executing a function or an interrupt handler from CCM RAM
- 4.2 Executing a file from CCM RAM
- 4.3 Executing a library from CCM RAM
- 5 Revision history
- IAR EWARM
- KEIL MDK-ARM
- RIDE and Atollic GNU based toolchain The procedures described throughout the document are applicable to other RAM regions such as the CCM data RAM of some F4 devices, or external SRAM. Refer to Table 1 for the list microcontrollers embedding CCM RAM.
Table 1. Applicable products
AN4296 Overview of STM32F303xB/C and STM32F358xC CCM RAM
1 Overview of STM32F303xB/C and STM32F358xC CCM
1.1 Purpose
The STM32F303xB/C and STM32F358xC CCM RAM is tightly coupled with the Cortex™ core. it is primarily intended to execute code at maximum system clock frequency (72 MHz) without any wait state penalty. It thus allows to significantly decrease critical task execution time, compared to code execution from Flash memory. CCM RAM is typically used for real-time and computation intensive routines, such as:
- Digital power conversion control loops (switch mode power supplies, lighting)
- Field-oriented 3-phase motor control
- Real-time DSP tasks When code is located in CCM RAM and data stored in the regular SRAM, the Cortex-M4 core is in the optimum Harvard configuration. A dedicated zero-wait state memory is connected to each of its I- and D-bus (refer to Figure 1: STM32F303xB/xC and STM32F358xC system architecture) and can thus perform at 1.25DMIPS/MHz up to 72 MHz, with a deterministic performance of 90 DMIPS. This also guarantees a minimal latency if interrupt service routines are placed in the CCM RAM. Example A benchmark between the STM32F103xx and STM32F303xx microcontrollers using STMicroelectronics MC library V3.4 shows that in case of single motor control using 3 shunt algorithm, the FOC total execution time for STM32F303xx is 16.97 µs compared to 21.3 µs in STMF103xx (see note below); with FOC core and sensorless core loops running from CCM RAM for STM32F303xx. This means that the STM32F303xx is 20.33 % faster than the STM32F103xx thanks to the CCM RAM. Note: FOC routines are programmed in structured C, so the values provided above do not represent the fastest possible execution both for STM32F103xx and STM32F303xx. In addition, the execution time is also function of the compiler used and of its version. When the CCM RAM is not used for code, it can hold data like an extra SRAM memory. However it cannot be accessed through DMA. It is not recommended to place both code and data together in the CCM, since the Cortex core will have to fetch code and data from the same memory with the risk of collisions. The core would then be in the Von Neuman configuration, and its performance would drop from 1.25DMIPS/MHz to below 1DMIPS/MHz.
Figure 1. STM32F303xB/xC and STM32F358xC system architecture
1.2 STM32F303xB/C and STM3 2F358xC CCM RAM features
1.2.1 CCM RAM mapping
1.2.2 CCM RAM remapping
Unlike regular SRAM, the CCM RAM cannot be remapped at address 0x0000 0000.
1.2.3 CCM RAM wr ite protection
of 1 Kbyte. Refer to Table 2 for a description of CCM RAM organization. Table 2. CCM RAM organization
AN4296 Overview of STM32F303xB/C and STM32F358xC CCM RAM The write protection is enabled through the SYSCFG CCM SRAM protection register (SYSCFG_RCR). This is a write '1' once mechanism, which means that once the write protection is enabled on a given CCM RAM page by programming the corresponding bit to ‘1’, it can be cleared only through a system reset. For more details refer to the product reference manual.
1.2.4 CCM RAM parity check
A parity check is implemented on STM32F303xB/C and STM32F358xC microcontrollers. It is disabled by default and can be enabled by the user when needed through an option bit (SRAM_PE bit). When this option bit is cleared, the parity check is enabled for the first 16 Kbytes of SRAM and for the 8-Kbyte CCM RAM.
Execute application code from CCM RAM using the IAR EWARM toolchain AN4296
2 Execute application code from CCM RAM
using the IAR EWARM toolchain
2.1 Executing a simple code from CCM RAM (except for interrupt
handler) A simple code can be composed of one or more functions that are not referenced from an interrupt handler. If the code is referenced from an interrupt handler, follow the steps described in Section 2.2: Executing an interrupt handler from CCM RAM. EWARM provides the possibility to place one or more functions or a whole source file in CCM RAM. This operation requires a new section to be defined in the linker file (.icf) to host the code to be placed in CCM RAM. This section is copied to CCM RAM at startup. The required steps are the following: 1. Define the address area for the CCM RAM by indicating the start and end addresses. 2. Tell the linker to copy at startup the section named .ccmram from Flash memory to CCM RAM. 3. Indicate to the linker that the code sect ion .ccmram should be placed in the CCM RAM region. Refer to Figure 2: EWARM linker update for an example of code implementing these operations. Note: This procedure is not valid for interrupt handlers.
Figure 2. EWARM linker update
2.1.1 Executing a sour ce file from CCM RAM
executed from this memory area.
- Add the section .ccmram (for example) in the linker file as defined in Section 2.1.
- Right click the file name from the workspace window.
- Select options from the displayed menu.
- Check override inherited settings from the displayed window
- Select the output tab, and type the name of the section already defined in the linker file
Figure 3. EWARM file placement
2.1.2 Executing one or more functions from CCM RAM
- Add the section .ccmram in th e linker file as described in Section 2.1.
- Using the key word pragma location, specify the function to be executed from CCM
RAM (see Figure 4: EWARM function placement). Figure 4. EWARM function placement
AN4296 Execute application code from CCM RAM using the IAR EWARM toolchain Note: To execute more than on e function from CCM RAM, the pragma location keyword should be placed above each function declaration.
2.2 Executing an interrupt handler from CCM RAM
The vector table is implemented as an array named __vector_table and referenced in the startup code. EWARM linker protects the sections that are referenced from the startup code from being affected by an 'initialize by copy' directive. So, you should not use the symbol __vector_table to allow copying interrupt handler sections via the 'initialize by copy' directive. As a consequence, you should make a second vector table and place it in CCM RAM. The steps required to execute an interrupt handler from CCM RAM are the following: 1. Update the linker file (.icf). 2. Update the startup file. 3. Place the interrupt handler in CCM RAM. 4. Remap the vector table to CCM RAM. 2.2.1 Updating the linker file (.icf) To update the linker file: 1. Define the address where the second ve ctor table will be located: 0x1000 0000. 2. Define the memory address area for the CCM RAM by specifying the start and end addresses. 3. Tell the linker to copy at startup the section named .ccmram and the second vector table section ‘.intvec_CCMRAM’ from Flash memory to CCM RAM. 4. Tell the linker that the second vector tabl e should be placed in the intvec_CCMRAM section. 5. Indicate that the .ccmram code section should be placed in CCM RAM.
Figure 5. EWARM linker update for interrupt handler
2.2.2 Updating the startup file
- Make a second vector table to be stored in CCM RAM. The startup_stm32f30x.s file
from the original vector table ‘__vector_table’.
- Add a second vector table to be placed in CCM RAM. It should contain all entries. As
placed in the intvec_CCMRAM section defined in the linker file. Figure 6. EWARM startup file update for interrupt handler
2.2.3 Place the interrupt handler in CCM RAM
the whole stm32f_it.c file as described in Section 2.1.1.
2.2.4 Remap the vector table to CCM RAM
Figure 10. EWARM library module placement
3 Execute application code from CCM RAM
3.1 Executing a functi on or an interrupt handler from CCM RAM
- Define a new region (ccmram) in the scatter file by indicating the start and end
addresses of the CCM RAM area.
- Indicate to the linker that the sections with ccmram attribute must be placed in the CCM
Figure 11. MDK-ARM scatter file
3.2 Executing a source file from CCM RAM
executed from the CCM RAM region.
- Define the CCM RAM as a memory area in the project option window
Figure 14. MDK-ARM target memory
- Right click the file to place it in CCM RAM and select options
- Select the CCM RAM region in the memory assignment menu:
Figure 15. MDK-ARM file placement
3.3 Executing a library or a library module from CCM RAM
- Define the CCM RAM as a memory area as shown in Figure 16: MDK-ARM library
- Right click the library from the workspace and select options.
- You can either place the complete library or a module from a library in CCM RAM.
Figure 16. MDK-ARM library placement
4 Execute application code from CCM RAM
4.1 Executing a functi on or an interrupt handler from CCM RAM
- Define a new region (ccmram) in the linker file (.ld) by defining the start address and
Figure 17. GNU linker update
- Tell the linker that code sections with ccmram attribute must be placed in CCM RAM
(see Figure 18: GNU linker section definition).
Figure 18. GNU linker section definition
- Modify the startup file to initialize data to place in CCM RAM at startup time (see code
- Place the part of code to be executed from CCM RAM in the .ccmram section by
Figure 19. GNU function placement
4.2 Executing a f ile from CCM RAM
- Add the .ccmram section in the linker file as defined in Section 4.1.
- Place your file in CCM RAM as shown below:
Figure 20. GNU file placement
4.3 Executing a library from CCM RAM
- Add the .ccmram section in the linker file as defined in Section 4.1.
- Place your libray in CCM RAM as shown below:
Figure 21. GNU library placement
5 Revision history
Table 3. Document revision history 23-Jul-2013 1 Initial release. Changed STM32F313xC into STM32F358xC. STM32F334x4/x6/x8 in Table 1: Applicable products. Figure 5: EWARM linker update for interrupt handler. Updated Figure 11: MDK-ARM scatter file.