AN420 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
Datasheet sections
- 1 Introduction
- 2 Overview
- 3 Principle of operation of an al gebraic adder
- 4 Example
- 5 Application example
- 6 Revision history
November 2011 Doc ID 2078 Rev 2 1/15 AN420 Application note Expanding A/D resolution of the ST6 A/D converter
1 Introduction
Occasionally the analog signal provided by external sensors require an Analog to Digital conversion with a resolution of greater than 8 bits. In order to extract the full information for subsequent data processing within the microcontroller a higher resolution Analog to Digital is thus required. The solution described in this note enables this higher resolution with the on-chip 8-bit A/D converter of the ST62, using only an additional Operational Amplifier (OpAmp) and a few resistors
2 Overview
of operation is included in this note. Figure 1. Example circuit The resistances are selected by the ST62 I/O pins depending on the analog input voltage. following A/D conversion is always made with the maximum input range of the converter.
3 Principle of operation of an algebraic adder
Figure 2 represents the generic algebraic adder. Figure 2. Generic algebraic adder
Principle of operation of an algebraic adder AN420 6/15 Doc ID 2078 Rev 2 To analyze the circuit, let us calculate the input voltages: Relation (2) becomes: From 3, 4 and 5 we get: Relation (6) is the relevant formula to be used. It also explains the name given to this circuit, since the output voltage is the 'algebraic sum' of the input voltages. To design the actual circuit, you chose one value of Rr (arbitrarily). The other resistances are then determined by the desired coefficients: where (3) (4) (5) (6) (7) VP GPi VPi i1= m GP0 GPi i1= m Gx Rx Vn V0 GR GNj j1= n ∑+× GN0 GN0 GR GNj j1= n ∑++ GP0 GPj j1= m ∑+ GT== V0 VNj j1= n ∑– Rr RNj i1= m Rr RPi Ki Rr RPi Rr RNj
AN420 Principle of operation of an algebraic adder Doc ID 2078 Rev 2 7/15 Finally, the values for RN0 and RP0 are chosen, based on (2).
4 Example
Let us assume we have a voltage swing of 10 volts (0 to 10) that we want to convert with a 10-bit resolution. And let us assume we have a set of voltage sources VNj that we can switch between 0 to 5 volts under software control, and each one independently from the other. Let us also assume we can 'cut' the 10 volt swing in 4 'pieces' of 2.5 volts each, and that every 'piece' can be converted with 8-bit resolution. The overall resolution will therefore be: 8 (ST6 A/D resolution) * 22 (# of 'pieces') = 210 Let us call Vin the actual value of the source to be converted. For instance, if Vin ε [10, 7,5] volts, we could supply the ST6 A/D with the voltage: (Vin-7.5volt)x2 => ε[0,5]volt or, for (10,7.5) volts: (Vin-1.5xVN1)x2 = 2xVin-3xVN1 where VN1 is one of the VNj sources, either 0 or 5 volts. In similar fashion, for the other intervals, we could obtain: (7.5, 5) volts (Vin-VN2)x2 = 2xVin-2xVN2 (5, 2.5) volts (Vin-0.5xVN3)x2 = 2xVin-VN3 (2.5, 0) volts (Vin-0xVN4)x2 = 2xVin So, relation (6) becomes: V0 = 2xVin-3xVN1-2xVN2-VN3 where Vin =VP1 The software driving the conversion will therefore verify if, given a certain status of the VNj voltages, the conversion is far from being saturated. If so, another try will be performed with a different status of the VNj voltages. Figure 3 gives the flow chart of such software.
Figure 3. Conversion routine
To satisfy relation (2), we obtain the following values, as indicated in Figure 4. Assuming Rr RN3 Rr RN0 RN1 RN2 RN3 RN0 RP0 RP1 RP0 RN0 RP0 R
5 Application example
of Figure 3 in the application circuit of Figure 4. Figure 4. Example circuit used to achieve a different resolution.
Hres .def 0bdh,0ffh,0ffh ;MS 2 bits of conversion result, and ;conversion flag conv_f .equ 7;the MSB of Hres is the high resolution ;end of conversion flag c1 .equ 6 ;conversion step flags c2 .equ 5 c3 .equ 4 c4 .equ 3 ;using Hres Lres .def 0beh,0ffh,0ffh ;LSB of conversion result ;register W is used to save the accumulator contents ;in standard interrupt routines .org 880h ;one module only. Do not use this ;assembly directive if you organize ;your software in linkable modules init ldi drb,1 ldi orb,1 ;PB0 is analog input ldi ddrc,070h ;PC4..6 are open drain outputs ldi orc,070h ;PC4..6 are push-pull outputs now ldi drcs,0 ;assume PC7 is input with pull-up, ;no interrupt ldi ior,10h ;enable interrupts ldi Hres,0 reti ;initialize interrupt machine conv ;this is an endless loop converting ;PB0 input with 10-bit resolution ;the first time here after reset, ;VN1=VN2=VN3=0 set conv_f,Hres set c1,Hres set 5,adcr ;start high resolution conversion jrs conv_f,Hres,$ nop ;here the high resolution result is ;available in Hres-Lres jp conv adcint ld w,a ;save accumulator ld a,adr ;in accumulator conversion result jrs c1,Hres,c1conv
jrs c2,Hres,c2conv jrs c3,Hres,c3conv c4conv ldi Hres,3 ld Lres,a ld a,drcs res VN1,a ld drcs,a ld drc,a ;VN1=VN2=VN3=0 jp convout c1conv pi a,0ffh jrnz c1c1 lr Hres ld Lres,a convout d a,w reti c1c1 ld a,drcs set VN3,a ld drcs,a ld drc,a ;VN1=VN2=0, VN3=1 set 5,adcr ;start conversion res c1,Hres set c2,Hres jp convout ;exit interrupt c2conv cpi a,0ffh jrnz c2c1 ldi Hres,1 ld Lres,a jp convout c2c1 ld a,drcs res VN3,a set VN2,a ld drcs,a ld drc,a ;VN1=VN3=0, VN2=1 set 5,adcr ;start conversion res c2,Hres set c3,Hres jp convout ;exit interrupt c3conv cpi a,0ffh jrnz c3c1
ldi Hres,2 ld Lres,a jp convout c3c1 ld a,drcs res VN2,a set VN1,a ld drcs,a ld drc,a ;VN2=VN3=0, VN1=1 set 5,adcr ;start conversion res c3,Hres set c4,Hres jp convout ;exit interrupt .org 0ff0h jp adcint ;A/D interrupt vector .org 0ffeh jp init ;reset vector .end
6 Revision history
Table 1. Document revision history 21-Dec-1992 1 Initial release. 02-Nov-2011 2 Updated format and company logo.