AN4170 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 15

Technical content

Datasheet sections

  • 1 Operation
  • 1.1 Power supply
  • 1.2 Demonstration board preparation
  • 1.3 Inputs and outputs
  • 1.4 Powering up
  • 1.5 Gain settings
  • 1.6 Single-ended or differential input
  • 1.7 Board schematic and bill of material
  • 2 PCB layout
  • 2.1 Layout views
  • 2.2 Design guidelines for PCB schematic and lay out
  • 2.2.1 Dumping network
  • 2.2.2 Main filter
  • 2.2.3 Layout recommendations
  • 3 Revision history

20 W + 20 W dual BTL class-D audio amplifier demonstration board

schematic, printed circuit board layout and bill of material. Figure 1. STEVAL-CCA042V1

1 Operation

  • Power supply voltage range: 5 V to 18 V
  • Number of channels: 2 BTL (Bridge-Tied Load) stereo
  • Load impedance: 4 Ω to 8 Ω
  • Gain settings: 20 dB, 26 dB, 30 dB, 32 dB
  • Undervoltage protection (UVP): 4.5 V

1.1 Power supply

connector J2 (see Figure 2).

1.2 Demonstration board preparation

  1. Ensure that the power supply is switched OFF .
  2. Connect the regulated power supply, adjusted in the device operating range, to the

connector J2 (observe the polarity).

1.3 Inputs and outputs

  1. Connect the loads across the connectors J3 (LEF T) and J4 (RIGHT), the specified

impedance ranges from 6 to 8 Ω.

  1. Connect the analog audio inputs, either differential or single-ended, to the L-input and

Refer to Figure 2: Demonstration board connections on page 4. Table 1. Input configuration

Figure 2. Demonstration board connections

1.4 Powering up

dedicated switches and jumpers. Figure 3. Standby and mute switches Table 2. Standby and mute settings

1.5 Gain settings

Figure 4. Jumpers J5 and J6

1.6 Single-ended or differential input

Jumpers J8 and J9 are used to modify the input signal configuration. Figure 5. Jumpers J8 and J9 Table 3. Configuration of jumpers J5 and J6 Table 4. Configuration of jumpers J8 and J9

1.7 Board schematic and bill of material

Figure 6. STEVAL-CCA042V1 schematic

32 INPB

36 VSS

33 INNB

21 MUTE

1 SUB_GND

22 INPA

23 INNA

27 SGND

26 VDDS

28 DIAG

19 VDDPW

18 PGND

20 STBY

24 ROSC

31 GAIN1

35 SVCC

30 GAIN0

25 SYNCLK

Table 5. Bill of material

  1. Alternate part MSS1246/MSS1260

2 PCB layout

2.1 Layout views

Figure 7. Top view of PCB layout Figure 8. Bottom view of PCB layout

Figure 9. Top view of PCB layout - with dimensions

2.2 Design guidelines for PCB schematic and layout

2.2.1 Dumping network

Figure 10. Dumping network

2.2.2 Main filter

between the upper limit of the audio band (~20 kHz) and the carrier frequency (310 kHz). Figure 11. Main filter Table 6. Recommended values

2.2.3 Layout recommendations

The following figures illustrate layout recommendations. inductance caused by the copper supply lines. Figure 12. Capacitors soldered as close as possible to V Solder the snubber networks as close as possible to the IC related pin. the output pins be within 5 mm. Figure 13. Snubber networks soldered as close as possible to relevant IC pin

Signal ground should be directly connected to the negative terminal of the bulk capacitor. Figure 16. Signal ground routing

3 Revision history

Table 7. Document revision history 13-Nov-2012 1 Initial release.