AN4116 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Adapter features
  • 2 Circuit description
  • 3 Schematic and bill of material
  • 4 Transformer
  • 5 Testing the board
  • 5.1 Typical waveforms
  • 5.2 Precision of the regulation and output voltage ripple
  • 5.3 Burst mode and output voltage ripple
  • 5.4 Efficiency
  • 5.5 Light load performance
  • 6 Functional check
  • 6.1 Soft-start
  • 6.2 Overload protection
  • 6.3 Feedback loop failure protection
  • 7 Feedback loop calculation guide lines
  • 7.1 Transfer function
  • 7.2 Compensation procedure
  • 8 Thermal measurements
  • 9 EMI measurements
  • 10 Board layout
  • 11 Conclusions

with the VIPER06, a new offline high voltage converter by STMicroelectronics. AC, with output load disconnected). is available only if self-biasing is excluded). Figure 1. Demonstration board image

Appendix A Test equipment and measurement of efficiency and light load

Table 8. Light load performance P

1 Adapter features

The electrical specifications of the demonstration board are listed below in Table 1.

2 Circuit description

Table 1. Electrical specifications

Circuit description AN4116 8/38 Doc ID 023220 Rev 1 connects the output terminal to the VDD through a small signal diode. If the output voltage is lower than VDDCS_ON, the self-biasing can be excluded only using an auxiliary winding. The IC biasing through auxiliary winding or through the output is referred to as external biasing. In Figure 3 the VDD waveforms for both cases (IC external biased and self-biased) are shown.

3 Schematic and bill of material

Figure 2. Application schematic

Table 2. Bill of material

4 Transformer

The transformer characteristics are listed in the table below. The following figures show size and pin distances ([mm]) of the transformer. Table 3. Transformer characteristics Figure 5. Transformer size and pin diagram Figure 6. Transformer electrical diagram Figure 7. Transformer side view 1 Figure 8. Transformer side view 2

5 Testing the board

5.1 Typical waveforms

Figure 9. Drain current/voltage @ 115 V AC Figure 10. Drain current/voltage @ 230 V AC Figure 11. Drain current/voltage @ 90 V AC Figure 12. Drain current/voltage @ 265 V AC

5.2 Precision of the regulation and output voltage ripple

condition and by the IC biasing (self-supply or not). Table 4. Output voltage line-load regulation Figure 13. Line regulation at different loads; IC Figure 14. Line regulation at different loads; IC

5.3 Burst mode and output voltage ripple

with energy saving regulations. AC and 230 VAC respectively. Figure 15. Load regulation at different input Figure 16. Load regulation at different input Figure 17. Output voltage ripple @ 115 V AC Figure 18. Output voltage ripple @ 230 V AC

operating conditions. The ripple in burst mode operation is very low.

5.4 Efficiency

than 71.18% for a power throughput of 4.2 W. same power throughput is 76.6%. for both input voltages is also shown. Figure 19. Output voltage ripple @ 115 V Figure 20. Output voltage ripple @ 230 V AC Table 5. Output voltage ripple at no/light load

Figure 21. Active mode efficiency of the demonstration board and comparison with

5.5 Light load performance

Table 6. No load input power Table 7. Energy consumption criteria for no load

the entire power supply that increases greatly the standby consumption. and efficiency of the demonstration board also in two other low load cases. show the performance when the output load is 25 mW and 50 mW respectively. reported in the diagrams below. Table 8. Light load performance P OUT=25 mW Table 9. Light load performance P OUT=50 mW

6 Functional check

6.1 Soft-start

6.2 Overload protection

the IC overheating in the case of repeated overload events. Figure 32), in order to reduce the stress on the secondary diode. down to zero and the protection is not tripped. elapse before switching is resumed (Figure 33). Figure 28. Soft-start at startup Figure 29. Soft-start at startup (zoom)

6.3 Feedback loop failure protection

OUT voltage either directly or through the auxiliary winding, depending on the cases. can be induced opening the high side resistor, RfbH = RfbH1+RfbH2. Figure 30. Output short-circuit applied: OLP Figure 31. Output short-circuit maintained: Figure 32. Output short-circuit maintained: Figure 33. Output short-circuit removal and

7 Feedback loop calculation guidelines

7.1 Transfer function

i.e. the network which is in charge to ensure the stability of the system. Figure 38. Control loop block diagram

  • ESRC2 1fz OU T⋅⋅= π

AN4116 Feedback loop calculation guidelines Doc ID 023220 Rev 1 25/38 The mathematical expression of the compensator C(f) is: Equation 5 where: Equation 6 Equation 7 Equation 8 are chosen in order to ensure the stability of the overall system. Gm = 2 mA/V (typical) is the VIPER06 transconductance.

7.2 Compensation procedure

The first step is to choose the pole and zero of the compensator and the crossing frequency, for instance: – fZc = fp/2 – fPc = fz – fcross = fcross_sel ≤ fsw/10 G1(fcross_sel) can be calculated from Equation 2 and, since by definition it is | C(fcross_sel)*G1(fcross_sel)| = 1, C0 can be calculated as follows: Equation 9 ⋅=Δ fPc jfjf fZc jf H C V IfC COMPOUT 0pk π RfbHRfbL RfbL CpCc GmCo +⋅+−= CcRc fZc ⋅⋅⋅ CpCcRc CpCcfPc ⋅⋅⋅⋅ += π2 )_(1_1 _1_2 selfcrossG H fZc jselfcross fPc jselfcrossjselfcross C COMP π

Feedback loop calculation guidelines AN4116 26/38 Doc ID 023220 Rev 1 At this point the bode diagram of G1(f)*C(f) can be plotted, in order to check the phase margin for the stability. If the margin is not high enough, an alternative choice should be made for fZc, fPc and fcross_sel, and the procedure repeated. When the stability is ensured, the next step is to find the values of the schematic components, which can be calculated, using the above formulas, as follows: Equation 10 Equation 11 Equation 12 Equation 13 13.3 − V Vout RfbHRfbL RfbHRfbL RfbL C Gm fPc fZcCp +⋅⋅= ⎛ −⋅= 1fZc fPcCpCc CpCcfPc CpCcRc ⋅⋅⋅⋅ += π2

8 Thermal measurements

Figure 39. Thermal map at V IN=85 VAC, Figure 40. Thermal map at V IN=85 VAC, Figure 41. Thermal map at VIN=115 V AC, full Figure 42. Thermal map at V IN=115 VAC, full

9 EMI measurements

been conducted as reported in the following figures. Figure 47. Peak measurements @ Figure 48. Peak measurements @ Figure 49. Quasi-peak measurements @ Figure 50. Quasi-peak measurements @

10 Board layout

Figure 53. Board layout

11 Conclusions

The VIPER06 allows a non-isolated converter to be designed in a simple way and with few external components. In this document a flyback has been described and characterized. Special attention has been given to light load performance. The efficiency performance has been compared to the requirements of the Code of Conduct (version 4) for an external AC- DC adapter with very good results, the measured active mode efficiency is always higher with respect to the minimum required.

AN4116 Test equipment and measurement of efficiency and light load performance Doc ID 023220 Rev 1 35/38 observed, the UUT can be considered stable and the measurements can be recorded at the end of the 5-minute period. If AC input power is not stable over a 5-minute period, the average power or accumulated energy is measured over time for both AC input and DC output. Some wattmeter models allow the measured input power to be integrated in a time range and then the energy absorbed by the UUT to be measured during the integration time. The average input power is calculated by dividing by the integration time itself.

12 References

– [1] Code of Conduct on Energy Efficiency of External Power Supplies, Version 4. – [2] VIPER06 datasheet.

Table 11. Document revision history 23-Jan-2013 1 Initial release.