AN4106 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 39
Technical content
Datasheet sections
- 1 Adapter features
- 2 Circuit description
- 3 Bill of material
- 4 Transformer
- 5 Testing the board
- 5.1 Typical waveforms
- 6 Line/load regulation and output voltage ripple
- 7 Burst mode and output voltage ripple
- 8 Efficiency
- 9 Light load performance
- 10 Functional check
- 10.1 Soft-start
- 10.2 Overload protection
- 10.3 Feedback loop failure protection
- 11 Feedback loop calculat ion guidelines
- 11.1 Transfer function
- 11.2 Compensation procedure
- 12 Thermal measurements
- 13 EMI measurements
- 14 Board layout
- 15 Conclusions
the VIPER26, a new offline high-voltage converter by STMicroelectronics. point, onboard soft-start, a safe auto-restart after a fault condition and low standby power. protection, and open loop failure protection. All protection is auto-restart mode. Figure 1. EVLVIP26L-12WFN demonstration board
Appendix A Test equipment and measurement of efficiency and light load
Table 9. Light load performance at P
1 Adapter features
The electrical specifications of the demonstration board are listed in Table 1. Table 1. Electrical specifications
2 Circuit description
stress on the power components. Figure 2. In this case jumper J1 is open because the auxiliary winding of the
12 V, the VIPER26 must be supplied through the auxiliary winding of the transformer (J1
voltage generated by the auxiliary winding increases with the load on the regulated output. from the output, i.e. to the simplified schematic shown in Figure 3.
Figure 2. Application schematic - complete
Figure 3. Application schematic - simplified for V OUT ≥ 12 V
3 Bill of material
Table 2. Bill of material (simplified schematic)
Table 2. Bill of material (simplified schematic) (continued)
4 Transformer
Table 3. Transformer characteristics Figure 4. Transformer size and pin diagram, Figure 5. Transformer size, side view Figure 6. Transformer, pin distances Figure 7. Transformer, electrical diagram
3.5 MIN
18 MAX
5 Testing the board
5.1 Typical waveforms
Figure 8. Drain current and voltage at Figure 9. Drain current and voltage at Figure 10. Drain current and voltage at Figure 11. Drain current and voltage at
6 Line/load regulation and output voltage ripple
Table 4. Output voltage line-load regulation Figure 12. Line regulation Figure 13. Load regulation
7 Burst mode and output voltage ripple
Figure 16. Output voltage ripple at Figure 17. Output voltage ripple at Figure 18. Output voltage ripple at Figure 19. Output voltage ripple at
operating conditions. The ripple in burst mode operation is very low. Table 6. Output voltage ripple at no/light load
8 Efficiency
than 77.7% for a power throughput of 12 W. same power throughput is 82.96%. efficiency at 25%, 50%, 75% and 100% of load for both input voltages is also shown. Figure 20. Active mode efficiency vs. V
9 Light load performance
voltages and the results are reported in Table 7. Table 8. Energy consumption criteria for no load entire power supply which considerably increases standby consumption. the demonstration board also in two other light load cases is shown. show the performances when the output load is 25 mW and 50 mW respectively. Table 7. No load input power
0 W ≤ P
Table 9. Light load performance at P OUT = 25 mW
Figure 21. P IN vs. VIN at no load and light load output power corresponding to PIN = 1 W for different values of the input voltage. Table 10. Light load performance at P OUT = 50 mW Table 11. P OUT @ PIN = 1 W
10 Functional check
10.1 Soft-start
10.2 Overload protection
the IC in case of repeated overload events. invoked, in order to reduce the stress on the secondary diode. basis down to zero and the protection is not tripped. before resuming switching (Figure 29). Figure 24. Soft-start at startup Figure 25. Soft-start at startup (zoom)
10.3 Feedback loop failure protection
auxiliary winding, depending on the cases. be induced opening the high-side resistor, R3. Figure 26. Output short-circuit applied: OLP Figure 27. Output short-circuit maintained: Figure 28. Output short-circuit maintained: Figure 29. Output short-circuit removal and
11 Feedback loop calculation guidelines
11.1 Transfer function
i.e. the network which is in charge to ensure the stability of the system. Figure 34. Control loop block diagram
- ESRC2 1fz OU T⋅⋅= π
Feedback loop calculation guidelines AN4106 26/39 Doc ID 023156 Rev 1 Equation 5 where (with reference to the schematic of Figure 2): Equation 6 Equation 7 Equation 8 are to be chosen with the purpose to ensure the stability of the overall system. Gm = 2 mA/V (typical) is the VIPER26 transconductance.
11.2 Compensation procedure
The first step is to choose the pole and zero of the compensator and the crossover frequency, for instance:
- fZc = fp/2
- fPc = fz
- fcross = fcross_sel ≤ fsw/10. G1(fcross_sel) can be calculated from equation (2) and, being by definition | C(fcross_sel)*G1(fcross_sel)| = 1, C0 can be calculated as follows: Equation 9 At this point the Bode diagram of G1(f)*C(f) can be plotted, in order to check the phase margin for the stability. If the margin is not high enough, another choice should be made for ⋅=Δ Δ fP c jfjf fZc jf H C V I fC COMP OU T pk π RR R CC GmC +⋅+−= 772 CRfZc ⋅⋅⋅= π 8772 CCR CCfPc ⋅⋅⋅⋅ += π )_(1_1 _1_2 selfcrossG H fZc jselfcross fPc jselfcrossjselfcross C COMP π
AN4106 Feedback loop calculation guidelines Doc ID 023156 Rev 1 27/39 fZc, fPc and fcross_sel, and the procedure repeated. When the stability is ensured, the next step is to find the values of the schematic components, which can be calculated, using the above formulas, as follows: Equation 10 Equation 11 Equation 12 Equation 13 13.3 V V RR OUT 0 RR R C Gm fPc fZcC +⋅⋅= ⎛ −⋅= 187 fZc fPcCC 872
877 CCfPc
CCR ⋅⋅⋅⋅ += π
12 Thermal measurements
Figure 35, 36 and 37 and summarized in Table 12. Figure 35. Thermal map at T AMB = 25 ° C, VIN = 85 VAC, full load Figure 36. Thermal map at T AMB = 25 ° C, VIN = 115 VAC, full load
Figure 37. Thermal map at T AMB = 25 ° C, VIN = 230 VAC, full load Table 12. Key components temperature @ V IN = 85 VAC /230 VAC, full load (TAMB = 25 ° C)
13 EMI measurements
(board disconnected from the mains) was performed and is reported in Figure 38. performed and the results are shown in Figure 39 and 40. Figure 38. Background noise measurement Figure 39. Average measurement at V IN = 115 VAC, full load
Figure 40. Average measurement at V IN = 230 VAC, full load
14 Board layout
Figure 41. Bottom layer & top overlay
15 Conclusions
The VIPER26 allows a simple design of a non-isolated converter with few external components. In this document a non-isolated flyback has been described and characterized. Special attention has been given to light load performance, confirmed as very good by bench analysis. Efficiency has been compared to the requirements of the Code of Conduct, version 4 program (version 2.0) for an external AC-DC adapter with very good results in that the measured active mode efficiency is always higher with respect to the minimum required.
Test equipment and measurement of efficiency and light load performance AN4106 36/39 Doc ID 023156 Rev 1 minutes (warm-up period) immediately prior to conducting efficiency measurements. After this warm-up period, the AC input power is monitored for a period of 5 minutes to assess the stability of the UUT. If the power level does not drift by more than 5% from the maximum value observed, the UUT can be considered stable and the measurements can be recorded at the end of the 5-minute period. If AC input power is not stable over a 5-minute period, the average power or accumulated energy is measured over time for both AC input and DC output. Some wattmeter models allow integration of the measured input power in a time range and then measure the energy absorbed by the UUT during the integration time. The average input power is calculated dividing by the integration time itself.
16 References
– Code of Conduct on Energy Efficiency of External Power Supplies, Version 4. – VIPER26 datasheet.
Table 13. Document revision history 16-Oct-2012 1 Initial release.