AN4026 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
Datasheet sections
- 1 Main characteristics and circuit description
- 1.1 Startup sequence
- 1.2 Brownout protection
- 1.3 Fast voltage feed-forward
- 1.4 Resonant power stage
- 1.5 Output voltage feedback loop
- 1.6 L6699 overload and short-circuit protection
- 1.7 Overvoltage and open loop protection
- 1.8 Light load operation
- 2 Efficiency measurements
- 2.1 Light load operation efficiency
- 3 Harmonic content measurement
- 4 Functional check
- 4.1 Burst mode operation
- 4.2 Startup
- 4.3 Overcurrent and short-circuit protection
- 4.4 Anti-capacitive mode protection
- 5 Thermal map
- 6 Conducted emission pre-compliance test
- 7 Bill of material
- 8 PFC coil specifications
- 8.1 General description and characteristics
- 8.2 Electrical characteristics
- 8.3 Electrical diagram and winding characteristics
- 8.4 Mechanical aspect and pin numbering
19 V - 90 W adapter with PFC for laptop computers
typical hi-end portable computer power adapter. ® eligibility criteria (EPA rev.
2.0 EPS) and very good efficiency also at light load, and compliance to the new ErP Lot 6
international regulation limits. procedure preventing hard switching at startup. Figure 1. EVL6699-90WADP: 90 W adapter demonstration board
Main characteristics and circuit description AN4026 6/40 Doc ID 022603 Rev 1
1 Main characteristics and circuit description
The main features of the SMPS are listed here below:
- Universal input mains range: from 90 to 264 Vac - frequency from 45 to 65 Hz
- Output voltage: 19 V at 4.75 A continuous operation
- Mains harmonics: meets EN61000-3-2 Class-D and JEITA-MITI Class-D
- No load mains consumption: according to ENERGY STAR 2.0 for external power supplies
- Average efficiency: according to ENERGY STAR 2.0 for external power supplies
- Light load efficiency: according to ErP Lot 6 Tier2 requirements
- EMI: within EN55022-Class-B limits
- Safety: meets EN60950
- Dimensions: 65 x 151 mm, 25 mm components maximum height
- PCB: double side, 70 µm, FR-4, mixed PTH/SMT. The circuit is made up of two stages: a front-end PFC using the L6563H and an LLC resonant converter featuring the L6699. The PFC stage works as pre-regulator and powers the resonant stage with a constant voltage of 400 V. The downstream converter operates only if the PFC is working and regulating its output voltage. In this way, the resonant stage can be optimized for a narrow input voltage range improving the efficiency of the primary side power components.
1.1 Startup sequence
As previously indicated, the PFC acts as master and the resonant stage can operate only if the PFC output is delivering its rated output voltage. Therefore the circuit is designed so that at startup the PFC starts first, the downstream converter then turns on by means of the LINE pin (#7). At the beginning, the L6563H is supplied by the integrated high-voltage startup circuit; once the PFC starts switching, a charging pump connected to the PFC inductor supplies both PFC and resonant controllers. Once both stages are working, the controllers are supplied also by the auxiliary winding of the resonant transformer, assuring correct supply voltage even during standby operation. After reaching the turn-on threshold on the VCC pin the L6563H integrated HV startup circuit is turned off and it is therefore not dissipative during normal operation, significantly contributing to the reduction of input power consumption once the power supply operates at light load, and meeting the standby worldwide efficiency standards that are currently required.
1.2 Brownout protection
Brownout protection prevents the circuit from working with abnormal mains levels. It is easily achieved using the pin RUN (#12) of the L6563H: this pin is connected through a resistor divider to the pin VFF (#5) which provides a DC voltage the same as the peak of the MULT pin (#3) signal which is a partition of the rectified mains input voltage. An L6563H internal comparator allows IC operations only if the mains level is correct, within the nominal limits,
AN4026 Main characteristics and circuit description Doc ID 022603 Rev 1 7/40 therefore at startup, if the input voltage is below 90 Vac (typ.), the circuit operation is inhibited. The L6699 has a similar protection monitoring the LLC input voltage on the LINE pin (#7). It is used to prevent the resonant converter from working with too low input voltage that may cause incorrect capacitive mode operation and the relevant protection intervention. Therefore, if the bulk voltage (PFC output) is below 380 V (typ.), the resonant stage startup is prevented. The L6699 LINE pin internal comparator has a current hysteresis, allowing to set independently the turn-on and turn-off voltage. Turn-off threshold has been set to 300 V (typ.) in order to avoid capacitive mode operation but allowing the resonant stage to operate even in the case of a whole 20 ms mains cycle sag. Even with the consequent PFC output drop the LLC converter is able to keep the output voltage regulated at the rated load.
1.3 Fast voltage feed-forward
Voltage on the L6563H VFF pin (#5) has the same value as the peak value of the voltage on the MULT pin (#3) and it is generated by the RC network (R15 + R26, C12) connected to VFF , completing an internal peak-holding circuit. This signal is necessary to derive information from the RMS input voltage to compensate the loop gain that is mains voltage dependent. In general, if the VFF time constant is too small, the voltage generated is affected by a considerable amount of ripple at twice the mains frequency. Because the VFF signal is fed into the multiplier, the excessive ripple causes distortion of the current reference resulting in high THD and poor PF . On the other hand, if the time constant is set too large, there is a considerable delay in setting the right amount of feed-forward, resulting in excessive overshoot or undershoot of the pre-regulator's output voltage in response to large line voltage changes. To overcome this issue, the L6563H implements the new fast voltage feed-forward function. As soon as the voltage on the VFF pin decreases by a set threshold (40 mV typically), a mains dip is assumed and an internal switch rapidly discharges the VFF capacitor via a 10 kΩ resistor. Thanks to this feature it is possible to set an RC circuit with a long time constant, assuring a low THD, but obtaining a fast response to mains voltage variations by the PFC.
1.4 Resonant power stage
The downstream converter implements the L6699, a double-ended controller specific to the series-resonant half bridge topology, supporting both LLC and LCC configurations. It provides 50% complementary duty cycle: the high-side switch and the low-side switch are driven ON/OFF 180° out-of-phase for exactly the same time. Output voltage regulation is obtained by modulating the operating frequency. The deadtime inserted between the turn- off of one switch and the turn-on of the other is automatically adjusted to best fit the transition times of the half bridge midpoint, allowing the improvement of efficiency thanks to the transformer magnetizing inductance maximization and ensuring zero-voltage switching in all LLC input voltage and output load conditions. To drive the high-side switch with the bootstrap approach, the L6699 incorporates a high- voltage floating structure able to withstand more than 600 V with an internal synchronous- driven high-voltage DMOS replacing the external fast-recovery bootstrap diode to charge the bootstrap capacitor powering the floating driver of the high-side MOSFET.
Main characteristics and circuit description AN4026 8/40 Doc ID 022603 Rev 1 The L6699 enables the user to set the operating frequency range of the converter by means of a high-accuracy externally programmable oscillator. At startup, in addition to the traditional frequency-shift soft-start (the switching frequency starts from a preset maximum value and then decays as far as the steady-state value determined by the control loop), a proprietary circuit controls the half bridge to prevent hard- switching from occurring in the initial cycles because of the imbalance of the VOS applied to the transformer. At light load, the L6699 is forced to enter a controlled burst mode operation that keeps the converter input consumption as low as possible. IC protection functions include a current sense input for OCP with frequency shift and delayed shutdown with automatic restart. Fast shutdown with automatic restart occurs if this first-level protection cannot control the primary current. Additionally, the IC prevents the converter from working in, or too close to, capacitive mode, to guarantee soft-switching. A latched disable input (DIS) is used to implement the OVP . Other functions include a not-latched active-low disable input with current hysteresis, useful for power sequencing or for brownout protection, and an interface with the PFC controller that enables the pre-regulator to be switched off during fault conditions or during burst mode operation. The transformer uses the integrated magnetic approach, incorporating the resonant series inductance. Therefore no external additional coil is needed for the resonance. The transformer secondary winding configuration is centre tap and makes use of a couple of power Schottky rectifiers p/n STPS30H60CFP . A small LC filter has been added on the output to reduce the high frequency ripple and noise. D15, R56, R62, R65, R66, Q5 and Q6 implement an output voltage “fast discharge” circuit discharging quickly the output capacitors when the converter is turned off. It has been implemented to quickly decrease the residual output voltage once the converter is turned off at no load.
1.5 Output voltage feedback loop
The feedback loop is implemented by means of a typical circuit using a TL431 modulating the current in the optocoupler diode. On the primary side, R34 - connecting pin RFMIN (#4) to the optocoupler's phototransistor - closes the feedback loop and its value sets the maximum switching frequency at about 105 kHz. This value has been chosen to limit the switching losses at light load operation. R31, connecting the same pin to ground, sets the minimum switching frequency. The R-C series R44 and C18 sets both soft-start maximum frequency and duration.
1.6 L6699 overload and short-circuit protection
The current into the primary winding is sensed by the lossless circuit R41, C27, D11, D10, R39, and C25 and it is fed into the ISEN pin (#6). In case of overcurrent, the voltage on the pin surpasses an internal comparator threshold (0.8 V), triggering a protection sequence. The capacitor (C45) connected to the DELAY pin (#2) is charged by an internal 150 µA current generator and is slowly discharged by the external resistor (R24). If the voltage on the pin reaches 2 V, the soft-start capacitor is completely discharged so that the switching frequency is pushed to its maximum value. As the voltage on the pin exceeds 3.5 V, the IC
AN4026 Main characteristics and circuit description Doc ID 022603 Rev 1 9/40 stops switching and the internal generator is turned off, so that the voltage on the pin decays because of the external resistor. The IC is soft-restarted as the voltage drops below 0.3 V. In this way, under short-circuit conditions, the converter works intermittently with very low input average power. Please note that some preliminary demonstration boards use the PCB of the EVL6599A- 90WADP reworked for L6699. On these boards the silk screens report the original reference designators for D10 and D11 but have mounted on those positions two resistors in place of the diodes. The name of the boards reported on the PCB silkscreen top side is “90 W adapter with L6563H and L6599A Rev. 1.0”. More recent demonstration boards have updated the reference designators and the silkscreen of D10 and D11 has been updated to R63 and R64 respectively. The name of these more recent boards reported on the PCB top side is “90 W adapter with L6563H and L6699 Rev. 1.0”. There is no circuit difference between the two boards.
1.7 Overvoltage and open loop protection
Both circuit stages, PFC and resonant, are equipped with their own overvoltage protection. The L6563H controller monitors the PFC output voltage via the resistor divider connected to a dedicated pin (PFC_OK, #7) protecting the circuit in the case of loop failures or disconnection of the feedback loop divider connected to the INV pin (#1). If a fault condition is detected, the PFC_OK circuitry latches the L6563H operations and, by means of the PWM_LATCH pin (#8), it latches the L6699 too, via its DIS pin (#8). The converter is kept latched by the L6563H HV circuit, which supplies the IC by charging the VCC capacitor periodically. To resume converter operation, a mains restart is necessary. The LLC open loop protection is guarantee by the Zener D8 sensing the voltage from the transformer T1 auxiliary winding. In case of open loop the Zener stops the operation by triggering the DIS pin (#8) of the L6699.
1.8 Light load operation
The board implements a burst mode function allowing a significant power saving during light or no-load operation. The L6699 STBY pin (#5) senses the optocoupler's collector voltage that is related to the feedback control and is proportional to the output load. This signal is compared to an internal reference (1.24 V); if the load decreases and the voltage on the STBY pin becomes lower than the reference, the IC enters an idle state and its quiescent current is reduced. Once the voltage exceeds the reference by 30 mV, the controller restarts switching. Burst mode operation load threshold is programmed by properly choosing the resistor connecting the optocoupler to pin RFmin (R34). As already mentioned, the deadtime inserted between the two gate driver signals is automatically adjusted to best fit the transition times of the half bridge midpoint, improving the efficiency thanks to the transformer magnetizing inductance maximization. In detail, increasing the transformer magnetizing inductance minimizes the magnetizing current, providing a conduction loss decrease because of the lower total RMS current flowing into the transformer primary side and half bridge MOSFETs. Because of the low current value at MOSFET turn-off, a longer transition time of the half bridge is observed, for this reason the deadtime takes longer in order to ensure the correct zero voltage switching operation by the MOSFETs.
Main characteristics and circuit description AN4026 10/40 Doc ID 022603 Rev 1 The L6563H implements its own burst mode function. If the COMP voltage falls below 2.5 V, the IC stops switching causing an output voltage decrease, as a consequence the COMP voltage rises again and the IC restarts switching. In order to achieve a better load transient response, the PFC burst mode operation is partially forced by the resonant converter: once the L6699 stops switching due to load drops, its PFC_STOP pin pulls down the L6563H's PFC_OK pin, disabling PFC switching. Thanks to this solution, the PFC is forced into idle state when the resonant stage is not switching and rapidly wakes up when the downstream converter restarts switching. This solution prevents a significant drop of the bulk voltage in the case of abrupt load rising.
Figure 2. Electrical diagram
2 Efficiency measurements
mains voltages. At 115 Vac the average efficiency is 89.8%, while at 230 Vac it is 91.5%. Measurements are also reported in Figure 3 for reference. Figure 3. Efficiency vs. output power diagram Table 1. Overall efficiency
230 V-50 Hz 115 V-60 Hz
2.1 Light load operation efficiency
regulation ENERGY STAR version 5.0 program for computers.
- Because the current flowing through the circuit under measurement is relatively small,
- During any efficiency measurement, remove any oscilloscope probe from the board.
- For any measurement load, apply a warm-up time of 20 minutes by each different load.
Loads have been applied increasing the output power from minimum to maximum.
- Because of the input current shape during light load condition, the input power
used was the Y okogawa WT210 power meter. Table 2. Light load efficiency
Figure 4. Light load efficiency diagram ENERGY STAR program version 5.0 for computers.
3 Harmonic content measurement
below the limits of both regulations. Figure 5. Compliance to EN61000-3-2 at 230 Figure 6. Compliance to JEITA-MITI at 100
4 Functional check
resonant tank current with both the half bridge driving signals. noted compared with the BV rectifiers, ensuring reliable, long term operation. achieving the MOSFETs zero voltage switching (ZVS) operation at turn-on. Figure 9. Resonant stage waveforms at 115 V Figure 10. Rectifier waveforms at 115 V - 50 Hz
therefore, even in this case, its voltage is at ground level. therefore, care must be taken in the layout of the PCB.
4.1 Burst mode operation
voltage ripple during burst mode operation is about 58 mV peak-to-peak. Figure 15. L6699 pin signals-1 Figure 16. L6699 pin signals-2
4.2 Startup
Figure 19. The output voltage reaches the nominal value 600 ms after plug-in. The L6563H, Figure 17. Pout = 250 mW operation Figure 18. Pout = 250 mW operation - detail Figure 19. Startup at 90 Vac - full load Figure 20. Startup at 265 Vac - no load
a small perturbation of the tank current can be observed.
4.3 Overcurrent and short-circuit protection
on and to discharge the soft-start capacitor CSS. Under output short-circuit, this operation results in a nearly constant peak primary current. Figure 21. Startup at full load Figure 22. Startup at full load - detail
4.4 Anti-capacitive mode protection
region, the same correct operation occurs during load and input voltage transients. order for soft-switching to occur (zero-voltage switching, ZVS at turn-on for both MOSFETs). applied voltage, like in circuits having a capacitive reactance, soft-switching would be lost. body diode simultaneously high during part of its recovery. Figure 25. Short-circuit - hiccup mode
breakdown of the parasitic BJT intrinsic in its structure. If a MOSFET is hot, the turn-on threshold of its parasitic BJT is lower, and this dv/dt-induced failure is much more likely. When either MOSFET is turned on, the other one can be parasitically turned on too, if the current injected through its Cgd and flowing through the gate driver's pull-down is large enough to raise the gate voltage close to the turn-on threshold. This would be a lethal shoot- through condition for the half bridge leg. The recovery of the body diodes generates large and energetic negative voltage spikes because of the unavoidable parasitic inductance of the PCB subject to its di/dt. These are coupled to the OUT pin and may damage the L6699. There is a large common-mode EMI generation that adversely affects EMC. Resonant converters work in capacitive mode when their switching frequency falls below a critical value that depends on the loading conditions and the input-to-output voltage ratio. They are especially prone to run into capacitive-mode when the input voltage is lower than the minimum specified and/or the output is overloaded or short-circuited. Designing a converter so that it never works in capacitive-mode, even under abnormal operating conditions, is definitely possible but this may pose unacceptable design constraints in some cases. To prevent the severe drawbacks of capacitive-mode operation, while enabling a design that needs to ensure inductive-mode operation only in the specified operating range, neglecting abnormal operating conditions, the L6699 provides the capacitive-mode detection function. The IC monitors the phase relationship between the tank current circuit sensed on the ISEN pin and the voltage applied to the tank circuit by the half bridge, checking that the former lags behind the latter (inductive-mode operation). If the phase-shift approaches zero, which is indicative of impending capacitive-mode operation, the monitoring circuit activates the OCP procedure so that the resulting frequency rise keeps the converter away from that dangerous condition. Also in this case the DELAY pin is activated, so that the OLP function, if used, is eventually tripped after a time TSH causing intermittent operation and reducing thermal stress. If the phase relationship reverses abruptly (which may happen in the case of dead short at the converter's output), the L6699 is stopped immediately, the soft-start capacitor CSS is totally discharged and a new soft-start cycle is initiated after 50 µs idle time. During this idle period the PFC_STOP pin is pulled low to stop the PFC stage as well.
5 Thermal map
Figure 26. Thermal map at 115 Vac - 60 Hz - full load. Figure 27. Thermal map at 230 Vac - 50 Hz - full load Table 3. Thermal map reference points
Table 3. Thermal map reference points (continued)
6 Conducted emission pre-compliance test
in all test conditions the measurements are well below the limits. Figure 28. CE peak measurement at 115 Vac and full load
Figure 29. CE average measurement at 230 Vac and full load
7 Bill of material
Table 4. Bill of material
Table 4. Bill of material (continued)
these components as D10 and D11, like in the circuit diagram of the EVL6599A-90WADP .
8 PFC coil specifications
8.1 General description and characteristics
- Application type: consumer, home appliance
- Transformer type: open
- Coil former: vertical type, 6+6 pins
- Max. temperature rise: 45 ºC
- Max. operating ambient temperature: 60 ºC
- Mains insulation: n.a.
- Unit finishing: varnished.
8.2 Electrical characteristics
- Converter topology: boost, transition mode
- Core type: PQ26/20-PC44 or equivalent
- Min. operating frequency: 40 kHz
- Typical operating frequency: 120 kHz
- Primary inductance: 520 µH ± 15% at 1 kHz - 0.25 V(a).
8.3 Electrical diagram and winding characteristics
Figure 30. PFC coil electrical diagram a. Measured between pins #5 and #9. Table 5. PFC coil winding data
8.4 Mechanical aspect and pin numbering
- Maximum height from PCB: 22 mm
- Coil former type: vertical, 6+6 pins (pins #1, 2, 4, 6, 7, 10, 12 are removed)
- Pin distance: 3.81 mm
- Row distance: 25 mm
- External copper shield: not insulated, wound around the ferrite core and including the coil former. Height is 8 mm. Connected to pin #3 by a soldered solid wire.
Figure 31. PFC coil mechanical aspect
- MAGNETICA - Italy
- Inductor p/n: 1974.0004.
9 Transformer specifications
9.1 General description and characteristics
- Application type: consumer, home appliance
- Transformer type: open
- Coil former: horizontal type, 7+7 pins, two slots
- Max. temperature rise: 45 ºC
- Max. operating ambient temperature: 60 ºC
- Mains insulation: acc. to EN60065.
9.2 Electrical characteristics
- Converter topology: half bridge, resonant
- Core type: ETD34-PC44 or equivalent
- Min. operating frequency: 60 kHz
- Typical operating frequency: 90 kHz
- Primary inductance: 2.00 mH ± 10% at 1 kHz - 0.25 V(b)
- Leakage inductance: 300 µH at 100 kHz - 0.25 V(c).
9.3 Electrical diagram and winding characteristics
Figure 32. Transformer electrical diagram b. Measured between pins 2-4. c. Measured between pins 2-4 with only one secondary winding shorted.
9.4 Mechanical aspect and pin numbering
- Maximum height from PCB: 30 mm
- Coil former type: horizontal, 7+7 pins (pins #1 and 7 are removed)
- Pin distance: 5.08 mm
- Row distance: 25.4 mm
Figure 33. Transformer overall drawing
- MAGNETICA - Italy
- Transformer p/n: 1860.0076.
Table 6. Transformer winding data
- Secondary windings A and B are in parallel.
- Aux winding is wound on top of primary winding.
Table 7. Document revision history 23-Jul-2012 1 Initial release.