AN4003

AN4003 FAIRCHILD | Alldatasheet

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Rev C, November 1999 November 2,1999 AN4003 PC POWER SUPPLY DESIGN WITH KA3511 Sang-Tae Im 1. GENERAL DESCRIPTION The KA3511 is a fixed-frequency improved-performance pulse-width modulation control circuit with complete housekeeping circuitry for use in the secondary side of SMPS (Switched mode power supply). It contains various functions, which are precision voltage reference, over voltage protec- tion, under voltage protection, remote on/off control, power good signal generator and etc. OVP (Over voltage protection) section It has OVP functions for +3.3V,+5V,+12V and PT outputs. The circuit is made up of a comparator with four detecting inputs and without hysteresis voltage. Especially, PT (Pin16) is prepared for an extra OVP input or another protection signal. UVP (Under voltage protection) section It also has UVP functions for +3.3V, +5V, +12V outputs. The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Remote on/off section Remote on/off section is used to control SMPS externally. If a high signal is supplied to the remote on/off input, PWM signal becomes a high state and all secondary outputs are grounded. The remote on/off signal is transferred with some on-delay and off-delay time of 8ms, 24ms respec- tively. Precision reference section The reference voltage trimmed to ±2% (4.9V<Vref<5.1V) PG (Power good signal generator) section Power good signal generator is to monitor the voltage level of power supply for safe operation of a microprocessor. KA3511 requires few external components to accomplish a complete housekeeping circuits for SMPS. The KA3511 is available in a 22-pin dual in-line package.

Rev C, November 1999

ORDERING INFORMATION

FEATURES

• Complete PWM control and house keeping circuitry  Few external components  Precision voltage reference trimmed to 2%  Dual output for push-pull operation  Each output TR for 200mA sink current  Variable duty cycle by dead time control  Soft start capability by using dead time control  Double pulse suppression logic  Over voltage protection for 3.3V / 5V / 12V  Under voltage protection for 3.3V / 5V / 12V  One more external input for various protection (PT)  Remote on/off control function (PS-ON)  Latch function controlled by remote and protection input  Power good signal generator with hysteresis  22-Pin dual in-line package 2. BLOCK DIAGRAM Device Package Operating Temperature KA3511 22 DIP -25 °C ~ 85°C OSCILLATOR

12 VREF

V3.3 PG REM (PS-ON) E REMOTE ON/OFF 1.4V 1.25V VREF OVP COMP 1.25V UVP COMP GNDTUVP 2.2uF TPG 2.2uF COMP3 1.8V 0.6V 1.8V 0.6V PG GENERATOR VREF Ichag COMP2 COMP1 1.25V 0.1V DEAD TIME CONTROLLER PWM CONTROL Q R S CK DQ Q 1.25V INTERNAL BIAS DET VCC VREF DEAD TIME CONTROL E/A(+) E/A(-) V5 V12 COMP CT RT 22-DIP-400

Rev C, November 1999 3. PIN DESCRIPTION Pin No. Name I/O Function Pin No. Name I/O Function

1 V CC I Supply voltage 12 Vref O Precision reference VTG

2 COMP O E/A output 13 V3.3 I OVP, UVP input for 3.3V

3 E/A(-) I E/A (-) input 14 V5 I OVP, UVP input for 5V

4 E/A(+) I E/A (+) input 15 V12 I OVP, UVP input for 12V

5 TREM – Remote on/off delay 16 PT I Extra protection input

6 REM I Remote on/off input 17 T

UVP – UVP delay 7 RT – Oscillation freq. setting R 18 GND – Signal ground 8 CT – Oscillation freq. setting C 19 DTC I Deadtime control input

9 DET I Detect input 20 C2 O Output 2

10 T PG – PG delay 21 E – Power ground

11 PG O Power good signal output 22 C1 O Output 1

VCC COMPE/A(-) EA(+) TREM REM RT CT DET TP G P G #1 #11 Vref #12 V3.3 #22 V5V12PTTUVPGNDDTCC2EC1

Rev C, November 1999 Pin No. Name Function 1 V CC Supply voltage. Operating range is 14V~30V. VCC =20V, Ta=25°C at test. 2 COMP Error amplifier output. It is connected to non-inverting input of pulse width modulator comparator. 3 E/A(-) Error amplifier inverting input. Its reference voltage is always 1.25V. 4 E/A(+) Error amplifier non-inverting input feedback voltage.This pin may be used to sense power supply output voltage. 5 TREM Remote on/off delay. Ton/Toff=8ms/24ms (Typ.) with C=0.1µF. Its high/low threshold voltage is 1.8V/0.6V. 6 REM Remote on/off input. It is TTL operation and its threshold voltage is 1.4V. Voltage at this pin can reach normal 4.6V, with absolutely maximum voltage, 5.25V. If REM = “Low”, PWM = “Low”. That means the main SMPS is operational. When REM = “High”, then PWM = “High” and the main SMPS is turned-off. 7 RT Oscillation frequency setting R. (Test Condition R T=10kΩ ) 8 CT Oscillation frequency setting C. (Test Condition CT=0.01µF) 9 DET Under-voltage detect pin. Its threshold voltage is 1.25V Typ. 10 T PG PG delay. Td=250ms (Typ) with CPG =2.2µF. The high/low threshold voltage are 1.8V/0.6V and the voltage of Pin10 is clamped at 2.9V for noise margin. 11 PG Power good output signal. PG = “High” means that the power is “Good” for operation and PG = “Low” means “Power fail”. 12 Vref Precision voltage reference trimmed to 2%. (Typical Value = 5.03V) 13 V3.3 Over voltage protection for output 3.3V. (Typical Value = 4.1V) 14 V5 Over voltage protection for output 5V. (Typical Value = 6.2V) 15 V12 Over voltage protection for output 12V. (Typical Value = 14.2V) 16 PT This is prepared for an extra OVP input or another protection signal. (Typical Value = 1.25V) 17 T UVP Timing pin for under voltage protection blank-out time. Its threshold voltage is 1.8V and clamped at 2.9V after full charging. Target of delay time is 250ms and it is realized through external (C=2.2µF). 18 GND Signal ground. 19 DTC Deadtime control input. The dead-time control comparator has an effective 120mV input offset which limits the minimum output dead time. Dead time may be imposed on the output by setting the dead time control input to a fixed voltage, ranging between 0V to 3.3V. 20 C2 Output drive pin for push-pull operation. 21 E Power ground. 22 C1 Output drive pin for push-pull operation.

Rev C, November 1999 4. ABSOLUTE MAXIMUM RATINGS TEMPERATURE CHARACTERISTICS Characteristic Symbol Value Unit Supply voltage V CC 40 V Collector output voltage V C1 , VC2 40 V Collector output current I C1 , IC2 200 mA Power dissipation P D 1 W Operating temperature T OPR -25 to 85 °C Storage temperature T STG -65 to 150 °C Characteristic Symbol Value Unit Min. Typ. Max. Temperature coefficient of Vref (-25 °C<Ta<85°C) ∆Vref/∆T – 0.01 – %/°C

Rev C, November 1999 5. ELECTRICAL CHARACTERISTICS (VCC =20V, TA =25°C) Characteristic Symbol Test Condition Value Unit Min. Typ. Max. REFERENCE SECTION Reference output voltage Vref Iref=1mA 4.9 5 5.1 V Line regulation ∆Vref.LINE 14V<VCC <30V – 2.0 25 mV Load regulation ∆Vref.LOAD 1mA< Iref<10mA – 1.0 15 mV Temperature coefficient of Vref(1) ∆Vref/∆T -25°C< Ta<85°C – 0.01 – %/°C Short-circuit output current I SC Vref=0 15 35 75 mA OSCILLATOR SECTION Oscillation frequency fosc C T=0.01µF, RT=12k – 10 – kHz Frequency change with temperature(1) fosc/T C T=0.01µF, RT=12k – 2 – % DEAD TIME CONTROL SECTION Input bias current I B(DT) – -2.0 -10 µA Maximum duty voltage DC MAX Pin19 (DTC)=0V 45 48 50 % Input threshold voltage V TH(DT) Zero Duty Cycle – 3.0 3.3 V Max. Duty Cycle 0 – – ERROR AMP SECTION Inverting reference voltage Vref(EA) 1.20 1.25 1.30 % Input bias current I B(EA) VCOMP =2.5V – -0.1 -1.0 µA Open-loop voltage gain(1) G VO 0.5V< VCOMP <3.5V 70 95 – dB Unit-gain bandwidth(1) BW – 650 – kHz Output sink current I SINK VCOMP =0.7V 0.3 0.9 – mA Output source current I SOURCE VCOMP =3.5V -2.0 -4.0 – mA PWM COMPARATOR SECTION Input threshold voltage V TH(PWM) Zero Duty Cycle – 4 4.5 V OUTPUT SECTION Output saturation voltage V CE(SAT) I C =200mA – 1.1 1.3 V Collector off-state current I C(off) VCC =V C =30V, VE=0V – 2 100 µA Rising time T R – 100 200 ns Falling time T F – 50 200 ns PROTECTION SECTION Over voltage protection for 3.3V VOVP1 3.8 4.1 4.3 V

Rev C, November 1999 5. ELECTRICAL CHARACTERISTICS (continued) Notes: 1. These Parameters, although guaranteed over their recommended operating conditions are not 100% tested in production. 2. REM on delay time (Pin6 REM: “L” → “H”), REM off delay time (Pin6 REM: “H” → “L”) Characteristic Symbol Test Condition Value Unit Min. Typ. Max. Over voltage protection for 5V VOVP2 – 5.8 6.2 6.6 V Over voltage protection for 12V VOVP3 – 13.5 14.2 15.0 V Input threshold voltage for PT VPT – 1.20 1.25 1.30 Under voltage protection for 3.3V VUVP1 – 2.1 2.3 2.5 V Under voltage protection for 5V VUVP2 – 3.7 4.0 4.3 V Under voltage protection for 12V VUVP3 – 9.2 10 10.8 V Charging current for UVP delay ICHG.UVP C=2.2µF, V TH =1.8V -10 -15 -23 uA UVP Delay Time T D.UVP C=2.2µF 100 260 500 ms REMOTE ON/OFF SECTION REM on input voltage V REMH IREM = -200µA 2.0 – – V REM off input voltage V REML – – – 0.8 V REM off input bias voltage I REML VREM =0.4V – – -1.6 mA REM on open voltage V REM(OPEN) – 2.0 – 5.25 V REM on delay time Ton C=0.1µF 4 8 14 ms REM off delay time Toff C=0.1µF 16 24 34 ms REMOTE ON/OFF SECTION (2) Detecting input voltage V IN(DET) – 1.20 1.25 1.30 V Detecting V5 voltage V 5(DET) – 4.1 4.3 4.5 V Hysteresis voltage 1 HY1 COMP1, 2 10 40 80 mV Hysteresis voltage 2 HY2 COMP3 0.6 1.2 – V PG output load resistor R PG – 0.5 1 2 k Ω Charging current for PG delay ICHG.PG C=2.2µF, VTH =1.8V -10 -15 -23 uA PG delay time T D.PG C=2.2µF 100 260 500 ms PG output saturation voltage V SAT(PG) IPG =10mA – 0.4 0.2 V TOTAL DEVICE Standby supply current I CC –– 1 0 2 0 m A

1. BLOCK DESCRIPTION & APPLICATION INFORMATIONS

6.1 OSCILLATOR BLOCK

Figure 1. Oscillator RT, CT Figure 2. Oscillator Frequency vs. Timing Resistance

6.2 PWM CONTROL BLOCK

Figure 3. PWM Control Block ting the dead time control input to a fixed voltage, ranging between 0V to 3.3V. output on time, dominates control of the loop. comparator, which clocks the pulse-steering flip-flop and inhibits the output transistors, Q1 and Q2. always for push-pull operation. The output frequency is equal to half that of the oscillator.

Figure 4. Operating Waveform

6.3 DEADTIME CONTROL for SOFT -START

Figure 5. Soft-Start Circuit You can make a soft start function by add external components R1, R2 and C1 (refer to figure 5). then go to the low voltage( · = · 105mV) that devided by R1, R2.

So Output Duty Ratio will change from the minimum duty ratio to the maximum duty ratio. dependent on external capacitor C1.

6.4 OUTPUT VOLTAGE REGULATION

Figure 6. Output Regulation Circuit can be changed by set condition and requirements. R5, C1 are the compensation circuit for stability. age will be increased. So the output voltage of power supply will be regulated.

Rev C, November 1999

6.5 OVP BLOCK

OVP function is simply realized by connecting Pin13, Pin14, Pin15 to each secondary output. R1, 2, 3, 4, 5, 6 are internal resistors of the IC. Each OVP level is determined by resistor ratio and the typical values are 4.1V/6.2V/14.2V. OVP Detecting voltage for +3.3V OVP Detecting voltage for +5V OVP Detecting voltage for +12V Especially, pin16 (PT) is prepared for extra OVP input or another protection signal. That is, if you want over voltage protection of extra output voltage, then you can make a function with two exter- nal resistors. OVP Detecting voltage for PT In the case of OVP, system designer should know a fact that the main power can be dropped after a little time because of system delay, even if PWM is triggered by OVP. So when the OVP level is tested with a set, you should check the secondary outputs (+3.3V/+5V/ +12V) and PG (Pin11) simultaneously. you can know the each OVP level as checking each output voltage in just time that PG (Pin11) is triggered from high to low. Vref=5V 13 14 15 R101 R102 PT R1 R3 R5 3.3V 5V 12V R6 1.25V D C BA OVP COMP SET of R/S Latch R102, R102 : External Components VO V OVP 1 +3.3V() R 1 R 2+ R 2 R 1 R 2+ R 2 V OVP 2 +5V() R 3 R 4+ R 4 R 3 R 4+ R 4 V OVP 3 +12V() R 5 R 6+ R 6 R 5 R 6+ R 6 V PT R 101 R 102+ R 102 R 101 R 102+ R 102

Rev C, November 1999

6.6 UVP BLOCK

The KA3511 has UVP functions for +3.3V, +5V, +12V Outputs. The block is made up of three input comparators. Each UVP level is determined by resistor ratio and the typical values are 2.3V/4V/ 10V. UVP Detecting voltage for +3.3V UVP Detecting voltage for +5V UVP Detecting voltage for +12V 13 14 15 Vref=5V SET of R/S Latch R6 1.25V A B C UVP COMP 3.3V 5V 12V V UVP 1 +3.3V() R 1 R 2+ R 2 R 1 R 2+ R 2 V UVP 2 +5V() R 1 R 2+ R 2 R 1 R 2+ R 2 V UVP 3 +12V() R 1 R 2+ R 2 R 1 R 2+ R 2

6.7 REMOTE ON/OFF & DELAY BLOCK

Figure 9. Remote ON/OFF Delay Block transferred to ON/OFF delay block and PG block. If no signal is supplied to Pin6, Pin6 maintains high status (=5V) for Rpull. 8ms) for stabilizing system. Then, all outputs (+3.3V, +5V, +12V) are grounded. (about 24ms) for stabilizing the system. PWM is high and the main SMPS is turned-off. ON/OFF delay Time can be calculated by following equation. tus and main power turns on for on delay time. So you should use 0.1uF or smaller capacitor.

6.8 R/S FLIP FLOP (LATCH) BLOCK

Figure 10. R-S F/F Block Diagram trolled by OVP , UVP, and some delayed remote ON/OFF signal. PWM maintains high status by delayed remote high signal. low, main power becomes operational. When you test KA3511, Remote ON/OFF signal should be toggled once for initializing.

6.9 POWER GOOD SIGNAL GENERATOR

Figure 11. PG Signal Generator Block (about 250ms) for stabilizing outputs. mended values of R11, R12 are external components. malfunction at transient status, thus it improves system stability. becomes “Low” before main power is grounded. ing current and its equation is as following.

Rev C, November 1999 Considering the lightning surge and noise, there are two types of protections. One is a few sec- onds delay between TPG and PG for safe operation and another is some noise margin of Pin10. Noise_Margin_of_TPG = V10(max) – Vth(L) = 2.9V – 0.6V = 2.3V 7. ABOUT TEST METHOD You can verify the KA3511 with a SMPS set. But you should pay attention to the device damage problem by increasing VCC . You should remove the sub-board after +5Vsb drops to 0V and VCC of KA3511 is grounded and then fan stops under the Remote Low. – OVP function of +3.3V/+5V/+12V You can test OVP for +3.3V/+5V/+12V by shorting Pin16 and Pin17 to GND. – UVP function of +3.3V/+5V/+12V You can simply test UVP for +3.3V/+5V/+12V by shorting Pin16 to GND. – OVP input threshold voltage for PT The test condition is remote “Low” and you increase the supply voltage of pin16 using a DC power supply. When the voltage is over 1.2 x V, main power supply will shutdown. So, you can measure the shutdown point of main power supply, and that will be a OVP input threshold volt- age for PT. – Remote On/Off delay time You can measure the time difference of remote On/Off and the main power supply output as toggling the remote On/Off. – PG delay time In AC power-on time, secondary outputs are turned on and then after some delay time PG out- put is triggered from low to high. You can measure the time difference of +5V and PG in turn-on time.

Rev C, November 1999 8. HOUSE KEEPING CIRCUIT Using the KA3511 requires few external components to accomplish a complete housekeeping cir- cuits for SMPS. VCC COMP E/A(-) E/A(+) REM RT CT DET TPG PG TREM E DTC GND TUVP PT V12 V3.3 Vref 2kΩ (1W) 15kΩ 0.01uF 12kΩ 2.2uF 1uF 2.2uF 2kΩ (1W) 11kΩ 33kΩ 1.8kΩ 0.1uF 1kΩ 0.01uF PG Micom 12V Standby Supply VCC=20V 12V K A

Rev C, November 1999 9. TYPICAL CHARACTERISTICS VCC-ICC Bandgap Reference Voltage PIN19(Dead Time Control Voltage)-Duty Cycle OVP for 3.3V OVP for 5V OVP for 12V Temperature Characteristic 0.014 0.012 0.010 0.008 0.006 0.004 0.002 0.000 01 02 03 04 0 Supply Voltage [V] Deadtime Control Voltage [V] ICC [A] Duty Ratio [%] 31.1% 21.8% 12.8% V5 [V] 5.010 5.008 5.006 5.004 5.002 -40 -20 0 20 40 60 80 100 120 140 TEMP [°C] Vref [V] VPG [V] V3.3 [V] VPG [V] V12 [V] VPG [V]

Rev C, November 1999 OVP for PT UVP for 3.3V UVP for 5V UVP for 12V Remote ON Charging Current REM ON/OFF Vth Vpt [V] VPG [V] VPG [V] Pin 13 (V3.3) Voltage [V] 21 22 23 24 25 VPG [V] Pin 14 (V5) Voltage [V] Pin 15 (V12) Voltage [V] VPG [V] 012345 VPG [V] Vrem [V] -0.000016 -0.000018 -0.000020 -0.000022 -0.000024 0 50 100 150 200 250 Irem [A]

Rev C, November 1999 Remote ON Open Voltage Detecting VCC Voltage (DET) Detecting V5 Voltage Charging Current for PG Short Circuit Current Hysteresis Voltage 2 0 012345 Vrem [V] VPG [V] -0.000005 -0.000010 -0.000015 -0.000020 0 20 40 60 80 100 120 140 160 IPG [V] Pin 14 (5V) Voltage [V] VPG [V] -0.032 -0.033 -0.034 -0.035 0 100 200 300 400 Iref [A] VPG [V] Pin 9 (DET) Voltage [V] Pin 10 (TPG) Voltage [V]

Rev C, November 1999 Error Amp Sink Current Reference Voltage 0.002 0.00 -0.002 -0.004 -0.006 -0.008 0 20 40 60 80 100 120 140 Isink & Isource [A] 01 02 0 3 04 0 Vref [V] Supply Voltage [V]

Rev C, November 1999 10. PACKAGE DIMENSION 11 12 9.14 ±0.20 10.16 0.400 2.54 0.100 0.360 ±0.008 0~15° 0.25 +0.10 –0.05 0.010 +0.004 –0.002 3.40 ±0.30 0.134 ±0.012 3.81 ±0.20 0.150 ±0.008 27.49 ±0.20 1.082 ±0.008 27.90 1.098MAX 5.08 0.200 0.51 0.020 MAX MIN 1.05 0.041() 0.46 ±0.10 0.018 ±0.0040.060 ±0.004 1.52 ±0.10 22-DIP-400

Rev C, November 1999 12. APPLICATION CIRCUIT Reference 1. Power Electronics by Marvin J. Fisher 2. Principles Of Power Electronics by Kassakian AUTHOR: Sang-Tae Im: P-IC Application Team Tel. 82-32-680-1275 Fax. 82-32-680-1317 E-mail. sangtae.im@Fairchildsemi.co.kr 22uF +2.2uF IC1 AR3511X Vcc1 C1 22 COMP2 E 21 E/A(-)3 C2 20 DTC 19E/A(+)4 TREM5 GND 18 REM6 TUVP 17 RT7 PT 16 CT8 V12 15 DET9 V5 14 TPG10 V3.3 13 PG11 Vref 12 CT 15K 70K 47K 1.2K 56K 100K 103 0.1uF+ C16 2.2uF+ 103 D19 VR1 5V OUT 12V OUT POWER ON OUT REF PG 3.3V OUT VCC

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