AN390 STMICROELECTRONICS | Alldatasheet

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Technical content

The AC line voltage around the world varies widely. Power supply designers may overcome this problem by using a doubler / bridge switch to double the 120 V nominal AC line voltage, in case the application is plugged on 120 V AC mains. In case of operation on the 230 V AC line voltage, the doubler switch is non-active. Thus, the input voltage of the application power supply after the rectifier bridge is always close to the peak line voltage of 230 V AC line whatever is the real line voltage. The AVS kit is used to regulate the input voltage of power supplies which are mainly switched mode power supplies (SMPS). AVS kit still allows EMC standard compliance (inrush current limitation, conducted noise, noise immunity) as soon as a proper circuit is designed. AVS8, AVS10 and AVS12 are automatic AC line voltage selectors used in full range switch mode power supply (SMPS). These automatic line voltage selectors are made of two devices, an integrated circuit (IC) and a customized Triac. The Triac automatically modifies the structure of the input diode bridge to keep the same DC voltage range thanks to the IC control. The purpose of this document is to describe the AVS kit features and explain how to adapt the power supply to various nominal line voltages. This document also provides technical recommendations in terms of how to implement the AVS kit in the application.

1 Doubler / bridge circuit principle

  • 100-120 V nominal rms voltage, 50 Hz and/or 60 Hz systems (for example for Japan or USA). Electronic equipment is usually designed to run in the 88 to 132 V range.
  • 220-240 V nominal rms voltage, 50 Hz and/ or 60 Hz systems (for example for Europe or South Korea). Equipment has to be designed to run in the 184 to 276 V range. The doubler / bridge circuit principle is shown in Figure 1. There are two modes according to the AC line voltage:
  • Doubler mode: When the AC input voltage is in the 100 to 120 V range, the switch S1 is closed. During the positiv e half cycle of the AC line voltage, the C1 capacitor is charged to the peak line voltage. During the negative half cycle of the AC line voltage, the C2 capacitor is also charged to the peak line voltage. The voltage across series association of C1 and C2 (V OUT) is then equal approximately to twice the peak line voltage.
  • Bridge mode: When the line voltage is in the 220 to 240 V range, the switch S1 is open. C1 and C2 capacitors are simultaneously charged during each AC line half- cycle. V OUT is then around the peak line voltage thanks to the diode bridge.

Figure 1. Doubler / Bridge circuit principle

2 AVS description

2.1 Kit description

The AVS kit circuit replaces the traditional manual switch found in some appliance power supplies. This circuit eliminates SMPS failures incurred by inadvertently positioning the mechanical switch in the wrong position. This solution improves the power supply reliability with a reduced size and a low cost solution. The AVS kit is composed of two devices:

  • A Triac specially designed for this application. This Triac is called AVS08CB or AVS10CB orAVS12CB in a TO220 package.
  • A controller (AVS1ACP08 or AVS1BCP08) which senses the AC line voltage. This IC is optimized for low consumption and high security triggering of the Triac. The IC controller is available in an 8 pin DIPS package. There are three AVS kits each dedicated to a particular power range:
  • AVS08: Used for SMPS < 200 W. AVS08 is composed of an AVS1BCP08 controller and an AVS08CB Triac.
  • AVS10: Used for SMPS up to 300 W. AVS10 is composed of an AVS1ACP08 controller and an AVS10CB Triac.
  • AVS12: Used for SMPS up to 500 W. AVS12 is composed of an AVS1ACP08 controller and an AVS12CB Triac.

2.2 AVS implementation

A typical application diagram for the AVS is shown in Figure 2 and Figure 3. Figure 2 defines the application schematic with a DC resistive power supply (D1, R5, R6, C2) and Figure 3 defines the application schematic with a capacitive power supply (D1, D2, R5, C2, C3). To reduce the standby power supply the capacitive power supply is preferred. Component values used with the AVS kit are defined in Appendix A. Appendix B defines the printed AVS board. The AC switch automatically modifies the structure of the input diode bridge to keep the same DC voltage range. The AVS is compatible with 50 and 60 Hz mains frequency and operates on two mains voltage ranges:

  • On range I (100 to 120 V rms): The AC line rms voltage can vary from 88 to 132 V and the Triac remains on. The bridge operates as a voltage doubling circuit.
  • On range II (220 to 240 V rms): The AC line voltage varies from 184 to 276 V and the Triac is off. The circuit operates as a full wave bridge.

Note T2, RG, R Lim, C_ Lim and D Lim are components which define the inrush current limiter circuit. A non-sensitive T2 Triac must be used to ensure a good dV/dt characteristic. R Lim resistor is short circuited by the Triac just after the power supply is started. This to limit the power losses of the power supply compare to the classical solution with NTC thermistor.

2.3 IC power supply

The DC power supply of the AVS can be implemented with a DC resistive or a capacitive power supply. The series circuit D 1, R5, R6 and C2 define the DC resistive power supply (see Figure 2). The series circuit D 1, D2, R5, C3 and C2 define the DC capacitive power supply (see Figure 3). To reduce the standby power supply a DC capacitive power supply is preferred. Pin 1 of the AVS IC, VSS, is a shunt regulator that provides a -9 V (typ.) output. The structure of the supply regulator is a shunt regulator and its current must be lower than 30 mA. In order to have good behavior of the circuit against mains voltage spikes, pin 4 (V DD) of the integrated circuit has to be connected directly with A1 of the Triac. Equation 1 and Equation 2 define respectively R5 and R6 resistors value for the DC resistive power supply and C3 capacitor value for the capacitive power supply. ICI is the average current supplied to the IC in doubler mode. As the Triac gate current is pulsed the ICI is equal to 3 mA. Equation 1 Equation 2 Equation 3 and Equation 4 define the power dissipated respectively by the DC resistive and capacitive power supply without considering the losses through the diode and the AVS IC voltage regulator. Equation 3 Equation 4 CI MinRMS I VRR Max CI MinRMS Min RI VF C - π π () 65 Min MaxRMS R_Max RR VP () () () () MaxMax Min MaxRMS MaxC_Max CF R VRP

  • •• π
  • F is the AC line frequency
  • R5 and R6 are the supply resistors for the DC resistive power supply
  • R5 the inrush limiter for the DC capacitive power supply
  • VRMS_Min the minimum rms AC line voltage
  • C2 the bulk capacitor
  • C3 the supply capacitor for the DC capacitive power supply Table 1 gives the components value of the DC resistive and capacitive power supplies whatever the AC line voltage value.

2.4 AVS block description

Figure 4. AVS block diagram Table 1. DC resistive and capacitor power supply components value

1 Watt

1 Watt 33 µF at 16 V 10% Not applicable

2 Watt Not applicable 33 µF at 16 V 10% 220 nF at 400V AC

2.4.1 Parasitic filter

2.4.2 Gate current pulses

2.4.3 AVS start up

Figure 5. Power on reset description triggering respectively with a resistive ( Figure 2) and capacitive power supply ( Figure 3). razht = 0.89 • Vreg) of the IC control and the delay of 8 mains periods.

  • +-•
  • +•• = FMin Iss_qcRRMinVrms CRRVregtd sistive 89.0 2_Max65 Re π

With:

  • F the AC line frequency
  • R5 and R6 the supply resistors for the DC resistive power supply
  • R5 the inrush limiter for the DC capacitive power supply
  • VRMS_Min the minimum rms AC line voltage
  • C2 the bulk capacitor
  • Vreg the voltage regulated
  • ISS_qc the quiescent supply current of the AVS circuit = 0.7 mA With the component values define in Appendix A or in Table 1, the delay time is around 250 ms for a DC resistive and a capacitive power supply in the worst case.

2.4.4 AC line voltage detection

The Triac control is implemented through a comparison of the AC line voltage (V M on pin 8) with an internal threshold voltage (VTH). When the AC mains voltage increases from range I to range II the Triac gate current is removed. The doubler circuit is turned off within one mains period (The Triac can only turn off when its current reach zero). That means the delay between line voltage increase and doubler circuit turn-off can reach up to 16.7 ms or 20 ms respectively for 60 and 50 Hz operations. Equation 7 defines the condition on the voltage across the pin 8 of the IC control to remove the Triac gate pulses (bridge mode). Equation 8 defines the condition on the voltage across the pin 8 of the IC control to apply the Triac gate pulses (doubler mode). Equation 7 Equation 8 With V TH typ = 4.25 V and VH typ = 0.4 V When the mains voltage drops from range II to range I there are two options according to the pin 7 level. Typical timing diagrams for the two modes are given in Figure 6 and Figure 7. = F Iss_qc C R MinVrms CVregtdCapacitive 89.0 3_Min Min 5_Max 2_Max π π THM VV> thres1(V ) thres2(VHTHM VVV- < )

The AC line voltage measurement is implemented through the detection of the AC line peak voltage. R1 and R2 resistor values are defined according Equation 9, Equation 10 and Equation 11. Equation 9 defines the condition for R1 and R2 resistors to limit the power dissipation and to improve the AC line voltage measurement. Equation 9 Equation 10 defines R1 and R2 resistors to switch from doubler operation to bridge operation (from range I to range II). Equation 10 Where:

  • VREG typ = -9 V
  • VTH typ = 4.25 V Equation 11 defines R1 and R2 resistors to switch from bridge operation to doubler operation (from range II to range I). Equation 11 Where:
  • VREG typ = -9 V
  • VTH typ = 4.25 V
  • VH typ = 0.4 V For rms voltage on range I (110 V) and II (230 V) R2 and R1 resistor values are respectively 18 kΩ and 1 MΩ at 1%. Ω<+<Ω MRRk2800 21 2 -•-= TH REG V VIrangeonvoltagermsMaxR R ( ( 2 --= TH REG V VIIrangeonvoltagermsMaxR R HV-( (

AN390 Thermal rating of Triac

3 Thermal rating of Triac

The knowledge of the maximum Triac current ITM and the current pulse width tp in the worst case conditions allows the definition of the Triac power dissipation (see Equation 12 and Equation 13). Where:

  • ITRMS is the rms Triac current
  • Vt0 the threshold voltage of the Triac
  • Rt the on state of the Triac
  • F the AC line frequency. Equation 12 With Equation 13 Equation 14 and Equation 15 define the junction temperature of the Triac according to the ambient to junction thermal resistance and case to junction thermal resistance. Equation 14 Equation 15 For example, Figure 8 (left) gives losses PT versus ITRMS for this application dedicated for the AVS10CB Triac. Figure 8 (right) allows the evaluation of the external heat sink R TH versus PT and Tamb when Tj = 110 °C for the same Triac. These curves come from Equation 10, Equation 11, Equation 12 and Equation 13. ()()

4 Mpt

π FtITIT pMRMS ••= () TACcjTHCJ PRTT •=- - () TacTHambC PRTT •=- -

Figure 8. AVS thermal management the maximum operating ambient temperature (T a) could be 70 °C.

4 Conclusion

This paper describes an efficient way of implementing an automatic doubler/bridge circuit. The primary use of this circuit is in 75 W to 500 W SMPS. Other innovative uses are possible. The main advantages of the AVS solution are:

  • High efficiency: Losses are just 2 W vs. 5 to 10 W for discrete schemes.
  • Safety: Uses digital spike suppression, hysteresis, validation of range, a failsafe mode and good control.
  • Space optimization: Small supply resistor and good reliability.
  • Ease of use: Eliminates errors when the line range has to be selected manually by the end user.
  • Available solutions for various power ranges: – AVS08 < 200 W – AVS10 up to 300 W – AVS12 up to 500 W

Table 2. AVS bill of material

5 Revision history

Table 3. Document revision history 10-May-2004 2 Stylesheet update. No content change. rating of the Triac.Added AVS08.