AN3371 STMICROELECTRONICS | Alldatasheet
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Technical content
Datasheet sections
- 1 Overview of the STM32 advanced RTC
- 1.1 RTC calendar
- 1.1.1 Initializing the calendar
- 1.1.2 RTC clock configuration
- 1.2 RTC alarms
- 1.2.1 RTC alarm configuration
- 1.2.2 Alarm sub-second configuration
- 1.3 RTC periodic wakeup unit
- 1.3.1 Programming the Auto-wakeup unit
- 1.3.2 Maximum and minimum RTC wakeup period
- 1.4 RTC digital calibration
- 1.4.1 RTC coarse calibration
- 1.4.2 RTC smooth calibration
- 1.5 Synchronizing the RTC
- 1.6 RTC reference clock detection
- 1.7 Time-stamp function
- 1.8 RTC tamper detection function
- 1.8.1 Edge detection on tamper input
- 1.8.2 Level detection on tamper input
- 1.8.3 Active time-stamp on tamper detection event
- 1.9 Backup registers
- 1.10 RTC and low-power modes
- 1.11 Alternate function RTC outputs
- 1.11.1 RTC_CALIB output
- 1.11.2 RTC_ALARM output
- 1.12 RTC security aspects
- 1.12.1 RTC register write protection
- 1.12.2 Enter/exit initialization mode
- 1.12.3 RTC clock synchronization
- 2 Advanced RTC features
- 3 RTC firmware driver API
agendas, and many other devices. alarm, periodic wakeup unit, tamper detection, timestamp and calibration applications. and calibration applications. and F4 series devices in this document. microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. STM32L162xx microcontrollers where the Flash memory density is 384 Kbytes. STM32F3xx refers to STM32F30x, STM32F31x, STM32F37x and STM32F38x devices. F4 series are STM32F405xx, STM32F407xx, STM32F415xx and STM32F417xx microcontrollers. F0 series devices are microcontrollers. Table 1 lists the microcontrollers concerned by this application note. Table 1. Applicable products
1 Overview of the STM32 advanced RTC
1.1 RTC calendar
- Calendar with: – sub-seconds (not programmable) – seconds – minutes – hours in 12-hour or 24-hour format – day of the week (day) – day of the month (date) –m o n t h – year
- Calendar in binary-coded decimal (BCD) format
- Automatic management of 28-, 29- (leap year), 30-, and 31-day months
- Daylight saving time adjustment programmable by software
Figure 1. RTC calendar fields
- RCT_DR, RTC_TR are RTC Date and Time registers.
- The sub-second field is the val ue of the synchronous prescaler’s counter. This field is not writable.
space and are CPU-time consuming, which may be critical in certain real-time applications. because their functions are performed by hardware. be critical in certain real-time applications. Figure 2. Example of calendar display on an LCD
1.1.1 Initializing the calendar
Table 2 describes the steps required to correctly configure the calendar time and date. Table 2. Steps to initialize the calendar
1 Disable the RTC registers Write
2 Enter Initialization mode Set INIT bit to ‘1’ in
4 Program the prescalers register
5 Load time and date values in
6 Configure the time format (12h
7 Exit Initialization mode Clear the INIT bit in
8 Enable the RTC Registers
1.1.2 RTC clock configuration
Figure 3. STM32L1xx RTC clock sources Figure 4. STM32F2xx or STM32F4xx RTC clock sources regardless of the clock source.
Figure 5. Prescalers from RTC clock source to calendar unit
- RTCCLK can be any clock source: HSE_RTC, LSE or LSI
- PREDIV_A can be 1,2,3,..., or 127
- PREDIV_S can be 0,1,2,..., or 8191 Table 3 shows several ways to obtain the calendar clock (ck_spre) = 1 Hz. Synchronous 13-bit prescaler (default=256) RTC Clock PREDIV_A PREDIV_S Ck_SpreAsynchronous prescaler Synchronous prescaler Calendar unit MS19527V1 Asynchronous 7-bit prescaler (default = 128) Shadow registers (RTC_TR and RTC_DR)
Table 3. Calendar clock equal to 1 Hz with different clock sources
- For STM32L1xx, LSI = 37 KHz, but LSI accu racy is not suitable for calendar application.
- For STM32F2xx and STM32F4xx, LSI = 32 KHz, but LS I accuracy is not suitable for calendar application.
1.2 RTC alarms
1.2.1 RTC alarm configuration
generated at a given time or/and date programmed by the user. make it easy to configure and display these alarms settings.
- Fully programmable alarm: sub-second (this is discussed later), seconds, minutes, hours and date fields can be independently selected or masked to provide a rich combination of alarms.
- Ability to exit the device from low power modes when the alarm occurs.
- The alarm event can be routed to a specific output pin with configurable polarity.
- Dedicated alarm flags and interrupt.
Figure 6. Alarm A fields
- RTC_ALRMAR is an RTC register. The same fields are also available for the RTC_ALRMBR register.
- RT_ARMASSR is an RTC register. The same field is also available for the RTC_ALRMBR register.
- Maskx are bits in the RTC_ALRMAR register that enable/disable the RTC_ALARM fields used for alarm A
and calendar comparison. For more details, refer to Table 5.
- Mask ss are bits in the RTC_ALRMASSR register.
indicate that an alarm event occurred. alarms. For more details, refer to Table 5. Table 4 describes the steps required to configure alarm A.
RTC_ALRMAR register for alarm A (RTC_ALRMBR register for alarm B). 23:15:07 on Monday (assuming that the WDSEL = 1), MSKx bits must be set to 0000b. the day number and not the day of the week, and MSKx bits must be set to 0000b. Table 4. Steps to configure the alarm
2 Disable alarm A Clear ALRAE
- Respectively ALRBE bit for alarm B.
3 Check that the RTC_ALRMAR
- Respectively ALRBWF bit for alarm B.
4 Configure the alarm
- Respectively RTC_ALRMBR register for alarm B.
- As an example, if the alarm is configured to occu r at 3:00:00 PM, the alarm will not occur even if the
calendar time is 15:00:00, because the RTC calendar is 24-hour format and the alarm is 12-hour format.
5 Re-enable alarm A Set ALRAE(5) bit in
- Respectively ALRBE bit for alarm B.
- RTC alarm registers can only be written when t he corresponding RTC alarm is disabled or during RTC
6 Enable the RTC registers Write
Table 5. Alarm combinations
0000 All fields are used in alarm comparison:
Alarm occurs at 23:15:07, each Monday.
0001 Seconds do not matter in alarm comparison
The alarm occurs every second of 23:15, each Monday.
0011 Minutes and seconds do not matter in alarm comparison
0100 Hours do not matter in alarm comparison
0101 Hours and seconds do not matter in alarm comparison
least 3 to ensure a correct behavior.
1.2.2 Alarm sub-second configuration
similar. They generate alarms with a high resolution (for the second division). sub-second field in the calendar unit. prescaler to zero, and then reloads a value in the RTC_SPRE register. Figure 7. Alarm sub-second field synchronous prescaler register.
0110 Hours and minutes do not matter in alarm comparison
0111 Hours, minutes and seconds do not matter in alarm comparison
The alarm is set every second, each Monday, during the whole day.
1000 Week day (or date, if selected) do not matter in alarm comparison
Alarm occurs all days at 23:15:07.
1001 Week day and seconds do not matter in alarm comparison
1010 Week day and minutes do not matter in alarm comparison
1011 Week day, minutes and seconds do not matter in alarm comparison
1100 Week day and hours do not matter in alarm comparison
1101 Week day, hours and seconds do not matter in alarm comparison
1110 Week day, hours and minutes do not matter in alarm comparison
1111 Alarm occurs every second
Table 5. Alarm combinations (continued)
- Select LSE as the RTC clock source (for example LSE = 32768 Hz).
- Set the Asynchronous prescaler to 127.
- Set the Synchronous prescaler to 255 (the Calendar clock is equal to 1Hz).
- Set the alarm A sub-second to 255 (put 255 in the SS[14:0] field). Note: The overflow bits in the sub-second register bit (15,16 and 17) are never compared.
Table 6. Alarm sub-second mask combinations activated when the second unit is incremented.
1 Only the AlarmA_SS[0] bit is compared to the RTC sub-second
2 Only the AlarmA_SS[1:0] bit is compared to the RTC sub-second
3 Only the AlarmA_SS[2:0] bit is compared to the RTC sub-second
4 Only the AlarmA_SS[3:0] bit is compared to the RTC sub-second
5 Only the AlarmA_SS[4:0] bit is compared to the RTC sub-second
6 Only the AlarmA_SS[5:0] bit is compared to the RTC sub-second
7 Only the AlarmA_SS[6:0] bit is compared to the RTC sub-second
8 Only the AlarmA_SS[7:0] bit is compared to the RTC sub-second
9 Only the AlarmA_SS[8:0] bit is compared to the RTC sub-second
10 Only the AlarmA_SS[9:0] bit is compared to the RTC sub-second
11 Only the AlarmA_SS[10:0] bit is compared to the RTC sub-second
12 Only the AlarmA_SS[11:0] bit is compared to the RTC sub-second
13 Only the AlarmA_SS[12:0] bit is compared to the RTC sub-second
14 Only the AlarmA_SS[13:0] bit is compared to the RTC sub-second
15 Only the AlarmA_SS[14:0] bit is compared to the RTC sub-second
1.3 RTC periodic wakeup unit
modes to reduce the power consumption.
- Programmable downcounting auto-reload timer.
- Specific flag and interrupt capable of waking up the device from low power modes.
- Wakeup alternate function output which can be routed to RTC_ALARM output (unique pad for alarm A, alarm B or Wakeup events) with configurable polarity.
- A full set of prescalers to select the desired waiting period.
1.3.1 Programming the Auto-wakeup unit
Table 7 describes the steps required to configure the Auto-wakeup unit. Table 7. Steps to configure the Auto-wakeup unit
1 Disable the RTC registers Write protection
3 Ensure access to Wakeup auto-reload
counter and bits WUCKSEL[2:0] is allowed.
2 RTCCLK clock cycles
RTC wakeup period5 Select the desired clock source.
7 Enable the RTC registers Write protection Write "0xFF" into the
1.3.2 Maximum and minimum RTC wakeup period
The wakeup unit clock is configured through the WUCKSEL[2:0] bits of RTC_CR1 register.
- Configuration 1: WUCKSEL[2:0] = 0xxb for short wakeup periods (see Periodic timebase/wakeup configuration for clock configuration 1)
- Configuration 2: WUCKSEL[2:0] = 10xb for medium wakeup periods (see Periodic timebase/wakeup configuration for clock configuration 2)
- Configuration 3: WUCKSEL[2:0] = 11xb for long wakeup periods (see Periodic timebase/wakeup configuration for clock configuration 3) Periodic timebase/wakeup configuration for clock configuration 1 Figure 8 shows the prescaler connection to the timebase/wakeup unit and Table 8 gives the timebase/wakeup clock resolutions corresponding to configuration 1. The prescaler depends on the Wakeup clock selection:
- WUCKSEL[2:0] =000: RTCCLK/16 clock is selected
- WUCKSEL[2:0] =001: RTCCLK/8 clock is selected
- WUCKSEL[2:0] =010: RTCCLK/4 clock is selected
- WUCKSEL[2:0] =011: RTCCLK/2 clock is selected
Figure 8. Prescalers connected to the timebase/wakeup unit for configuration 1
- The minimum timebase/wakeup period is (0x0001 + 1) x 61.035 µs = 122.07 µs. The timebase/wakeup timer counter WUT[15:0] cannot be set to 0x0000 with WUCKSEL[2:0]=011b (fRTCCLK/2) because this configuration is prohibited. Refer to the STM32 reference manuals for more details.
- The maximum timebase/wakeup period is (0xFFFF+ 1) x 488.28 µs = 2 s.
Table 8. Timebase/wakeup unit period resolution with clock configuration 1
configuration, are listed in Table 10.
- These values are calculated when RTCCLK = 32768 Hz
1.4 RTC digital calibration
1.4.1 RTC coarse calibration
asynchronous prescaler (ck_apre). ranges from -63 ppm to 126 ppm. Figure 10. Coarse calibration block output is after the coarse calibration block. Refer to Table 15: Advanced RTC features. Note: The calibration settings can only be changed during initialization. The full calibration cycle lasts 64 minutes. configuration) of the calibration cycle. order to minimize the impact of the error brought by the change on the final accuracy. Table 10. Min. and max. timebase/wakeup period when RTCCLK= 32768
512 Hz AFO_CALIB
compensation of the quartz variations due to external temperature changes). The reference clock calibration and the coarse calibration cannot be used together. Caution: Digital coarse calibration may not work correctly if PREDIV_A < 6.
1.4.2 RTC smooth calibration
about 0.954 ppm with a range from -487.1 ppm to +488.5 ppm. oscillators due to temperature, crystal aging. Figure 11. Smooth calibration block AFO_CALIB signal, depending on the products. Refer to Table 15: Advanced RTC features. well distributed in a configurable window (8 s, 16 s or 32 s). results in exactly one pulse being masked for 32 seconds. results in exactly 4 pulses being masked for 32 seconds. pulses can be added for 32 seconds (calibration window). When the asynchronous prescaler is less than 3, CALP cannot be set to 1.
temperature changes or if other factors are detected.
- Calibration using the AFO_CALIB (512 Hz or 1 Hz).
- Calibration using the sub-second alarms.
- Calibration using the Wakeup timer.
1.5 Synchronizing the RTC
Figure 12. RTC shift register few fractions from the calendar counter. Advance (seconds) = (1 - (SUBFS / (PREDIV_S + 1))).
1.6 RTC reference clock detection
be used to compensate the imprecision of the calendar frequency (1 Hz). The RTC_50Hz pin should be configured in input floating mode. This mechanism enables the calendar to be as precise as the reference clock. The reference clock detection is enabled by setting REFCKON bit of the RTC_CR register. their default values: PREDIV_A = 0x007F and PREVID_S = 0x00FF . but in the long term it must be much more precise than 32 kHz quartz. which brings no error as it is smaller than the reference clock period. (1.53 minute per month for 35 ppm quartz). Figure 13. RTC reference clock detection Note: The reference clock calibration and the coarse calibration cannot be used together. always available. If the 50 Hz input is lost, the LSE can be used. The reference clock detection cannot be used in Vbat mode. The reference clock calibration can only be used if you provide a precise 50 or 60 Hz input.
1.7 Time-stamp function
The Time-stamp feature provides the means to automatically save the current calendar. Figure 14. Time-stamp event procedure occurs, the time-stamp flag bit (TSF) in RTC_ISR register is set. Table 15: Advanced RTC features. Table 11. Time-stamp features
1.8 RTC tamper detection function
configured and each one has an individual flag (TAMPxF bit in RTC_ISR register).
1.8.1 Edge detection on tamper input
rising edge or a falling edge is observed on the corresponding TAMPLEVEL bit.
- TSF is set 2 ck_apre cycles after the time-stamp event occurs due to the synchronization
- To avoid masking a time-stamp event occurring at the same moment, the application must not
write ‘0’ into TSF bit unless it has already read it to‘1’.
- A time-stamp overflow event is not connected to an interrupt.
- There is no delay in the setting of TSOVF. This means that if two time-stamp events are close
to poll TSOVF only after TSF has been set. Table 11. Time-stamp features (continued)
Figure 15. Tamper with edge detection Note: With tamper events, sampling and precharge features are deactivated.
1.8.2 Level detection on tamper input
consecutive samples are observed at the selected level. Table 12. Tamper features (edge detection) in RTC_TAFCR register The default edge is rising edge. pin can be either PI8 or PC13. tamper detection event occurs.
1.8.3 Active time-stamp on tamper detection event
Note: It is not necessary to enable or disable the time-stamp function when using this feature.
1.9 Backup registers
1.10 RTC and low-power modes
calendar are divided into synchronous and asynchronous. Increasing the value of the asynchronous prescaler reduces the power consumption. Table 13. Tamper features (level detection) RTC_TAFCR register Default value is 0. tamper detection event occurs.
Overview of the STM32 advanced RTC AN3371 26/45 Doc ID 018624 Rev 5 The RTC keeps working in reset mode and its registers are only reset by a VDD or VBAT power-on, if both supplies have previously been powered off or the Backup Domain is reset on STM32F2xx devices. Registers are only reset by a power-on reset. RTC register values are not lost after a reset and the calendar keeps the correct time and date. After a system reset or a power-on reset, the STM32 operates in Run mode. In addition, the device supports five low power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources. The RTC peripheral can be active in the following low power modes:
- Sleep mode
- Low power Run mode (only for ULPM and ULPH density devices)
- Low power Sleep mode (only for ULPM and ULPH density devices)
- Standby mode
- Stop mode Refer to the low power modes section of the STM32 reference manuals for more details about low power modes.
1.11 Alternate func tion RTC outputs
The RTC peripheral has two outputs:
- RTC_CALIB, used to generate an external clock.
- RTC_ALARM, a unique output resulting from the multiplexing of the RTC alarm and wakeup events.
1.11.1 RTC_CALIB output
The RTC_CALIB output is used to generate a variable-frequency signal. Depending on the user application, this signal can play the role of a reference clock to calibrate an external device, or be connected to a buzzer to generate a sound. The signal frequency is configured using the 7 LSB bits (PREDIV_A [6:0]) of the asynchronous prescaler PREDIV_A[7:0]. RTC_CALIB is the output of bit 4 of the 7-bit asynchronous prescaler PREDIV_A. If PREDIV_A[5]=0, no signal is output on RTC_CALIB. Setting 512 Hz as the output signal 1. Select LSE “32768 Hz” as RTC clock source. 2. Set the asynchronous prescaler to the default value “128“. 3. Enable the output calibration by setting “COE” to ‘1’. 4. Select 512 Hz as the calibration output by setting CALSEL to ‘0’.
- Select LSE “32768 Hz” as the RTC clock source.
- Set the asynchronous prescaler to the default value “128“.
- Set the synchronous prescaler to the default value “256“.
- Enable the output calibration by setting “COE” to ‘1’.
- Select 1 Hz as the calibration output by setting CALSEL to ‘1’.
Figure 18. RTC_CALIB clock sources divider factor is configured using bits PREDIV_A[6:0] of the RTC_PRER register. RTC_CALIB maximum and minimum frequencies are 31.250 kHz and 500 Hz, respectively. Table 14. RTC_CALIB output frequency versus clock source
- PREDIV_A[5] must be set to ‘1’ to enable the RTC_CALIB output signal generation. If PREDIV_A[5] bit is zero, no signal
- For STM32L1xx, LSI = 37 KHz.
500 Hz 1 KHz
- For STM32F2xx and STM32F4xx, LSI = 32 KHz.
1.11.2 RTC_ALARM output
external action, or routed to the RTC wakeup unit to wake up an external device. when the selected alarm flag is cleared. Figure 19. Alarm flag routed to RTC_ALARM output long as the flag is not cleared.
Figure 20. Periodic wakeup routed to RTC_ALARM pinout
1.12 RTC security aspects
1.12.1 RTC register write protection
- Write 0xCA into the RTC_WPR register.
- Write 0x53 into the RTC_WPR register.
Writing an incorrect key automatically reactivates the RTC register write access protection.
1.12.2 Enter/exit initialization mode
- Initialization mode, where the counters are stopped.
- Free-running mode, where the counters are running. The calendar cannot be updated while the counters are running. The RTC must consequently be switched to the Initialization mode before updating the time and date. When operating in this mode, the counters are stopped. They start counting from the new value when the RTC enters the Free-running mode. The INIT bit of the RTC_ISR register enables you to switch from one mode to another, and the INITF bit can be used to check the RTC current mode. The RTC must be in Initialization mode to program the time and date registers (RTC_TR and RTC_DR) and the prescalers register (RTC_PRER). This is done by setting the INIT bit and waiting until the RTC_ISR_INITF flag is set. To return to the Free-running mode and restart counting, the RTC must exit the Initialization mode. This is done by resetting the INIT bit. Only a power-on reset can reset the calendar. A system reset does not affect it but resets the shadow registers that are read by the application. They are updated again when the RSF bit is set. After a system reset, the application can check the INITS status flag in the RTC_ISR register to verify if the calendar is already initialized. This flag is reset when the MS19536V1 RTC_ALARM output OSEL[1:0]=11 Wakeup unit 16-bit autoreload timer Periodic wakeup flag
Overview of the STM32 advanced RTC AN3371 30/45 Doc ID 018624 Rev 5 calendar year field is set to 0x00 (power-on reset value), meaning that the calendar must be initialized.
1.12.3 RTC clock synchronization
When the application reads the calendar, it accesses shadow registers that contain a copy of the real calendar time and date clocked by the RTC clock (RTCCLK). The RSF bit is set in the RTC_ISR register each time the calendar time and date shadow registers are updated with the real calendar value. The copy is performed every two RTCCLK cycles, synchronized with the system clock (SYSCLK). After a system reset or after exiting the initialization mode, the application must wait for RSF to be set before reading the calendar shadow registers. When the system is woken up from low power modes (SYSCLK was off), the application must first clear the RSF bit, and then wait until it is set again before reading the calendar registers. This ensures that the value read by the application is the current calendar value, and not the value before entering the Low power mode. By setting the “BYPASHAD” bit to ‘1’ in the RTC_CR register, the calendar values are taken directly from the calendar counters instead of reading the shadow register. In this case, it is not mandatory to wait for the synchronization time, but the calendar registers consistency must be checked by the software. The user must read the required calendar field values. The read operation must then be performed again. The results of the two read sequences are then compared. If the results match, the read result is correct. If they do not match, the fields must be read one more time, and the third read result is valid. Note: After resetting the BYPASHAD bit, the shadow registers may be incorrect until the next synchronization. In this case, the software should clear the “RSF” bit then wait for the synchronization (“RSF” should be set) and finally read the shadow registers.
2 Advanced RTC features
Table 15. Advanced RTC features
512 Hz X X X X X X
1 Hz X X XX
Table 15. Advanced RTC features (continued)
AN3371 RTC firmware driver API Doc ID 018624 Rev 5 33/45
3 RTC firmware driver API
This driver provides a set of firmware functions to manage the following functionalities of the RTC peripheral:
- Initialization
- Calendar (Time and Date) configuration
- Alarm (alarm A and alarm B) configuration
- Wakeup timer configuration
- Daylight saving configuration
- Output pin configuration
- Digital calibration configuration
- Synchronization configuration
- Time-stamp configuration
- Tamper configuration
- Backup data register configuration
- RTC Tamper and Time-stamp pin selection and Output type configuration
- Interrupts and flag management For the STM32F2xx family, the RTC driver stm32f2xx_rtc.c/.h can be found in the directory: STM32F2xx_StdPeriph_Lib_vX.Y .Z\\Libraries\\STM32F2xx_StdPeriph_Driver. For the STM32L1xx family, the RTC driver stm32l1xx_rtc.c/.h can be found in the directory: STM32L1xx_StdPeriph_Lib_vX.Y .Z\\Libraries\\STM32L1xx_StdPeriph_Driver. For the STM32F4xx family, the RTC driver stm32f4xx_rtc.c/.h can be found in the directory: STM32F4xx_StdPeriph_Lib_vX.Y .Z\\Libraries\\STM32F4xx_StdPeriph_Driver. For the STM32F0xx family, the RTC driver stm32f0xx_rtc.c/.h can be found in the directory: STM32F0xx_StdPeriph_Lib_vX.Y .Z\\Libraries\\STM32F0xx_StdPeriph_Driver. For the STM32F3xx family, the RTC driver stm32f3xx_rtc.c/.h can be found in the directory: STM32F3xx_StdPeriph_Lib_vX.Y .Z\\Libraries\\STM32F3xx_StdPeriph_Driver. These five drivers provide a fully compatible API making it easy to move from one product to another.
3.1 Start with the RTC driver
Before using the RTC features:
- Enable the RTC domain access (see following note)
- Configure the RTC prescaler (Asynchronous and Synchronous) and RTC hour format using the RTC_Init() function.
RTC firmware driver API AN3371 34/45 Doc ID 018624 Rev 5 Note: After a reset, the backup domain (RTC registers, RTC backup data registers and backup SRAM) is protected against any possible unwanted write access. To enable access to the RTC domain and RTC registers: – Enable the Power Controller (PWR) APB1 interface clock using the RCC_APB1PeriphClockCmd() function. – Enable the access to the RTC domain using the PWR_BackupAccessCmd() function on STM32F2xx and STM32F4xx devices, or the PWR_RTCAccessCmd() function on STM32L1xx, STM32F0xx and STM32F3xx devices. – Select the RTC clock source using the RCC_RTCCLKConfig() function. – Enable RTC Clock using the RCC_RTCCLKCmd() function.
3.1.1 Time and date configuration
To configure the RTC Calendar (Time and Date), use the RTC_SetTime() and RTC_SetDate() functions. To read the RTC Calendar, use the RTC_GetTime(), RTC_GetDate() and RTC_GetSubSecond() functions. To add or subtract one hour to/from the RTC Calendar, use the RTC_DayLightSavingConfig() function.
3.1.2 Alarm configuration
To configure the RTC alarm, use the RTC_SetAlarm() function. To enable the selected RTC alarm, use the RTC_AlarmCmd() function. To read the RTC alarm, use the RTC_GetAlarm() function. RTC Alarm Sub-second To configure the RTC alarm sub-second, use the RTC_AlarmSubSecondConfig() function. To read the RTC alarm sub-second, use the RTC_GetAlarmSubSecond() function.
3.1.3 RTC wakeup configuration
To configure the RTC Wakeup Clock source, use the RTC_WakeUpClockConfig() function. To configure the RTC WakeUp Counter, use the RTC_SetWakeUpCounter() function. To enable the RTC WakeUp, use the RTC_WakeUpCmd() function. To read the RTC WakeUp Counter register, use the RTC_GetWakeUpCounter() function.
AN3371 RTC firmware driver API Doc ID 018624 Rev 5 35/45
3.1.4 Outputs configuration
The RTC has two different outputs:
- AFO_ALARM, used to manage the RTC alarm A, alarm B and WaKeUp signals. To output the selected RTC signal on RTC_AF1 pin, use the RTC_OutputConfig() function.
- AFO_CALIB, used to manage the RTC Clock divided by a 64 (512 Hz) signal and the calendar clock (1 Hz). To output the RTC Clock on the RTC_AF1 pin, use the RTC_CalibOutputCmd() function.
3.1.5 Digital calibration configuration
To configure the RTC Coarse calibration value and the corresponding sign, use the RTC_CoarseCalibConfig() function. To enable the RTC Coarse calibration, use the RTC_CoarseCalibCmd() function. To configure the RTC smooth calibration value and the calibration period, use the RTC_SmoothCalibConfig() function.
3.1.6 TimeStamp configuration
To configure the RTC_AF1 trigger and enable the RTC TimeStamp, use the RTC_TimeStampCmd() function. To read the RTC TimeStamp Time and Date register, use the RTC_GetTimeStamp() function. To read the RTC TimeStamp sub-second register, use the RTC_GetTimeStampSubSecond() function. The TAMPER1 alternate function can be mapped either to RTC_AF1(PC13) or RTC_AF2 (PI8) depending on the value of TAMP1INSEL bit in RTC_TAFCR register. Y ou can use the RTC_TimeStampPinSelection() function to select the corresponding pin.
3.1.7 Tamper configuration
To configure the RTC Tamper trigger, use the RTC_TamperConfig() function. To configure the RTC Tamper filter, use the RTC_TamperFilterConfig() function. To configure the RTC Tamper sampling frequency, use the RTC_TamperSamplingFreqConfig() function. To configure the RTC Tamper pins input precharge duration, use the RTC_TamperPinsPrechargeDuration() function. To enable the precharge of the Tamper pin, use the RTC_TamperPullUpCmd() function. To enable the TimeStamp on Tamper detection event, use the RTC_TimeStampOnTamperDetectionCmd() function. To enable the RTC Tamper, use the RTC_TamperCmd() function. The TIMESTAMP alternate function can be mapped to either RTC_AF1 or RTC_AF2 depending on the value of the TSINSEL bit in the RTC_TAFCR register. Y ou can use the RTC_TamperPinSelection() function to select the corresponding pin.
3.1.8 Backup data registers configuration
To write to the RTC backup data registers, use the RTC_WriteBackupRegister() function. To read the RTC backup data registers, use the RTC_ReadBackupRegister() function.
3.2 Function groups and description
embedded in the RTC peripheral.
- RTC configuration to the default reset state
- RTC initialization and configuration functions
- RTC time and date configuration functions
- RTC alarm configuration functions
- RTC wakeup timer configuration functions
- RTC daylight saving configuration functions
- RTC output pin configuration functions
- RTC digital calibration (coarse and smooth) configuration functions
- RTC time-stamp configuration functions
- RTC Tamper configuration functions
- RTC backup registers configuration functions
- RTC tamper, time-stamp pin selection
- RTC shift control synchronization function
- RTC flags and IT management functions
Table 16. RTC function groups
Table 16. RTC function groups (continued)
relative pinout (RTC_CALIB pin).
4 Application examples
familiar with the RTC peripheral. Table 17. Example descriptions and to generate an alarm interrupt. registers and BKPSRAM (Backup SRAM). source auto calibration to get a precise RTC clock. The Low Speed Internal (LSI) clock is used as the RTC clock source.
data registers are reset and the Tamper interrupt is generated. thanks to the timestamp event detection. hours) and 10 registers for sub-seconds). timer with a refresh time equal to 250 ms ((1 second/ 8) * 2). 125 ms (8 interrupts per second).
- For Ultra Low Power Medium-density example, Alarm feature is not used.
- This example is deliv ered only with F2/4 - series FW examples.
Table 17. Example descriptions (continued)
5 Revision history
Table 18. Document revision history and to Table 16: RTC function groups.
Added F0 series devices and STM32F0xx in the Introduction. Added a new driver line to Section 3: RTC firmware driver API. to Table 16: RTC function groups. the Note:, STM32F3xx elsewhere. Added STM32 F3 series to Table 1. Table 16: RTC function groups. Table 18. Document revision history (continued)