AN3040

AN3040 STMICROELECTRONICS | Alldatasheet

Document overview

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• PDF pages: 27

Technical content

Datasheet sections

• 1 Basis of half-bridge inverter t opology
• 2 Main characteristic
• 3 Ballast design
• 3.1 L6585DE pin-by-pin biasing circuitry
• 3.2 PFC power section design
• 3.2.1 Input capacitor
• 3.2.2 Output capacitor
• 3.2.3 Boost inductor
• 3.2.4 Power MOSFET
• 3.2.5 Boost diode
• 3.3 Design of the half-bridge inverter and choice of preheating inductor
• 4 Experimental results
• 4.1 Start sequence
• 4.2 Protections
• 4.3 Conducted emissions test
• 4.4 Guidelines for connecting the four lamps to the ballast
• 5 Automatic restart circuit fo r lamp replacement
• 6 Bill of materials
• 7 Revision history

design criteria, this document provides a short overview of the ballast performances. more light for the same input power when driven above 20 kHz instead of 50/60 Hz. Figure 1. 4 x 18 W T8 ballast demonstration board

1 Basis of half-bridge inverter topology

compact fluorescent lamp (CFL) ballasts and for many european tube lamp (TL) ballasts. Figure 2. Electrical architecture used for four-lamp electronic ballasts

2 Main characteristic

The electrical specifications of the lamp ballast are shown in Table 1. Table 1. Input and output parameter

Figure 3. Electrical schematic 4 x 18 W T8 - main wide range

3 Ballast design

This sections describes the main components of the circuit.

3.1 L6585DE pin-by-pin biasing circuitry

Designed in high-voltage BCD offline technology, the L6585DE embeds a PFC controller, a half-bridge controller, the relevant drivers and the logic necessary to build an electronic ballast.

• Pin1 OSC is one of the two oscillator inputs. The value of the capacitor connected to ground defines the half-bridge switching frequency in each operating state. C5 is set to 1 nF .
• Pin2 RF: the choice of component and oscillator capacitance defines the half-bridge switching frequency in each operating state. A resistor R14 connected to ground sets the run frequency, while during the preheating phase the switching frequency is set by the parallel of the above resistance with the R 13 resistor connected between the RF and EOI pins (the EOI pin is pulled to ground during preheating). With the following frequencies and ignition time: R14 can be calculated with the following formula. Equation 1 The value of R13 is therefore given by: Equation 2
• Pin3 EOI is a multi-function pin. During preheating, the pin is internally shorted to ground by the logic, so the resistor (Rpre//Rrun) connected between the RF pin and ground sets the preheating switching frequency. During ignition it goes into a high impedance state: the ignition time is the time necessary for the pin voltage to - exponentially - rise from zero to 1.9 V. The growth is steered by the C 6*R13 time constant; since the value of R13 has already been calculated and tign at the start is fixed, C6 is calculated with the following formula. Equation 3 For this circuit, C6 has been set to 320 nF . kHz40frun = kHz67fpre = ms45tign = () 581.0 33.11e −= () 872.0 C 106.499k ⋅= Ω=⎟⎟ ⎛= k33f kR e/1 run Ω=⇒⎟⎟ = k47Rf kR//R 13 e/1 pre 1413 nF319R3 tC ign 6 =⋅=

• Pin4 TCH is the time counter and is activated during the preheating phase as well as after a protection is triggered (HBCS crossing during ignition run mode, window comparator at EOL). To achieve this, an R 15C7 parallel network is connected between this pin and ground. With a protection time tTch,reduced fixed at 0.27 seconds (needed for the startup sequence with old or damaged lamps), C7 can then be calculated. Equation 4 With tpre set to 1 second and considering the internal current generator ICH = 31 µA, R15 can be calculated. Equation 5
• Pin5 EOLP is a 2 V reference and allows programming the window comparator of Pin6 (EOL) according to the values defined in Table 4 in the L6585DE datasheet. Working in a lamp-to-ground configuration, a fixed reference mode has been selected, and for a window voltage amplitude of ± 240 mV, R 16 has been set to 75 kΩ.
• Pin6 EOL is the input of the window comparator. Concerning this comparator, the fixed reference configuration requires two Zener diodes to shift the mean value of the lamp voltage to 2.5 V. The values of the two Zener diodes relate to the symmetry of the protection intervention, and the best symmetry is obtained by choosing two values whose difference is equal to twice the reference voltage. Referring to the first series lamp ( Figure 3): Equation 6 If we consider that VfD17 = VfD16 = 0.7 V and take into account that W/2 = 0.240 V, the maximum/minimum voltage on the low resistance of the voltage divider of the lamp is With R67 equaling 1.8 MΩ, considering the current capability of EOL and fixing the maximum deviation voltage lamp , the value of R 60 can be calculated as 1.5 MΩ. F1C1026974.0Ct 7 7reduced,Tch μ=⇒⋅⋅≅ Ω⇒Ω= = k750k755 5.1 63.4lnC 63.4I Ct R CH pre 2WVV5.2V 17fD16zDmaxK +++= ( ) 2WVV5.2V 16fD17zDminK −+−= ⇒−= minKmaxK VV V10V,V1.5VVV5.22 16zD17zD16zD17zD ==⇒−=⋅ VK 8.2V= Vlamp 18V=

Figure 4. EOL circuit for first-series lamp

• Pin7 CTR is a multi-function pin (PFC overvoltage, feedback disconnection, reference for EOL in case of tracking reads), connected through a resistive divider to the PFC output bus. By establishing a maximum PFC overvoltage (PFC output overshoot, for example, at startup) V OVPBUSpfc of 480 V and considering that the corresponding threshold on the CTR pin (VthrCTR) must be 3.4 V, R7+R12 can be calculated as 1.82 MΩ and R19 as 13 kΩ.
• Pin8 MULT: first, the maximum peak value for VMULT, VMULTmax is selected. This value, which is reached at the maximum mains voltage, should be 3 V (linearity limit) or nearly so in wide-range mains and less in case of single mains. The PFC sense resistor selected is R S = R22 = 0.150 Ω and is described in the section on Pin12. Considering that the maximum slope of the multiplier (maxslope) is 0.75, it is possible to calculate the maximum peak value occurring at the maximum mains voltage and the multiplier divider ε. Equation 7 83.1V V slopemax RPFV P22 V V slopemax RIV minAC maxAC minin out minAC maxAC22Lpk maxMULT =⋅ =⋅⋅= maxAC maxMULT 9517 17 1089.4 2652 83.1 V RRR R −⋅= =++=ε

Supposing there is a 240 µA current flowing into the divider, the value of the lower resistor R17 can be calculated, and then the value of the upper resistance R5+R9. Equation 8 The voltage on the multiplier pin with the selected component values is recalculated at a minimum line voltage of 0.59 V and at maximum line voltage of 1.85 V. As a result, the multiplier operates correctly within its linear region.

• Pin9 COMP is the output of the E/A and also one of the two inputs of the multiplier. The feedback compensation network, placed between this pin and INV (10), is a capacitor C 2 calculated as follows (considering that R6+R11 is the upper resistance of voltage divider between the PFC bus and the COMP pin). Equation 9 C2 has been set to a commercial value of 470//100 nF .
• Pin10 INV: to implement the voltage control loop, a resistive divider (Figure 4) must be connected between the regulated output voltage (VBUSpfc = 420 V) of the boost and the pin. The internal reference on the non-inverting input of the E/A is 2.5 V so R6 and R11 (Figure 4) can then be selected fixing R18 to 18 kΩ. Equation 10
• Pin11 ZCD is the input to the zero current detector circuit. The ZCD pin is connected to the auxiliary winding of the boost inductor through a limiting resistor R10. The ZCD circuit is negative-going, edge-triggered: when the voltage on the pin falls below 0.7 V, the PWM latch is set and the MOSFET is turned on. However, the circuit must first be armed: prior to falling below 0.7 V, the voltage on pin 11 must experience a positive- going, edge-exceeding 1.4 V (due to the MOSFET switching off). The maximum main- to-auxiliary winding turn ratio (m) has to ensure that the voltage delivered to the pin during the MOSFET's OFF time is sufficient to arm the ZCD circuit. Equation 11 m has been set to 10. Ω=+⇒Ω=⋅ε ε−=+ Ω=⇒Ω=μ= M5.1RRM52.1R1RR k5.7Rk79.7A240 VR 951795 maxMULT () nF530RR2 10C 116 2 =+⋅π⋅= 15.2 V R RR BUSpfc 116 −=+ Ω=+ M3RR 116 10.334.1 V2Vm (max)inRMSBUSpfc =⋅−≤

Considering the upper and lower clamp voltages of the ZCD pin and its minimum sink current capability according to the maximum and minimum voltages of the PFC bus, R10 has been calculated and set to 68 kΩ.

• Pin12 PFCS is the inverting input of the current sense comparator. As the voltage across the sense resistor (proportional to the instantaneous inductor current) crosses the threshold set by the multiplier output, the power MOSFET is turned off. Equation 12 determines the PFC sense resistor. Equation 12 R22 has been set to 150 mΩ with a power rating of 1 W.
• Pin13 PFG: to drive the external MOSFET correctly, R21 has been set to 100 Ω.
• Pin 14 HBCS: assuming that during each lamp’s ignition phase there is a maximum current IIGNmax of 1.9 A and an HBCS threshold during the ignition phase VHBCS-ign of 1.6 V, we can calculate that RsenseHB = R31. Equation 13 R31 has been set to 0.47 Ω with a power rating of 1 W.
• Pin 15 GND: device ground.
• Pin 16 LSD: to drive the external half-bridge low-side MOSFET correctly, the resistor R23 has been set to 43 Ω.
• Pin 17 Vcc: this pin is externally connected to the startup circuit (by means of R34, R35, R36, R37, R40 and R41) and to the self-supply circuit made of a charge pump composed by the net C16, C17, C18, D8, D9 and R29.
• Pin 18 out: floating reference of the high-side driver. This pin is connected close to the source of the high-side power MOSFET.
• Pin 19 HSD: to drive the external half-bridge low-side MOSFET correctly, the resistor R 20 has been set to 43 Ω.
• Pin 20 boot: for the high-side section C13 has been set to 100 nF . A68.2PFV P22 I minin outTOT maxL =⋅ η⋅⋅ R22 VCSmin ILmax Ω== − 42.0I V R TOTmaxIGN ignHBCS

3.2 PFC power section design

3.2.1 Input capacitor

The input high-frequency filter capacitor has to attenuate the switching noise due to the high frequency inductor current ripple. The worst conditions will occur on the peak of the minimum rated input voltage (Vinmin = 85 V). The following values have been established.

• The coefficient of the maximum high-frequency voltage ripple r = 0.05.
• Total system efficiency is possible. Taking into account a minimum half-bridge switching frequency (fswmin) of 39 kHz and a total output power (PoutTOT) equal to 4*18 = 72 W, the input capacitor C4 can be determined by the following equation. Equation 14 To obtain a good margin from fswmin, C4 has been set to 680 nF .

3.2.2 Output capacitor

The selection of the output bulk capacitor C1 depends on the DC output voltage, the admitted overvoltage, the output power and the desired voltage ripple. With the following values:

• PFC output voltage VbusPFC = 420 V.
• the coefficient of the low frequency (twice the mains frequency (fmain) = 50 Hz) voltage ripple r1 = 0.05. the bulk capacitor can be calculated as: Equation 15 To obtain the smallest possible ripple and good reliability, a commercial capacitor C1 of 33 µF , 450 V has been used.

3.2.3 Boost inductor

The inductance Lpfc is usually determined so that the minimum switching frequency (fmin pfc) is greater than the maximum frequency of the internal starter to ensure correct TM operation. Considering the minimum suggested value for the PFC section (f min pfc) is 20 kHz and that this last can occur at either the maximum VinrmsMax = 265 V or the minimum VinrmsMin = 85 V mains voltage, the inductor value is defined by: Equation 16 nF904rVf2 V P C mininminsw minin outTOT 4 =⋅⋅⋅π⋅ ⋅η= F13rVf22 V P C 1busPFCmain busPFC outTOT 1 μ=⋅⋅⋅π= ( ) busPFC out pfcmin inrmsbusPFC inrms pfc VPf2 V2VVL ⋅η⋅⋅ ⋅−⋅=

To margin from fmin pfc we have set fpfc to 38 kHz. In this condition, the lower value for the inductor is determined by Vinrms = VinrmsMin and the result Lpfc = 0.8 mH with (as stated in the PFCS pin description) a minimum ILmax of 3 A and a maximum ILmax of 5 A (using the inductor 1646-0004 manufactured by MAGNETICA).

3.2.4 Power MOSFET

The choice of MOSFET relates mainly to its RDS(on), which depends on the output power and its breakdown voltage, the latter being fixed by the output voltage Vbuspfc=420 V only, plus the overvoltage VOVPpfc = 60 V allowed, and a safety margin. The MOSFET's power dissipation depends on the conduction and switching losses. Assuming maximum total power losses PlossesAdm = 1%, PoutTOT = 0.7 W, it easy to verify that with the second-generation MDmeshTM V Power MOSFET STB12NM50N, the estimated total MOSFET power losses PlossesEst are about = 0.5 W (worst case) and that this was the correct choice.

3.2.5 Boost diode

The boost freewheeling diode is a fast recovery one. The breakdown voltage is fixed with the same criterion as the MOSFET. The value of its DC and RMS current, needed to choose the current rating of the diode, are reported. Equation 17 Since the PFC works in transition mode, we have used the Turbo 2 ultrafast high-voltage rectifier STTH1L06.

3.3 Design of the half-bridge in verter and choice of preheating

According to the criteria described in AN993 chapter 5 (design tips) with regard to the design of the resonant circuit, the following values have been selected. We have used the inductor 1646-0005 manufactured by MAGNETICA. A SuperMESH3 power MOSFET STD7N52K3 has been inserted in the half-bridge section to reduce the power losses. For the preheating inductor, we have selected a common mode choke-type inductor with the following features: Lpreh1 = Lpreh2 = 10 mH/250 V/1.4 A. A171.0V PI BUSpfc outTOT dc2D == A53.0V V 24I22I BUSpfc inrmsMin inrmsMaxrms2D =⋅π⋅⋅= Lres L1 L2 2.2 mH=== Cres C9 C14 4.7nF 1600 V,=== Cblock C12 C15 100 nF 400 V,===

4 Experimental results

range. Table 2 and Table 3 show the results obtained for a 45-minute test. constantly 0.9 and THD is lower than 10%. safety margin from the maximum junction temperature of the MOSFET.

4.1 Start sequence

defines the preheating time.

1.53 V, the EOI pin is exponentially charged according to a time constant that defines the

Table 2. 4 x 18 W T8 board performance Table 3. 4 x 18 W T8 thermal results of critic system components

4.2 Protections

again triggered, the L6585DE stops. Figure 8. Run mode, rectifying effect ignite and the lamp voltage must be limited. ballast ignites when two lamps are broken. if one of the four lamps is not ignited, the IC is latched.

Figure 9. Ignition phase with broken lamps: case 1 (lamp 1 works, lamp 2 is Figure 10. Ignition phase with broken lamps: case 2 (lamp 1 is broken, lamp 2

4.3 Conducted emissions test

margin, the power supply passes the pre-compliance test.

Figure 14. Conducted emissions at 230 Vac 50 Hz - line 2 peak detector

4.4 Guidelines for connecting the four lamps to the ballast

shows how to correctly connect all four lamps to the ballast. Figure 15. Connecting four lamps to the ballast

5 Automatic restart circuit for lamp replacement

restart feature for lamp replacement. Figure 16. Automatic restart circuit

6 Bill of materials

Table 4. 4 x 18 W T8 bill of materials

1000 V, 1 A,

Table 4. 4 x 18 W T8 bill of materials (continued)

1 W TH radial Any

7 Revision history

Table 5. Document revision history 16-Apr-2010 1 Initial release.