AN3002 STMICROELECTRONICS | Alldatasheet
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Technical content
Datasheet sections
- 1 User memory organization
- 2.1 M24LRxx I2C password security
- 2.1.1 I 2C Present Password command description
- 2.1.2 I2C Write Password command description
- 3 RF password mechanisms
- 4 M24LRxx’s conditional memory access
- 4.1 M24LRxx’s conditional memory access using passwords
- 4.1.1 I 2C access
- 4.1.2 RF access
- 4.1.3 Mixed RF and I
- 5 Revision history
October 2012 Doc ID 15912 Rev 2 1/22 AN3002 Application note Description of the M24LRxx-R and M24LRxxE-R dual interface memory’s password protection mechanism
Description
The M24LRxx-R or M24LRxxE-R device is a dual-interface, electrically erasable programmable memory (EEPROM). It features an I2C interface and can be operated from a VCC power supply. It is also a contactless memory powered by the received electromagnetic carrier wave. The M24LRxx-R or M24LRxxE-R is organized as 8192 × 8 bits in the I2C mode and as 2048 × 32 bits in the ISO 15693 and ISO 18000-3 mode 1 RF mode. Figure 1. M24LRxx block diagram Table 1 lists the products concerned by this application note. as M24LRxx devices throughout the document. Table 1. Applicable products
1 User memory organization
is not in a protected sector. The M24LRxx also has a 64-bit block that is used to store the 64-bit unique identifier (UID). written by ST on the production line. Figure 2. Memory sector organization The M24LRxx user memory is divided into 64 sectors. Each sector contains 1024 bits. protected, a Write command updates all 32 bits of the selected block.
User memory organization AN3002 6/22 Doc ID 15912 Rev 2 In I2C mode, a sector provides 128 bytes that can be individually accessed in read and write modes. When protected by the corresponding I2C_Write_Lock bit, the entire sector is write- protected. To access the user memory, the device select code used for any I 2C command must have the E2 Chip Enable address at 0.
2 I 2C password mechanisms
In the I2C mode only, it is possible to protect individual sectors against write operations. is possible to write-protect all the 64 sectors in the M24LRxx memory. depends on the correct presentation of the I2C password. must have the E2 Chip Enable address at 1. On delivery, the default value of the 8 bytes of the I2C_Write_Lock bit area is reset to 00h.
2.1 M24LRxx I2C password security
commands: I2C Present Password and I2C Write Password.
2.1.1 I 2C Present Password command description
Present Password command is issued. significant byte of the password is sent first, followed by the least significant bytes. start the internal comparison. Table 2. I2C_Write_Lock bit
internal delay. If the values do not match, the protected sectors remain protected. Figure 3. I 2C Present Password command
2.1.2 I2C Write Password command description
after issuing a valid I2C Present Password command. On delivery, the I2C default password value is set to 0000 0000h and is activated. significant byte of the password is sent first, followed by the least significant bytes. does not trigger the internal write cycle. not respond to any requests. Ack generated during 9th bit time slot.
Figure 4. I 2C Write Password command Ack generated during 9th bit time slot.
3 RF password mechanisms
passwords, and each sector can also have read/write access conditions set. commands with the Option_flag set to ‘1’. On delivery, the default value of the SSS bytes is reset to 00h. the sector as described in Table 5. Table 3. Sector security status byte area
0 E2 = 1 0 SSS 3 SSS 2 SSS 1 SSS 0
128 E2 = 1 4 SSS 7 SSS 6 SSS 5 SSS 4
256 E2 = 1 8 SSS 11 SSS 10 SSS 9 SSS 8
384 E2 = 1 12 SSS 15 SSS 14 SSS 13 SSS 12
512 E2 = 1 16 SSS 19 SSS 18 SSS 17 SSS 16
640 E2 = 1 20 SSS 23 SSS 22 SSS 21 SSS 20
768 E2 = 1 24 SSS 27 SSS 26 SSS 25 SSS 24
896 E2 = 1 28 SSS 31 SSS 30 SSS 29 SSS 28
1024 E2 = 1 32 SSS 35 SSS 34 SSS 33 SSS 32
1152 E2 = 1 36 SSS 39 SSS 38 SSS 37 SSS 36
1280 E2 = 1 40 SSS 43 SSS 42 SSS 41 SSS 40
1408 E2 = 1 44 SSS 47 SSS 46 SSS 45 SSS 44
1536 E2 = 1 48 SSS 51 SSS 50 SSS 49 SSS 48
1664 E2 = 1 52 SSS 55 SSS 54 SSS 53 SSS 52
1792 E2 = 1 56 SSS 59 SSS 58 SSS 57 SSS 56
1920 E2 = 1 60 SSS 63 SSS 62 SSS 61 SSS 60
Table 4. Sector security status byte organization
value of these two bits is used to link a password to the sector as defined in Table 6. area is described in Table 7. after issuing a valid Present-sector Password command. On delivery, the three default password values are set to 0000 0000h and are activated. sector Password command. The Sector Lock bit, b0, is set to ‘1’ automatically. sector are activated. The protection of a locked block cannot be changed in RF mode. Table 5. Read / Write protection bit setting Table 6. Password Control bits
00 No password protection: Password 0 condition
01 The sector is protected by the Password 1
10 The sector is protected by the Password 2
11 The sector is protected by the Password 3
Table 7. Password system area
1 Password 1
2 Password 2
3 Password 3
RF password mechanisms AN3002 12/22 Doc ID 15912 Rev 2 A Lock-sector Password command sent to a locked sector returns an error code. Present-sector Password The Present-sector Password command is used to present one of the three passwords to the M24LRxx in order to modify the access rights of all the memory sectors linked to that password (Table 5) including the password itself. If the presented password is correct, the access rights remain activated until the tag is powered off or until a new Present-sector Password command is issued. If the presented password value is not correct, all the access rights of all the memory sectors are deactivated. Sector security status byte area access conditions in I2C mode In I2C mode, read access to the Sector security status byte area is always allowed. Write access depends on the correct presentation of the I2C password (see I2C Present Password command description). To access the Sector security status byte area, the device select code used for any I2C command must have the E2 Chip Enable address at 1. An I2C write access to a Sector security status byte re-initializes the RF access condition to the given memory sector.
4 M24LRxx’s conditional memory access
Figure 5. M24LRxx memory sharing concept
4.1 M24LRxx’s conditional memory access using passwords
4.1.1 I 2C access
and b2 in the I2C_Write lock bit area are set to 1. Table 8. I2C_Write_Lock bit
shown in Table 9: I2C memory access condition at power on. Note: The I2C_Write lock bit area can be accessed in read mode only. access condition after a valid I2C Present Password. All the 64 sectors of the M24LRxx are open to any write and read commands. The I2C_Write lock bit area can also be updated to remove or add sector write protections. 62 & 63 can be write-protected by setting the bits b62 & b63 to 1. to fully control the M24LRxx access conditions for both I2C and RF . Table 9. I 2C memory access condition at power on
4.1.2 RF access
and write sector access conditions are selected using the Sector security status bytes. Table 10. I 2C memory access condition after a valid I2C Present Password Table 11. I2C_Write_Lock bit update Table 12. I 2C memory access condition at next power on
- write-protect a sector, in which case the sector’s data is read-only
- read-protect a sector, in which case the sector’s data is not accessible from the RF In the following example, the initial setting of the M24LRxx is described in Table 13. Sectors 0 to 3 are protected against various read and write access conditions as defined by the values of their Sector security status bits, b1 and b2. M24LRxx memory access after RF power-on After a correct RF power-on condition, the M24LRxx offers the sector access conditions shown in Table 13: RF memory access conditions at power-on. All the memory sectors can be read except for sectors 2 & 3, and write operations are allowed on all the sectors except for sectors 0, 2 & 3.
Table 13. RF memory access conditions at power-on
as shown in Table 14: RF memory access condition after a valid Present-sector Password. mode, and the sector 2 is accessible in both read and write modes.
- The public EEPROM area, no password protection
- The public ROM area, controlled by the password 0 condition
- The non-accessible area controlled by the password 0 condition
- The “application 1” area protected by the password 1
- The “application 2” area protected by the password 2
- The “application 3” area protected by the password 3 It is not mandatory to have contiguous sectors affected to the same area as each individual sector in the M24LRxx can be set to any one of the 4 password conditions.
Table 14. RF memory access condition after a valid Present-sector Password
Figure 8. RF multiple password memory access condition after password 2 access rights once applied can no longer be modified.
4.1.3 Mixed RF and I 2C access
illustrated in Figure 9: M24LRxx RF and I2C access condition mix.
5 Revision history
Table 15. Document revision history 26-Jun-2009 1 Initial release. page, then by M24LRxx (see Note:). Added Table 1: Applicable products.