AN2331 STMICROELECTRONICS | Alldatasheet

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Technical content

Datasheet sections

  • 1 Main characteristics
  • 2 Circuit description and test resu lts
  • 2.1 Efficiency measurements
  • 2.2 Stand-by and No-load performance
  • 2.3 Short circuit protection
  • 2.4 Over voltage protections
  • 2.5 Start-up sequence
  • 2.6 Resonant stage operating waveforms
  • 3 Conducted emission pre-compli ance test
  • 4 Bill of material
  • 5 PCB lay-out
  • 6 PFC coil specification
  • 6.1 PFC coil electrical characteristics
  • 6.2 PFC mechanical aspect and pin numbering
  • 7 Resonant trafo specification
  • 7.1 Resonant trafo electrical characteristics
  • 7.2 Mechanical aspect and Pin numbering
  • 8 Revision history

provide very good overall circuit efficiency. Figure 1. L6598 and L6563 100W resonant SMPS reference board

AN2331 Main characteristics

1 Main characteristics

The main characteristics of the SMPS are listed here below:

  • Universal input mains range: 90 to 264Vac - frequency 45 to 65 Hz
  • Output voltage: 24V@4A continuous operation, peak current up to 5A
  • Mains harmonics: Compliance with EN61000-3-2 specifications
  • Standby mains consumption: <2W
  • Overall efficiency: better than 90% @230Vac
  • EMI: Compliance with EN55022-class B specifications
  • Safety: Compliance with EN60950 specifications
  • Simple resonant trafo winding: using the integrated magnetic approach
  • Low profile design, 25mm maximum height
  • Low-cost approach: – Low part count & diversity – Mixed PTH/SMT for PCB and labor cost reduction – PCB single layer 78x170 mm

Figure 2. Electrical diagram

AN2331 Circuit description and test results

2 Circuit description and test results

The circuit consists of two stages: a front-end PFC implementing the L6563 and a resonant DC/DC converter based on the L6598. The PFC stage delivers a stable 400Vdc and provides for the reduction of the mains harmonic in compliance with European standard EN61000-3-2. The controller is the L6563 (U1), working in transition mode and integrating all functions are needed to perform the PFC. The power stage of the PFC is a conventional boost converter connected to the output of the rectifier bridge. It includes the coil L2, the diode D4 and the capacitor C9. The boost switch is represented by the power MOSFET Q1. The L2 secondary winding (pins 8-10) and related circuitry are dedicated to power the L6563 during normal operation, after the start-up phase and provide for the energy at start- up to the L6598. It provides also the information about the PFC coil core demagnetization to the L6563 via the ZCD pin. The divider R1, R2 and R14 provides to the controller the information of the instantaneous voltage that is used to modulate the boost current and to derive some further information such as the average value of the AC line, used by the V FF (voltage feed-forward) function. This function allows keeping almost independent the output voltage by the mains one. The divider R7, R8, R9, R10 is dedicated to detecting the output voltage. The second divider R11, R12, R13 is dedicated to protect the circuit in case of voltage loop fail. The second stage is a resonant converter, half bridge topology, working in ZVS. The control is based on the L6598, incorporating the necessary functions to drive properly the Half- bridge by a 50 percent fixed duty cycle with dead-time, working with variable frequency. The transformer uses the integrated magnetic approach, incorporating the resonant series inductance. Thus, no any external additional coil is needed for the resonance. The transformer configuration chosen for the secondary winding is centre tap, using two Schottky rectifiers. The feedback loop is implemented by means of a classical configuration using a TL431 to adjust the current in the optocoupler diode. The optocoupler transistor modulates the current from pin 4, so the frequency will change accordingly, thus achieving the output voltage regulation. In case of short circuit, the current into the primary winding is detected by the lossless circuit R41, C27, D11, D10, R39, and C29 and it is fed into the pin 9, keeping the current at a safe level. In case of output voltage loop failure, the intervention of the zener diode via the spare op amp activates the latched enable (EN1) of the L6598. The EN1 pin is also activated by the L6563 via the PWM_LATCH pin in case of PFC loop fail. In this case, the complete circuit is disabled until a power recycle.

2.1 Efficiency measurements

at the nominal input mains range. Table 2. Efficiency measurements - Vin=230Vac significantly high number for a two stage converter with 4 amps of output current. Figure 3. Efficiency vs. Pout Table 1. Efficiency measurements -

2.2 Stand-by and No-load performance

skipping switching cycles according to the load. deliver the suitable voltage value for correct operations.

2.3 Short circuit protection

removal, the circuit will automatically restart via a soft-start cycle.

2.4 Over voltage protections

Both circuit stages, PFC and resonant, are equipped with their own over voltage protection. (#8), it will latch the L6598 as well. Table 3. Stand-by consumption - Vin=115Vac Table 4. Stand-by consumption - Vin=230Vac

not be latched but will remain active.

2.5 Start-up sequence

Figure 4. Start-up @90Vac - full load showing a correct start-up sequence.

2.6 Resonant stage operating waveforms

Figure 5. Resonant circuit primary side waveforms inductance and the resonant capacitor (C28). and the sine wave shape provides an extremely low EMI generation.

3 Conducted emission pre-compliance test

specifications. The values are measured in peak detection mode. Figure 7. CE peak measure at 115Vac and full load Figure 8. CE peak measure at 230Vac and full load

4 Bill of material

Table 5. Bill of material

D8 BZV55-C18 ZENER DIODE PHILIPS SEM. Table 5. Bill of material (continued)

5 PCB lay-out

Figure 9. Thru-hole component placing and top silk screen Figure 10. SMT component placing and bottom silk screen Figure 11. Copper tracks

6 PFC coil specification

  • Application type: consumer, Home Appliance
  • Transformer type: Open
  • Coil former: Vertical type, 6+6 pins
  • Max. temp. rise: 45°C
  • Max. operating ambient temp.: 60°C
  • Mains insulation: N.A.
  • Finishing: varnished

6.1 PFC coil electrical characteristics

  • Converter topology: Boost, Transition mode
  • CORE type: RM14 - PC40 or equivalent
  • Min. operating frequency: 20 kHz
  • Primary inductance:700 µH ±10% @1kHz - 0.25V (see Note 1)
  • Peak primary current 5 Apk
  • RMS primary current 1.8 Arms Note: 1 Measured between pins #2 & #5

Figure 12. Electrical diagram

2 Auxiliary winding is wound on top of primary winding

Table 6. Winding characteristics

6.2 PFC mechanical aspect and pin numbering

Figure 13. PFC mechanical aspect and pin numbering

  • Maximum height from PCB: 22 mm
  • COIL former type: vertical, 6+6 pins
  • Pin distance: 5.08 mm
  • Row distance: 35.56 mm
  • Pins #1, 3, 4, 6, 7, 9, 11, 12 are removed 6 7 TOP VIEW

7 Resonant trafo specification

  • Application type: Consumer, Home Appliance
  • Transformer type: Open
  • Coil former: Horizontal type, 7+7 pins, 2 Slots
  • Max. temp. rise: 45°C
  • Max. operating ambient temp.: 60°C
  • Mains insulation: Compliance with EN60065 specifications
  • Finishing: Varnished

7.1 Resonant trafo electrical characteristics

  • Converter topology: half-bridge, resonant
  • Core type: EF32 - PC40 or equivalent
  • Typical operating frequency: 100 kHz
  • Primary inductance: 810 µH ±10% @1kHz - 0.25V (see Note 1)
  • Leakage inductance: 200 µH ±10% @1kHz - 0.25V (see Note 1 and Note 2) Note: 1 Measured between pins 1-4. 2 Measured between pins 1-4 with a secondary winding shorted.

Figure 14. Electrical diagram and winding characteristics Table 7. Winding characteristics

  1. Secondary windings A and B must be wound in parallel
  2. Auxiliary winding is w ound on top of primary winding

7.2 Mechanical aspect and Pin numbering

  • Maximum height from PCB: 22 mm
  • Coil former type: horizontal, 7+7 pins (pins 1 and 7 are removed)
  • Pin distance: 5 mm
  • Row distance: 30 mm

Figure 15. Pin lay-out, top view

8 Revision history

Table 8. Revision history