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PN5180 Evaluation board quick start guide Rev. 1.2 — 7 April 2016 347512 Application note COMPANY PUBLIC Document information Info Content Keywords PN5180, PNEV5180B, PN5180 evaluation board, PN5180 customer board, PN5180 GUI, GUI, PN5180 Support Tool, NFC Cockpit Abstract This document describes the PNEV5180B 2.0 (PN5180 evaluation board), and how to use it. It describes the NFC Cockpit (PN5180 GUI Version 2.3), which allows an easy basic access to the PN5180 registers and EEPROM in combination with basic reader functionality.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 2 of 30 Contact information For more information, please visit: http://www.nxp.com
Revision history
1.2 20160407 Update for NFC Cockpit 2.3, EMVCO App added 1.1 20151125 Section 5 References updated 1.0 20151124 First release
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 3 of 30 1. Introduction This document describes the PNEV5180B 2.2 (PN5180 evaluation board), which provides an easy evaluation of the features and functions of the PN5180. It provides the first steps to operate the board, using the NFC Cockpit (PN5180 GUI Version 2.3). The default antenna is a 65mm x 65mm antenna with some metal layer inside the antenna area. This antenna is not an optimum antenna as such, but intends to demonstrate the performance and register settings of the PN5180 under typical design constraints like LCD or some metal (e.g. PCB) inside the antenna area.
1.1 PN5180 registers & EEPROM concept
The PN5180 uses internal registers to adapt and optimize the functionality and performance for each of the supported protocols and data rates dependent on the connected antenna, matching network and receiver path. It offers an EEPROM, which contains the default settings for all the supported protocols. These settings are loaded into the registers with the LOAD RF_CONFIG command for each supported protocol and data rate The default EEPROM configuration settings are optimized for the 65mmx65mm antenna of the board PNEV5180B, and can be updated by the user in case a customized antenna and matching network is used. The command LOAD_RF_CONFIG allows to initialize multiple registers with an efficient single command, and allows to distinguish between transmit and receive configuration. Update of the registers relevant for a selected protocol is done by copying the content of EEPROM addresses to registers. Not all protocols require the initialization of all or the same registers, the command LOAD_RF_CONFIG considers this by initializing the registers relevant for the currently selected protocol only. The EEPROM content can be updated using the command UPDATE_RF_CONFIG. The command does not require any physical EEPROM address, but works directly with the register address information and the protocol for which this data is intended to be used. This allows a convenient initialization of all relevant values for operation. Some of these settings can or even must be adapted towards a new antenna design (e.g. the DPC calibration). All those settings should be stored in the PN5180 EEPROM to allow a proper functionality. Some EEPROM configuration data is independent from the used protocols and defines e.g. the startup behavior of the PN5180 or the functionality of LowPower Card detection and requires attention as well for optimum performance of the chip.
1.2 PNEV5180B concept
The basic concept of the PNEV5180B is to enable the user to perform a quick evaluation of the PN5180, and also connect his own antenna to the PNEV5180 board. In addition, dedicated boards which allow to solder custom matching components are available. The NFC Cockpit can be used to optimize the PN5180 antenna tuning, to perform the DPC calibration and the related TX and Rx optimization without touching any source code.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 4 of 30 All the relevant PN5180 registers can be modified and fine-tuned using the NFC Cockpit. After successful register optimization the found settings can be stored in the PN5180 EEPROM. The NFC Cockpit also allows a dump of the complete user EEPROM content into an XML file. This file then can be loaded again into the EEPROM. That allows to manage and exchange different user or antenna configurations. In addition, the register settings found to work well using the NFC Cockpit, can be used during user code development as well. As soon as the register settings for the targeted protocols and data rates are defined, the NFC Reader Library including the HAL can be used to start the development of the user application. Examples illustrate the usage of the library for typical use cases. The source code examples of the NFC Reader Library can be used to develop an own application directly on the LPC1769 (see [5]), or can serve as a starting point for porting the NFC Library to any other microcontroller platform. 2. Hardware The PNEV5180B V2.2, as shown in Fig 1, provides a lot of test functions which might not be used for the typical hardware and software evaluation. It can be used as a simple standard reader without modification, it can be used to define and optimize the analog settings for any connected antenna or it can be used to develop and modify any RFID and NFC application based on the NFC Reader Library.
2.1 Hardware introduction
The PN5180 is supplied with a supply voltage, which can be chosen between: internal and external supply. For the internal supply either 5V or 3.3V can be used. The external power supply can be an AC or DC supply (polarity does not matter) with at least 7. 5V, since the board provide a rectifier and LDO to supply the circuit with 5V and 3.3V. The PN5180 is connected to an NXP LPC1769 µC via SPI. A specific firmware on the LPC1769 allows to use the PNEV5180B in together with the NFC Cockpit. The connection to the PC is done via USB. Both USB Mini and USB Micro connectors are supported. Another connection option allows to connect a LPC-LINK2 board the PN5180B by means of a debug cable. This allows the development of custom software or the execution of the NFC Reader Library code including samples. In case a different host microcontroller shall be used, the SPI interface is available for connection to an external host (the on board LPC1769 is not used in this case).
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 5 of 30 (1) Version 2.0 Fig 1. PNEV5180B Customer Evaluation Board Fig 2. PNEV5180B 2.0 top view
2.2 Schematics
The complete schematics of the PN5180 evaluation board are shown in the Fig 3, Fig 4, Fig 5, Fig 6, and Fig 7.
2.2.1 LPC1769
The PNEV5180B contains an NXP LPC1769 (see Fig 3).
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 6 of 30 An LPC Linker can be connected to the LPC1769 via the JTAG interface (see Fig 4). Fig 3. LPC1769
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 7 of 30 a. JTAG Interface b. Serial EEPROM not assembled Fig 4. JTAG interface and Serial EEPROM
2.2.2 Power supply
The default settings use the power supply from the USB connector. For the maximum performance and a better test capability the external power supply should be connected. The AC or DC power input can cover any power supply providing an AC or DC voltage between 7.5 and 12V.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 8 of 30 (1) USB supply, external supply & and LPC1769 supply Fig 5. Power supply As soon as the board is supplied with power, the red LED LD100 must be on. The PN5180 evaluation board provides two LDOs, one for 5V and one for 3.3V. 5V LDO is only be used, if the external power supply is connected and used (J101 default). Three jumpers can be used to evaluate the different power supply options: J101: either external or USB power supply (default) J303: either VBAT = 5V or 3.3V (default) J300: closed (default) or to measure the ITVDD
2.2.3 PN5180
The PN5180 is shown in Fig 6. The default clock is based on a 27.12 MHz crystal, but the board supports external clock input, if needed. During the antenna tuning and overall hardware design typically the ITVDD must be checked. This can be done with the JP300 (“TVDD”), either using an external power supply or just using an ampere meter instead of the jumper. The relevant test signals can be derived from the test pins at the bottom of the board.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 9 of 30 Fig 6. PNEV5180B 2.0 PN5180 The antenna connection uses the standard tuning circuit. The EMC filter is designed with a cut off frequency of fEMC = 15.65 MHz, and the antenna impedance is tuned to Z = 20Ω. (1) The matching components might be adapted due to antenna layout changes. Fig 7. Antenna
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 10 of 30 Note: The antenna impedance tuning and measurement must be done with R = 10Ω between ANT1 and ANT2. The symmetrical tuning (see Fig 8) improves the transfer function compared to the standard “asymmetrical” tuning and thus allows to use a higher system Q factor, which results in a higher field strength. The disadvantage of the loading effect, which causes an increased current ITVDD, is compensated with the PN5180 Dynamic Power Control (DPC, for details refer to [4]). (1) Including 10Ω between ANT1 and ANT2 Fig 8. PN5180 evaluation board antenna tuning
2.3 Jumper settings
Three jumpers can be used to evaluate the different power supply options: J101: either external or USB power supply (default) J303: either VBAT = 5V or 3.3V (default) J300: closed (default) or to measure the ITVDD
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 11 of 30 Fig 9 shows the default jumper settings for operation powered via USB. Fig 10 shows the jumper setting for the operation externally powered. (1) Default settings, power supply via USB Fig 9. PNEV5180B 2.0 Default jumper settings
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 12 of 30 (1) External power supply: V ≥ 7.5V Fig 10. PNEV5180B 2.0 jumper settings for external power supply 3. Software The PNEV5180B 2.0 evaluation board is delivered with a graphical user interface application (GUI), the NFC Cockpit. The PN5180 NFC Cockpit can be used to explore the functionality of the PN5180 and perform RF and antenna design related tests. It allows a direct register access as well as EEPROM read and write access, and it allows to test and calibrate the DPC. The NFC Cockpit therefore can be used to configure & test the PN5180.
3.1 LPC Firmware and Driver
The LPC firmware is installed by default on the PNEV5180B and is ready to use. So no LPC firmware installation is required, if the board is only used with the NFC Cockpit. However, the LPC1769 might be used for software development together with one of the samples (including the NFC Reader Library). In such case the LPC FW must be re- installed afterwards, if the PNEV5180B is supposed to be used together with the NFC Cockpit again. Reason for this is that any software development using the LPCXpresso will erase the default firmware. Therefore the LPC FW installation is described in the following section. In any case the correct PC driver must be installed, before the NFC Cockpit can be used with the PNEV5180B 2.0 evaluation board.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 13 of 30
3.1.1 LPC Firmware installation
The LPC firmware provides a boot loader, which can be used to install or update the firmware. To activate the boot loader, close the SW200 (button not assembled), while powering up the PNEV5180B, as shown in Fig 11. (1) SW200 to enter “USB mass storage” mode Fig 11. LPC Bootlader mode This registers the device as USB mass storage device on the PC as shown in figure 13. This mass storage device contains one file: the “lpc_main.bin”. This file can be removed, and the new firmware binary file can be copied into the storage device. As soon as the upload is done, the folder closes and the USB storage device is automatically disconnected from the PC. The LPCXpresso board is automatically reset. The PNEV5180B is ready now to be used now with the NFC Cockpit. Note: The NFC Cockpit 2.3 offers a new functionality to flash and start an EMVco Loopback function. This functionality requires an update of the LPC firmware.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 14 of 30 (1) After reboot with boot loader activation. Fig 12. LPC 1769 as USB device
3.1.2 LPC Driver installation
At first connection of the PNEV5180B (with firmware) to the PC, the device asks for a driver. The driver must be chosen from \\Name of the GUI package\\PC_SW\\LPCBOARD_DRIVER_WIN After successful installation of the driver, the device must be registered as two LIBUSB_WIN32 devices (one for each SPI line), as shown in Fig 13. If only one device is registered, either old drivers have been chosen or an older version of lpc_main.bin is used. Note for possible future NFC Cockpit updates: Please make sure to use latest driver version, otherwise the application might not work correctly. In case of doubt re-install the driver of the corresponding NFC Cockpit package.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 15 of 30 (1) Two LPCBOARD-USB devices must show up. Fig 13. LPC driver Note: I n some cases a wrong driver might be automatically installed without notice after connection of the PNEV5180B board (see Fig 14). In such case the driver needs to be manually updated.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 16 of 30 (1) This setup does not work properly. Fig 14. Wrong driver installed
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 17 of 30
3.2 PN5180 NFC Cockpit
The PN5180 NFC Cockpit can be installed and started (see Fig 15). (1) Status when starting the NFC Cockpit with connected PNEV5180B board Fig 15. PN5180 Initial view After starting the NFC Cockpit, the communication link between the PC and the PNEV5180B (via the LPC interface) is enabled automatically. Note: The PN5180 NFC Cockpit is a development tool, and therefore allows many different kind of operations, even “useless” ones at a first glance. The correct use of the NFC Cockpit is required to operate the PN5180 properly. Example: without enabling the Field no card can be operated, even though the PN5180 can be operated. The Fig 16 shows the activation of a MIFARE DESFire card, using the <Load Protocol> + <Field On> + <Activate Layer3>, followed by <Activate Layer4>. The PN5180 NFC Cockpit shows the card responses like ATQA, SAK, and ATS. Afterwards the ISO/IEC 14443-4 protocol can be used to exchange data. The Fig 16 shows the MIFARE DESFire command “Get Application ID” (0x6A), which returns the AIDs. Note: Make sure that either the CRC is enabled or added manually in the data field.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 18 of 30 (2) 0x6a = Get Application ID command of MIFARE DESFire EV1 Fig 16. PN5180 NFC Cockpit: Activation of a MIFARE DESFire EV1 card + Get Application ID Similar functionality does exist for ISO/IEC 14443 A and B, for NFC type F and for ISO/IEC 15693 communication. Be aware that a LOAD_RF_CONFIG command must be executed manually before the corresponding protocol settings are loaded from the EEPROM into the registers. This can be used to perform (3) <Load Protocol> (e.g. type A 106) (4) <Field On> (5) <Single REQA> (using the EEPROM settings) (6) Select a TX register, e.g. RF_CONTROL_TX, enable TX_SET_BYPASS_SC_SHAPING (7) Change some register bits, and write back into RAM (8) <Single REQA> shows the register changes (probing the field and checking the envelop) This allows an easy and quick optimization of Tx and Rx parameters before changing the EERPOM. (9) <Load Protocol> (e.g. type A 106) (10) <Single REQA> (using again the EEPROM settings)
3.2.1 PN5180 Register access
The PN5180 NFC Cockpit allows the reading and writing of all the PN5180 registers (see Fig 17).
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 19 of 30 Selecting a register reads and shows the hexadecimal content as well as the corresponding bit values. The input allows to change each bit separately as well as writing hexadecimal values. Writing back the value changes the PN5180 regis ter. A help function automatically shows a short description of the (part of the) registers itself, if the mouse is moved over the names. Note: Some register content cannot be changed manually (“read only”) and some content might be overwritten by the PN5180 firmware. (1) Register area is a RAM area, i.e. might be overwritten or changed automatically. Fig 17. PN5180 register access All registers, which are used in the LOAD_RF_CONFIG command, can be read from the EEPROM. The user must select the register and the protocol. All registers, which are used in the LOAD_RF_CONFIG command, can be written into the EEPROM. The user must select the register and the protocol. This allows an easy EEPROM update of the relevant TX and Rx registers after optimization in RAM.
3.2.2 PN5180 direct EEPROM access
The NFC Cockpit allows 4 options of EEPROM access (see Fig 18):
- Read EEPROM Reads a single byte from EEPROM using byte address
- Write EEPROM
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 20 of 30 Writes a single byte into EEPROM using byte address
- Dump EEPROM Stores the complete user area of the PN5180 EEPROM into a XML file. This can be used to generate a backup of all settings or to transfer optimized settings onto another board or into own software.
- Load EEPROM Load a XML file and stores the content into the user area of the PN5180 EEPROM. The format is fixed and must fit. (1) EEPROM means User area of the EEPROM Fig 18. PN5180 direct EEPROM access
3.2.3 PN5180 analog and digital test signals
The NFC cockpit allows to use the PN5180 internal test bus, if enabled (refer to TESTBUS_ENABLE, see [1]) to route some digital and analog test signals to the given testpins (IRQ, AUX1, AUX2 and GPIO1), as shown in Fig 19. The test pins can be found at J302 (pin row). Note: Be aware that some test pins might be used already (e.g. IRQ)!
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 21 of 30 Fig 19. PN5180 analog and digital test signals The analog test signals can directly be selected, for the digital signals a test bus group must be selected first, as shown in Fig 20. Then the digital signal out of the group can be selected as shown in Fig 21, and finally the test pin must be selected as shown in Fig 22. Afterwards the <Route Signal> activates the chosen test signals ate the chosen test pins.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 22 of 30 Fig 20. PN5180 analog test signal and digital test bus group selection Fig 21. PN5180 digital test signal selection
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 23 of 30 Fig 22. PN5180 test pin selection
3.2.4 PN5180 Low power card detection
The NFC Cockpit allows the configuration and test of the Low Power Card Detection (LPCD) of the PN5180 as shown in Fig 23. The LPCD parameter, which are stored in the EEPROM (details refer to [1]), can be changed and the LPCD can be started. Note: Press <Field Off> before starting the LPCD, otherwise the PN5180 wakes up immediately once.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 24 of 30 (1) LPCD had been started twice: first time wake up without card, second time wake up due to card. Fig 23. PN5180 LPCD
3.2.5 PN5180 Dynamic Power Control
The NFC Cockpit supports the correlation test as well as an easy and straight forward calibration of the DPC itself. All details can be found in [4].
3.2.6 EMVCo Loopback application
The NFC Cockpit 2.3 offers the option to flash the EMVco Loopback application into the LPC and start this application from the NFC Cockpit. The EMVco Loopback must be flashed once into the LPC firmware by pressing the <Laod EMVCO App> button (see Fig 24). The EMVco Loopback can be started by pressing the <Start EMVco App> button, and then is executed on the LPC. The function can be stopped by pressing the <Stop EMVCO App> button, but afterwards the PNEV5180B must be reset to continue with the standard NFC Cockpit functionality. This Emvco loopback functionality requires the update of the LPC firmware (lpc_main.bin) with the latest version (part of the installer package), as described in 3.1.1.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 25 of 30 (1) Flash and start the EMVCo application Fig 24. NFC Cockpit with EMVCo Loopback App
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 26 of 30 4. First time use Make sure the LPC1769 is flashed with the correct FW (default).
4.1 Jumper settings
The default jumper settings allow a direct use with the USB connector only. This might show limited performance due to a current limitation on the USB host. So for real performance measurements the external power supply should be used.
4.1.1 USB only
The jumper settings as shown in Fig 9 provide the default settings, using only USB for power supply (no external supply required).
4.1.2 External power supply
For the use of an external power supply the jumper J101 must be changed as shown in Fig 10. The external power supply must provide a voltage level of Vext = 7.5 … 12V with 500mA. For some of the analog tests (i.e. measuring ITVDD) it might be useful to only power the TVDD supply externally. This can be done using the jumper JP300, as shown in Fig 25. Either the jumper can be replaced with a DC ampere meter to measure the ITVDD, or an external 5Vdc power supply can be directly connected to the right pin of JP300. Note: Several GND pins are provided on the board. They all are connected.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 27 of 30 (1) JP300 can be used to externally supply TVDD. Fig 25. PN5180 jumper settings with external TVDD 5. References [1] PN5180 datasheet, www.nxp.com [2] AN11740 PN5180 Antenna design guide [3] AN11741 PN5180 DPC Antenna design [4] AN11742 PN5180 Dynamic Power Control [5] UM10954 PN5180 SW Quick start guide
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 28 of 30 6. Legal information
6.1 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
6.2 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non- infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss o f business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose.
6.3 Licenses
Purchase of NXP ICs with NFC technology Purchase of an NXP Semiconductors IC that complies with one of the Near Field Communication (NFC) standards ISO/IEC 18092 and ISO/IEC 21481 does not convey an implied license under any patent right infringed by implementation of any of those standards. Purchase of NXP Semiconductors IC does not include a license to any NXP patent (or other IP right) covering combinations of those products with other products, whether hardware or software.
6.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are property of their respective owners. MIFARE — is a trademark of NXP Semiconductors N.V. MIFARE DESFire — is a trademark of NXP Semiconductors N.V.
NXP Semiconductors AN11744 PN5180 Evaluation board Application note COMPANY PUBLIC Rev. 1.2 — 7 April 2016 347512 29 of 30 7. List of figures Fig 10. PNEV5180B 2.0 jumper settings for external Fig 16. PN5180 NFC Cockpit: Activation of a MIFARE Fig 20. PN5180 analog test signal and digital test bus Fig 25. PN5180 jumper settings with external TVDD .. 27
NXP Semiconductors AN11744 PN5180 Evaluation board Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. © NXP Semiconductors N.V. 2016. All rights reserved. For more information, visit: http://www.nxp.com Date of release: 7 April 2016 347512 Document identifier: AN11744 8. Contents