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SSL3401HN dimmable driver for MR16/12 V GU5.3 Rev. 1 — 23 January 2014 Application note Document information Info Content Keywords dimmable MR16 lamps, SL3401HN low-voltage LED driver Abstract This application note describes how to design an MR16 low voltage LED driver using the NXP Semiconductors SSL3401 LED driver IC.
Application note Rev. 1 — 23 January 2014 2 of 26 Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
Revision history
v.1 20140123 first issue
Application note Rev. 1 — 23 January 2014 3 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 1. Introduction Light Emitting Diodes (LEDs) have been used in electronic systems for many years, primarily as indicator lights on electronic devices. Recent developments in terms of brightness and available colors have made it possible to use LEDs in a wide range of applications. These include lighting in cell phones, media players, and replacing conventional light sources in commercial and domestic lighting applications. The key enablers driving the expansion of LED lighting are the availability of high-brightness LEDs and intelligent LED controllers. Product designers who incorporate high-brightness LEDs face many challenges, like thermal management, driver scheme/topology and existing lamp shape and regulation compliancy. The optimized lamp shape ensures that a low-component application BOM is required for building the application. The SSL3401 offers hysteretic control for the power converter. It is suitable for use with a linear LED current source. Two embedded Proportional-Integral (PI) controllers and a 0.052 % resolution Pulse-Width Modulation (PWM) generator, adjusted by the dimmer conduction phase, ensure excellent LED current stability for a dimming range from 100 % to less than 5 %. The power loss across the LED current source is also minimized. The SSL3401 enables the low-voltage lamp/module designer to produce an LED driver that:
- Eases migration to an existing lighting control infrastructure
- Supports most available dimming and low-voltage transformation solutions
- Provides excellent stability of LED current
- Enhances the line regulation of the LED current
- Optimizes the dimming curve for low-voltage transformer compatibility
- Operates with 50 Hz, 60 Hz or DC sources
- Provides protections like OverVoltage Protection (OVP), shorted LED protection and opened LED protection
Application note Rev. 1 — 23 January 2014 5 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 During the time t1 (Mode 1), switch S1 is closed (switched on). Current starts to flow through inductor L. When switch S1 is switched off, the secondary switch (S2) is closed and a current flows towards the output. During the conduction time of switch S2 (t2), the current in the inductor is reduced. If the next step (t1(n+1)) begins (after step t2(n)) before the inductor current has dropped to 0 A, the application operates in Continuous Conduction Mode (CCM). The input power equals the input voltage multiplied by the average inductor current (IL(AV)). The resulting input current ripple varies also with the comparator delay, the inductance value and the parasitic capacitances. a. Equivalent circuits b. Waveforms Fig 2. Boost wave forms in Continuous Conduction Mode (CCM) DDD ,/ 6 6 9R ,/ 9L[įW į ,/ 6 6 9R ,/ 9R9L [įW į O/ O7+B+ O7+B/ O7+B+ O7+B/ O7+B+ DDD O7+B/ DYHUDJH O7+B+,7+B/ OR W W W įį
Application note Rev. 1 — 23 January 2014 6 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 3. Functional description In applications where the input current must be kept at a minimum value and which do not require isolation, the hysteretic boost converter, working in CCM, is the best switch power supply architecture.
3.1 Features and benefits
The SSL3401 ensures easy migration to existing lighting control infrastructures. Benefits and features are:
- Support most available dimming and low-voltage transformation solutions
- Excellent stability of LED current
- Double PI controllers to enhance the line regulation of the LED current
- Optimized dimming curve for low-voltage transformer compatibility
- Automatic supply frequency detection for seamless operation at 50 Hz, 60 Hz or with DC sources
- Dimmer conduction angle detection
- Coil current limitation
- Temperature rollback protection
- OverVoltage Protection (OVP)
- Power-On-Reset (POR)
- Shorted LED protection (SLED)
- Open LED detection (OLED)
Application note Rev. 1 — 23 January 2014 7 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
3.2 Block diagram
Fig 3. SSL3401 block diagram DDD '$& 325 FRPSDUDWRU 9'' 9'' 9'' 9'' 9'' 9'' 95() 3,&21752//(5 7,0,1*&21752//(5 3,&21752//(5 3,&21752//(5 $'& '(08/7,3/(;25 08/7,3/(;25 3:0 *(1(5$725 3:0 *(1(5$725 32:(583 &$/,%5$7,21 +<67(5(6,6 &21752//(5 )%/2236 &21752//(5 6(1625 293 23(1 /(' 6+257 /(' '((3',00,1* /('&855(17 6+87'2:1 273 /('6':1 $&031 9'' 9'' 966 5(6(7 $&035() GLHSDG +<676(7 /2$'3:0 293 3$5$06(7 /('3:0 ,/$7&+6(7$&7 2736(7$&7
Application note Rev. 1 — 23 January 2014 8 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 4. Step-by-step design procedure
4.1 Basic electronic configuration
(1) LED current control (2) Reference voltage (3) Boost stage (4) Additional load (5) Feedback (6) Low-voltage supply (7) Configuration and protection control (8) EMI filter and rectifier stage Fig 4. Basic electronic configuration DDD /('6':1 /('6':1 %67'59% %67'59$ $&033 $&035() $&031 /('3:0 /2$'3:0 +<676(7 23(1*1' ,/$7&+6(7$&7 56(7 56(7 56(7 5293 5293 2736(7$&7 3$5$06(7 293 /('3 /('1,1 ' ' 5 &) &%86 /('6':1 &) & &) 5 & &) & 5,/(' 5/2$' 5,&%6753' RXW *1' 9&& 9 9 /%67 '%67 ' ' 538 9287 9,1 *1'9/'2 9/'2 9'' 9'' 5(6(7 **1' 5(*9 *1'
Application note Rev. 1 — 23 January 2014 9 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
4.2 LED current control
The maximum LED current and LED voltage selected for the application determine the 7.2 W application input power. The total power is calculated as detailed in Section 4.4, taking into account the efficiency of the application. The SSL3401 automatically switches between two control modes:
- Mode 1 (dimming down): When the input power at maximum input current decreases to below the maximum LED power (ILED(max) *V LED), the controller reduces the LED current/power to match the LED power with the input power.
- Mode 2 (dimming up): When the input power at maximum input current exceeds the maximum output power, the input current is reduced to match the input power with the maximum LED power.
4.2.1 LED current source settings
The maximum LED current (ILED(max)) determined by external components can be calculated with Equation 1. (1) Where:
- VD5 is the regulated voltage given by the shunt regulator D5
- VBE(PNP) is the base emitter voltage of the PNP transistor in Q2
- VBE(NPN) is the base emitter voltage of the NPN transistor in Q2 Remark: For the best temperature current source behavior, select the NPN and PNP transistors from the same package. The RILED resistor can be used for the coarse adjustment of the LED current. The resistor divider consisting of resistors R3 and R4 can be used for the fine adjustment. RILED can be calculated with Equation 2. (2) When ILED(max) equals 0.2 A, the RILED value is 2 . The maximum power consumption is 80 mW. Select a component that handles the calculated power dissipation at the maximum BCP temperature. Do the layout accordingly. The criteria to use when choosing the values of R3 and R4 are minimizing power loss and voltage drop due to the PNP base current of Q2. ILED max VD5 1 R3 RILED RILED 0.4 ILED max
Application note Rev. 1 — 23 January 2014 10 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 R4 as a function of R3 is calculated with Equation 3: (3) Where:
- VBE(PNP) is the base emitter voltage of the PNP transistor in Q2
- VBE(NPN) is the base emitter voltage of the NPN transistor in Q2
- ILED(max) is the maximum LED current
- VD5 is the regulated voltage given by the shunt regulator D5
- RILED and R3 are components shown in Figure 4 Example:
- VBE(PNP) VBE(NPN) =0 . 1 5V From the dual transistor data sheet PBSS4021SPN. 0.65 V VBE(NPN) at 200 mA and 25 C (PBSS4021SPN).
0.50 V VBE(PNP) at 1 mA and 25 C (PBSS4021SPN)
- ILED(max) =0 . 2A
- VD5 =2 . 5V
- The selected value for R3 is 24 k
- RILED =2 The result: R4 = 6.77 k. A chosen value of 6.65 k gives an accurate result within the 1.6 % range.
4.2.2 Transistor biasing
Resistor RB2 sets the biasing current of the transistor. It must account for the NPN base current and the PNP emitter current. Resistor RB2 can be connected either to the reference voltage VD5 or directly to the boost output voltage (VBUS).
4.2.2.1 Bias supply from shunt regulator
When connecting RB2 to the reference voltage VD5 (see Figure 4), the resistance value of RB2 can be calculated with Equation 4. (4) A high NPN current gain is preferred. General-purpose transistors show a gain value in the range of 200. A 1 mA biasing current for the PNP at maximum LED current is sufficient. RILED RILED RB2 ILED max hfe NPN
Application note Rev. 1 — 23 January 2014 11 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 A drawback when using VD5 as reference is that it strongly depends strongly on the actual LED current. The voltage across RILED (ILED *R ILED) ranges from 0 V to 0.4 V. This range induces a 30 % variation on VRB2 and on IRB2 at VD5 =2 . 5V . Example:
- VBE(NPN) =0 . 6 5V
- ILED(max) =0 . 2A
- VD5 =2 . 5V
- RILED =2 The result: RB2 =7 2 5. For the actual value of RB2, add 10 % to 15 % margin (lower value).
4.2.2.2 Bias supply from V BUS
When connecting RB2 to the reference voltage VBUS (the VBUS point is the same as LEDP1 point (see Figure 4)), the value of RB2 is calculated with Equation 5: (5) Connecting RB2 to a 29 V VBUS(AV) results in a maximum variation on VRB2 of only 1.4 % Example:
- VBUS(AV) =2 9V
- ILED(max) =0 . 2A
- hfeNPN =2 0 0
- IPNP =1m A
- 0.65 V VBE(NPN) at 200 mA and 25 C (PBSS4021SPN)
- RILED =2 The result: RB2 =1 3k . For the actual value of RB2, add 10 % to 15 % margin (lower value).
4.3 Reference voltage and filtering
4.3.1 Bias supply
4.3.1.1 Bias supply from shunt regulator
A temperature stabilized shunt regulator creates the voltage reference for the current source. The current through resistor RB1 must supply the NPN base current, the PNP emitter current, and the shunt regulator current. The value of resistor RB1 when resistor RB2 is connected to VD5 (see Figure 4) is calculated with Equation 6: (6) RB2 ILED max hfe NPN RB1 VBUS AV VD5–
Application note Rev. 1 — 23 January 2014 12 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 Where: (7) Example:
- IRB2(max) =2 . 7m A Based on the example in Equation 4 in Section 4.2.2.1, the maximum value of IRB2 occurs for minimum ILED. The value is: .
- Ishunt(REG)AV = 1.5 mA (specification of the TL431)
- VBUS(ripple)AV =1 . 7V
- VLED(max) =2 7V
- R5 = 15 k (see Section 4.7)
- R6 = 5.1 k (see Section 4.7) The result: RB1(max) =6 . 4k. For the value of RB1, add a 10 % to 15 % margin (lower value). So VBUS(AV) is 29.3 V.
4.3.1.2 Bias supply from V BUS
The value of RB1 when RB2 is attached to VBUS (LEDP1 signal instead of D5; see Figure 4) can be calculated with Equation 8: (8) Example:
- VBUS(AV) = 29.3 V (see Section 4.3.1.1)
- Ishunt(REG)min =1 . 5m A
- VD5 =2 . 5V The result: RB1(max) =1 8k . For the value of RB1, add a 10 % to 15 % margin (lower value). Decoupling capacitor C6 is set to 1 F, which is the recommended value for the TL431 shunt regulator family.
4.3.2 Filtering capacitors
4.3.2.1 C F3
Capacitor CF3 is intended for filtering the 12 kHz PWM control signal that is applied to the gate of MOSFET Q3_A. The filtering is required to get an analog dimming effect on the LED current. The recommended 3 dB cut-off frequency of the low pass filter is 300 Hz. The 3 dB cut-off frequency must be lower than the PWM frequency and higher than the rectified mains frequency to ensure FB loop stability. The CF3 capacitor value as a function of the filter cut-off frequency (f3dB) can be calculated with Equation 9: VBUS AV 0.625 1 R5 IRB2 max RB2 RB1 VBUS AV VD5– Ishunt REG min
Application note Rev. 1 — 23 January 2014 13 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 (9) Example:
- R3 = 24 k (from Section 4.2.1)
- R4 = 6.65 k (from Section 4.2.1)
- f3dB =3 0 0H z The result: CF3 =1 0 0n F . Remark: The P-channel MOSFET Q3_A can be chosen from the same package as the N-Channel MOSFET Q3_B to reduce the BOM count.
4.3.2.2 C BUS capacitor
The capacitor value influences the FB loop stability as well as the voltage ripple and thus the power efficiency. The higher the capacitance, the lower the loop gain, the ripple voltage, and the power loss. A trade-off between capacitor size and power loss is required. The reference design is intended for a typical use case with CBUS =3 3 0F, VLED = 27 V, and ILED =0 . 2A . At a constant power application level, the CBUS value when changing the LED current can be calculated with Equation 10. (10) Select the voltage rating of capacitor CBUS in accordance with the maximum VBUS voltage (VBUS(max)). VBUS(max) can be calculated with Equation 11. (11) Example:
- VBUS(ripple)(max) =3 . 5V a t ILED(max) = 0.2 A and CBUS =3 3 0F
- VLED(max) =2 7V a t ILED(max) with the operating LED current taking into account the binning spread and the temperature effect The result: V BUS(max) =3 1V .
4.3.2.3 C3, C4, and C5
Capacitors C3, C4 and C5 are optional and are used to filter high-frequency components. The filtering of these components ensures a reduction in EMI. The value depends on EMI performance requirements. CF3 2 f3dB R3 R4 CBUS
330 I LED max
VBUS max 0.625 1 R5
Application note Rev. 1 — 23 January 2014 14 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
4.3.3 Thermal stress on current source components
The power loss across the current source is significant. In steady state, the average voltage across the Q2_NPN (see Figure 4) is in the range of 1.5 V with a 330 F filtering capacitor (CBUS) selected. Select the components and design PCB layout accordingly. If the CBUS value decreases, the power loss increases. Use the highest possible CBUS value. The thermal stress on the LED current source depends on the boost output voltage current ripple. The higher the required energy buffer, the higher the voltage ripple and the heat dissipation in the current source. The energy buffer is required to sustain the LED power/current when the dimmer is off. Setting a dimming curve where the LED power/current is high for a low conduction angle increases the required energy buffer and thus the LED current source temperature. Dimmer behavior, like a normal half mains period and multi-firing for the other half mains period, can increase the heat dissipation of the current source significantly. A steep dimming curve (maximum output power achieved at low conduction angle of the dimmer) can increase the heat dissipation of the current source significantly. The recommendation is to soften the dimming curve by choosing a higher R ICBST value
4.4 Hysteretic boost stage
4.4.1 Implementation
To obtain a hysteretic boost stage mode, the current through the inductor LBST (see Figure 4), during both the on-state t1 and off-state t2 (see Table 1) must be sensed continuously. Resistor RICBST is used for this purpose (see Figure 4). A DC level shifter is inserted between RICBST and the comparator input. The level shifter uses the same values for resistors R1 and R2 (220 k). It is connected to same supply voltage as the IC, ensuring an optimum operation of the comparator.
4.4.2 Power MOSFET and driver
Use a 60 V power MOSFET (PMPB40SNA) in the application. To minimize power losses and high operation temperatures in the MOSFET, use an external 5 V inverting driver. To drive a low-gate charge 60 V MOSFET, like the PMPB40SNA from NXP Semiconductors, a 40 mA inverting driver, like the 74LVC1G14 from NXP semiconductors, can be used. The IC output level is 3.3 V. Using a general-purpose 5 V inverting driver (74LVC1G14) is more appropriate than using a non-inverting driver (74LVC1G34) (faster output voltage fronts; lower consumption). So the IC is designed to operate with an inverting driver. To force the MOSFET to off-state during driver power-up, use a 10 k pull-up resistor PU) at the input and a 10 k pull-down resistor (RPD) at the output. A 100 nF capacitor (C2) filters the driver supply.
Application note Rev. 1 — 23 January 2014 15 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
4.4.3 Boost inductor
The recommended range for the boost inductor (LBST; see Figure 4) is 10 H to 22 H. The choice depends on the trade-off between electronic transformer compatibility (preferably low inductor value) and power loss (preferably high inductor value) related to the switching frequency. In addition to LBST, the transformer leakage inductance and the EMI inductance have a significant impact on the switching frequency. A 15 H value for LBST and 4.7 H EMI (for L1) inductance value is a good trade-off. Enabling the latching current requires an appropriate saturation current capability for these inductors to handle the set peak current.
4.4.4 Boost diode
As the boost output voltage is high (31 V for a 27 V LED voltage), the contribution of the reverse leakage current to the power loss of the boost diode DBST can be significant. To avoid thermal avalanche, a leakage current of less than 5 mA at the maximum boost voltage and 125 C (for example SS19L) is required. The maximum average current of the diode is the maximum LED current. The maximum peak current of the diode is the maximum coil peak current. The latter generally occurs for a dimmer conduction angle less than maximum.
4.4.5 Input current, power setting and dimming curve effect
The input current and power is set via the inductor current sensing resistor RICBST. A resistor value that is too low (high instantaneous input power) can excessively increase the dimming sensitivity, the minimum LED current, and the power loss with the dimmer near maximum output power. It can lead to instability due to a loop gain that is too high. A resistor value that is too high increases the power loss. Maximum LED power at the maximum conduction angle of the dimmer may not be reached. Input current that is too low can lead to transformer compatibility issues. Figure 5 shows the relationship between the resulting dimming curve change and the RICBST value.
Application note Rev. 1 — 23 January 2014 16 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 The RICBST value can be calculated with Equation 12: (12) The mains voltage variation has a similar effect to the RICBST variation. There is a narrower dimming sensitivity zone for high mains voltage and the maximum output power may not be reached at a low mains voltage). Achieving the optimum dimming curve depends on:
- A steep dimming curve (narrow dimming sensitivity zone). Maximum LED power is reached at a lower conduction angle. – Advantage: Helps reach the maximum LED power at the maximum conduction angle, using a high number of dimmer/transformers, and at a low mains voltage. – Disadvantage: High thermal stress (high component temperature) on the LED current source in dimming mode. High thermal stress also on the output load in case of unstable multi-firing output dimmer. (1) R ICBST value is too low (2) Recommended R ICBST value (3) R ICBST is too high Fig 5. Dimming curve form versus R ICBST value DDD GLPPLQJFRQGXFWLRQDQJOH GHJUHHV PD[LPXPRXWSXW SRZHUQRWUHDFKHGLI 5,&%67WRRKLJK QDUURZHUGLPPLQJ VHQVLWLYLW\\]RQHLI 5,&%67WRRORZ GLPPLQJ]RQH PD[LPXPFRQGX FWLRQ DQJOHGLPPHU PLQLPXP FRQGXFWLRQDQJOH GLPPHU KLJK PLQLPXP /('FXUUHQW LI5 ,&%67WRR ORZ ,/(' RICBST 0.2 7.5
Application note Rev. 1 — 23 January 2014 17 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
- A smooth dimming curve (larger dimming sensitivity zone) ensures a better user experience. – Advantage: Reduces the thermal stress on the LED current source in dimming mode. – Disadvantage: The maximum LED power may not be reached with some dimmers/transformers and at low mains voltage. Adjusting the dimming curve so the maximum LED power is reached at a dimming angle of 125 at the nominal mains voltage is a good compromise.
4.4.6 Input current ripple setting
The input current ripple depends partly on the comparator hysteresis. The higher the boost switching frequency, the higher the impact on the comparator delay. There are two ways to adjust the inductor current ripple:
- Connecting the HYSTEST pin (pin 9) of the IC to GND (low hysteresis) or leaving it open (high hysteresis)
- Change the capacitors ratio CF2/CF1. The higher the ratio CF2/CF1, the higher the current ripple. A higher coil current ripple reduces the boost switching frequency and, as a consequence, also the power loss. However, it also lowers the minimum input peak current that can cause ET compatibility issues. A minimum input current above 0.5 A is required for good ET compatibility. The application is built with the HYSTSET pin floating, using a high-comparator hysteresis value. When an electronic transformer supplies the system, a value of 33 pF for capacitors CF1 and CF2 provides a coil current ripple of about 1 A.
Application note Rev. 1 — 23 January 2014 18 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
4.5 Rectifier bridge and EMI filter
4.5.1 Rectifier bridge
The rectifier bridge incorporates four individual 60 V Schottky diodes. To minimize the power loss, use a low reverse leakage current (< 5 mA at 30 V and 125 C) diode, like the B360A-13-F. The average and the maximum peak input currents are also important criteria for the proper selection of the diode. If the latching current is active, the maximum peak current occurs during the latching pulse
4.5.2 EMI filter
A low pass EMI filter made with a 4.7 H inductor (L1) and a 1 F capacitor (C1) reduces the high-frequency content of the input current. If it is active, the inductor must be able to handle the peak current during the latching current pulse. A C1 value that exceeds 1 F has a negative impact on the transformer compatibility. Selecting a specific low audio noise capacitor, like the Murata GJ8 series, can help reduce the audio noise when the system is connected to a leading-edge dimmer. The audio noise is also reduced when connecting two separate 470 nF capacitors (for C1) on both sides of the PCB at locations opposite to each other.
4.6 Additional output load
The output load is designed to absorb any quick transient power resulting from a quick increase in the dimmer conduction angle. It limits the boost output voltage overshoot while ensuring a smooth LED current response in case of fast/sudden increases in input power. The output load steady state is modulated to minimize power loss at a high conduction angle (zero steady state power consumption). It draws a limited amount of power (maximum 25 % of the maximum value) to improve the deep dimming level at a low conduction angle. A resistor value that is too high is not efficient in limiting the voltage on V BUS, which can lead to the triggering of OVP . A value that is too low leads to a feedback loop gain that is too high, causing instability issues and high thermal stress when the dimmer behavior is unstable.
4.6.1 R LOAD value setting
Use a maximum power capability of 30 % of the maximum LED power (see Equation 13). (13) VLED RLOAD
Application note Rev. 1 — 23 January 2014 19 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 Equation 13 is the equivalent to Equation 14. (14) Where:
- VLED is the LED voltage at the maximum LED current
- ILED(max) is the maximum LED current Example:
- Application power = 7.2 W
- VLED =2 0 0m A Result: The recommended RLOAD value is 450 . This value can be achieved using two 910 resistors connected in parallel to handle the power dissipation. To reduce the BOM count, an N-MOSFET (Q3_B) from the same package as the P-MOSFET used to control the LED current can control RLOAD.
4.6.2 R LOAD power setting
If multi-firing is unstable, the input power switches continuously and quickly between two different power levels. The output load first absorbs this quick change in the power level. Only the remaining power is transferred to the LED and/or lost across the LED current source. The output load is designed to absorb up to 30 % of the maximum LED power (1.62 W for 5.4 W LED power). If the dimming curve is steep, the input power is higher for a given dimmer conduction angle. It leads to extreme overheating of the output load and/or LED current source if multi-firing is unstable. Smoothing the dimming curve reduces the power absorbed by the output load in case of unstable multi-firing.
4.7 Feedback
Feedback loops ensure the system power remains stable. The SSL3401 regulates the LED string bottom voltage to a minimum value, ensuring enough headroom for the LED current source to operate while minimizing the power lost. Comparing the lowest LED string bottom voltage to a 0.625 V set-point computes the feedback loop error signal. An external divide-by-four resistor divider (R5 and R6), combined with a 1.3 kHz low-pass filter, extends the dynamic range of the error signal and removes HF noise. Diode D6 (3.3 V Zener diode) protects the IC input pin. The current through R5 and R4 comes from the LED string. A high value of R5 and R6 minimizes this additional LED current. RLOAD VLED
Application note Rev. 1 — 23 January 2014 20 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 The result is the following component selection:
- R5 = 15 k
- R6 = 5.1 k The divider resistor ratio value is 0.254 The value of capacitor CF4 can be calculated with Equation 15. (15) Example:
- fcutting = 1.3 kHz
- R5 = 15 k
- R6 = 5.1 k Result: CF4 = 33 nF (standard value).
4.8 IC supply
The SSL3401 system requires two low-voltage supplies:
- 5 V for the MOSFET gate driver
- 3.3 V for the SSL3401 IC An LDO (U2) connected to the boost output voltage VBUS generates the 5 V. To simplify the application design, a linear regulator can be used (for instance TDA3664). The selection of components (package type) and the PCB design must allow for adequate thermal dissipation of the 5 V LDO. Capacitor C7 (1 F) and series resistor RS (0.5 ) decouple the LDO as required by the TDA3664 specification. An LDO (U3) supplied from the 5 V generates the 3.3 V supply. The heat dissipation is minimal for this regulator. Standard 1 F capacitor C8 decouples this second LDO. CF4 2 fcutting R5 R6
4.9 Configuration and protection control
4.9.1 OTP setting
- Temperature fallback
- OverTemperature Protection (OTP) Temperature fallback, which is controlled by a feedback loop, reduces the output power when required to maintain the IC temperature to a set-point equal to the OTP value minus 20 C. If the IC temperature exceeds the OTP value, the following actions occur:
- The LED current source is stopped
- The boost converter is stopped
- The output load power is set to 0 (open resistor) The system resumes normal operation when the IC temperature drops to below the OTP value minus 30 C. An external analog voltage, set as a ratio of the V DD supply (3.3 V), sets the OTP threshold. Table 2 shows the OTP values as a function of the setting voltage and a proposal for setting the resistor values. Other values of Rset1 and Rset2 are possible.
Table 2. OTP settings
Application note Rev. 1 — 23 January 2014 22 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3
4.9.2 OverVoltage Protection (OVP) setting and calculation
The OVP function is triggered if the boost converter output voltage (VBUS) is too high (i.e. open load). Select the protection voltage point, VBUS, so it does not trigger the protection during normal operation. The maximum value of VBUS in steady state can be calculated with Equation 16. (16) Where:
- Minimum voltage as controlled by the IC = 0.625 V
- VBUS(ripple)(max) is the maximum ripple voltage on capacitor CBUS; depends on the power level and the value of CBUS; Range: 3 V to 3.5 V at CBUS = 330 F
- VLED(max) is the maximum LED voltage; the operating LED current takes into account the binning spread and the temperature effect To cope with transient variation when using the dimmer, set OVP at 6 V above VBUS(max). The OVP voltage (Vovp) can be calculated with Equation 17. (17) Example: For VLED(max) =2 7V , Vovp 37 V. The OVP threshold at the pin OVP is 1.90 V with a 0.55 V hysteresis. Adjusting the Rovp1/Rovp2 ratio sets the OVP. The resulting value for Vovp can be found with Equation 18: (18) The resulting value for Vhys(ovp) can be found with Equation 19: (19) To minimize the power consumption, set Rovp1 to 100 k. Rovp2 is adjusted depending on the desired OVP threshold. For example: R ovp1 =1 0 0k and Rovp2 =5 . 6k leads to respectively Vovp =3 6 . 9V (OVP threshold) and Vhys(ovp) = 10.4 V (hysteresis). Remark: The VBUS capacitor voltage rating and the boost MOSFET breakdown voltage must also be taken into account when selecting the OVP threshold value. VBUS max 0.625 1 R5 Vovp 0.625 1 R5 V Vovp 1.9 1 Rovp1 Rovp2 = Vhys ovp 0.55 1 Rovp1 Rovp2 =
4.9.3 Latching current setting
An external analog voltage sets the latching current as a ratio of the VDD supply (3.3 V). used, the boost inductance, the EMI inductance, and the EMI capacitors must be resized.
4.10 LED selection
between the input voltage and the boost output voltage, affecting the light stability. an LED junction temperature of 25 C, the minimum LED voltage limit is 27.7 V. included in the calculation. determine the LED voltage upper limit. Table 3. Latching current settings
Table 4. Abbreviations
Application note Rev. 1 — 23 January 2014 25 of 26 NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 6. Legal information
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6.3 Trademarks
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NXP Semiconductors AN11411 SSL3401HN dimmable driver for MR16/12 V GU5.3 © NXP B.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 January 2014 Document identifier: AN11411 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 7. Contents
4.2.2.2 Bias supply from V
4.3.3 Thermal stress on cu rrent source components 14
4.4.5 Input current, power setting and dimming curve
4.6.1 R