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SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz Rev. 1 — 24 March 2011 Application note Document information Info Content Keywords LNA, 2.33 GHz, BFU690, SDARS Abstract This application note provides circuit, layout, BOM and performance information for 2.33GHz LNA equipped with NXP Semiconductors BFU690 wideband transistor
Application note Rev. 1 — 24 March 2011 2 of 19 Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
Revision history
v.1 20110324 initial version
Application note Rev. 1 — 24 March 2011 3 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz 1. Introduction The BFU690 is a wideband Silicon Germanium Amplifier transistor intended for high speed, low noise applications. It is designed to be used for LNA applications such as GPS, satellite radio, cordless phone and wireless LAN. The BFU690 comes in a SOT343F package providing 2 emitter pins for better grounding. The BFU690 is ideal in all kind of applications where cost matters. It also gives the designer flexibility in his design work. The BFU690 SiGe low noise transistor is shown here in a Satellite Digital Audio Service (SDARS) active antenna LNA application. It is intended for use as the 2nd stage in a 3 stage SIRIUS LNA chain. The 2.33 GHz LNA evaluation board (EVB) is designed to evaluate the performance of the BFU690 transistor applied as the 2nd stage in a 3 stage SIRIUS LNA chain. In this document, the application diagram, board layout, bill of material, and some typical results are given. The evaluation board is shown in Figure 2 2320-2332.5 (SIRIUS, 3 stages) Fig 1. Overview of S DARS active antenna LNA 019aab735 NXP BFU730 NXP BFU Bandpass FilterNXP BFU690 G = 15.3 dB IDC = 30 mA NF = 1.47 dB P1dB = +13.9 dBm
of the transistor performance in terms of noise and gain. Table 1. BFU690 performance in terms of noise and gain measured at V CE =2V ; Table 2. BFU690 pinning information
Application note Rev. 1 — 24 March 2011 5 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz 3. Application board The BFU690 2.33GHz EVB simplifies the evaluation of the BFU690 wideband transistor, for this frequency range. The EVB enables testing of the device performance and requires no additional support circuitry. The board is fully assembled with the BFU690, including input and output matching, to optimize the performance. The input match was a compromise between the best noise figure and a low input return loss. The board is mounted with signal input and output SMA connectors for connection to RF test equipment:
3.1 Application circuit
The application diagram as supplied on the evaluation board is shown in Figure 3.
3.2 Board layout
Figure 2 shows the board layout with components. Fig 3. Evaluation board circuit diagram BFU690 VCC = 3.3 V RF in RF out 019aab738
Application note Rev. 1 — 24 March 2011 6 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
3.3 PCB layout
A good PCB Layout is an essential part of an RF circuit design. The EVB of the BFU690 can serve as a guideline for laying out a board using either the BFU690. Use controlled impedance lines for all high frequency inputs and outputs. Bypass supply voltage VCC with decoupling capacitors, preferable located as close as possible to the device. For long bias lines it may be necessary to add decoupling capacitors along the line further away from the device. Proper grounding of the GND pin is also essential for the performance. Either connect the GND pin directly to the ground plane or through vias, or do both. The EVB is made of FR4 material using the stack shown in Figure 5 Fig 4. Component layout for the BU F690 2.33 GHz evaluation board 019aab739 Material supplier Isola Duraver;r = 4.6 to 4.9; T =0 . 0 2 Fig 5. Stack of PCB material 019aab740 17 µm Cu 17 µm Cu 17 µm Cu 17 µm Cu 0.25 mm FR4 Critical 0.50 mm FR4 only for mechanical rigidity of PCB 0.25 mm FR4 only for mechanical rigidity of PCB
3.4 Bill of materials
- DC power supply up to 60 mA at 3.3 V (up to 15 V for bias Control)
- RF signal generator capable of generating an RF signal at the 2.33 GHz operating frequency
- RF spectrum analyzer covering as a minimum the 2.33 GHz operating frequency and some of the harmonics (up to 8 GHz should be sufficient). Optional: a version with the capability of measuring noise figure is convenient
- Amp meter to measure the supply current (optional)
- NetWork analyzer for measuring gain, return loss and reverse isolation
- Noise figure analyzer. 5. Connections and setup The BFU690, 2.33 GHz EVB is fully assembled and tested. To operate the EVB and test the device functions follow this step-by-step guide: 1. Connect the DC power supply to the V CC and GND terminals and set to 3.3 V. 2. Connect the RF signal generator and the spectrum analyzer to the RF input and the RF output of the EVB respectively. Do not yet turn on the RF output of the signal generator. Set it to 30 dBm output power at 2.33 GHz and set the spectrum analyzer to 2.33 GHz center frequency with a reference level of 0 dBm. 3. Turn on the DC power supply and it should read approximately 30 mA. 4. Enable the RF output of the generator; t he spectrum analyzer displays a tone of 2.33 GHz at approximately 14.7 dBm.
Table 3. Bill of materials
- A NetWork Analyzer (NWA) can be used instead of a signal generator and spectrum
analyzer in order to measure both gain and input and output return losses.
- For noise figure evaluation use either a no ise figure analyzer or a spectrum analyzer
this affects the noise performance. Table 4. Typical results measured on the evaluation board
losses are not subtracted. If subtracted the NF will improve by approximately 0.1 dB.
6.1 Noise figure
Table 4. Typical results measured on the evaluation board …continued Center of plot (x-axis) is 2333 MHz. Table 5. Noise figure tabular data
6.2 Gain compression test
reaches input 1 dB compression point (Pi(1dB)) at 0.48 dBm input power. Table 5. Noise figure tabular data …continued
Application note Rev. 1 — 24 March 2011 11 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
6.3 Input return losses
6.3.1 Log Mag
1 0M H zt o6G H z . Tr 1 S11 LogM 2.000 dB/10.0 dB. (1) 2.320000 GHz; 10.632 dB. (2) 2.345000 GHz; 9.0084 dB. Fig 9. Input return loss plot >Ch1: Start 10.000 MHz Stop 6.00000 Ghz 019aab745 -12.00 -8.00 -16.00 -4.00 0.00 -20.00 (1) (2)
Application note Rev. 1 — 24 March 2011 12 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
6.3.2 Smith chart
Reference plane = input SMA connector on PCB. 1 0M H zt o6G H z . Fig 10. Smith chart of input return loss 019aab746
Application note Rev. 1 — 24 March 2011 13 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
6.4 Forward gain, wide sweep
6.5 Reverse isolation
1 0M H zt o6G H z . Tr 1 S21 LogM 2.000 dB/10.0 dB. (1) 2.320000 GHz; 15.380 dB. (2) 2.345000 GHz; 15.110 dB. Fig 11. Forward gain plot >Ch1: Start 10.000 MHz Stop 6.00000 GHz 019aab747 8.00 12.00 4.00 16.00 20.00 0.00 (2) (1) 1 0M H zt o6G H z . Tr 1 S12 LogM 2.000 dB/20.0 dB. (1) 2.320000 GHz; 20.762 dB. (2) 2.345000 GHz; 20.850 dB. Fig 12. Reverse isolation plot >Ch1: Start 10.0000 MHz Stop 6.00000 GHz 019aab748 -22.00 -18.00 -26.00 -14.00 -10.00 -30.00 (2) (1)
Application note Rev. 1 — 24 March 2011 14 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
6.6 Output return losses
6.6.1 Log Mag
1 0M H zt o6G H z . Tr 1 S22 LogM 2.000 dB/10.0 dB. (1) 2.320000 GHz; 19.453 dB. (2) 2.345000 GHz; 16.948 dB. Fig 13. Output return loss plot (1) >Ch1: Start 10.0000 MHz Stop 6.00000 GHz 019aab749 -12.00 -8.00 -16.00 -4.00 0.00 -20.00 (2)
Application note Rev. 1 — 24 March 2011 15 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz
6.6.2 Smith chart
Reference plane = input SMA connector on PCB. 1 0M H zt o6G H z . Fig 14. Smith chart of output return loss 019aab750
Application note Rev. 1 — 24 March 2011 16 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz 6.7 2-tone test at 2332 MHz
6.7.1 Input stimulus for amplifier 2-tone test
f1 = 2332 MHz; f2 =2 3 3 3M H z ; 17 dBm each tone Fig 15. 2 tone test input stimulus at 2332 MHz 019aab751
6.7.2 LNA response to 2-tone test
Table 6. Abbreviations
Application note Rev. 1 — 24 March 2011 18 of 19 NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz 8. Legal information
8.1 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
8.2 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose.
8.3 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
NXP Semiconductors AN11024 SDARS active antenna 2nd stage LNA with BFU690, 2.33 GHz © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 March 2011 Document identifier: AN11024 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 9. Contents