AN10952_15 PHILIPS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 40
Technical content
SSL2103 flexible, mains-dimmable LED driver Rev. 1 — 24 December 2010 Application note Document information Info Content Keywords LED, flexible LED driver, dimming, mains dimmable, LED lighting, LED lamp, SMPS, SSL2103, external power switch, flyback, power factor Abstract This application note describes how to design a mains dimmable LED driver using the NXP SSL2103 flexible LED Driver IC in flyback mode. It includes a description of how mains dimmer compatibility is achieved
Application note Rev. 1 — 24 December 2010 2 of 40 Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
Revision history
v. 1 20101224 first issue
Application note Rev. 1 — 24 December 2010 3 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 1. Introduction Light Emitting Diodes (LED's) have been used in electronic systems for many years, primarily as indicator lights on electronic devices. Recent advances, in terms of brightness and available colors, mean that LEDs can now be used in a wide range of applications, from fun lighting in cell phones and media players to replacing conventional light sources in commercial and domestic lighting applications. The key enablers driving the expansion of LED lighting, are the availability of high brightness LEDs and intelligent LED controllers. Product designers involved with incorporating high brightness LEDs, face many challenges. Amongst these challenges are thermal management, driver scheme/topology and existing infrastructure. To replace an existing dimmable incandescent or halogen light source, an electronic lamp driver system must be implemented that can operate with the existing dimmer switch whilst replicating the dimming behavior of the existing light source. The SSL2103 offers extensive possibilities to assure stable operation with all current dimmers. With the SSL2103, full flexibility is offered for bleeder circuitry implementation. This allows the designer to optimize the application efficiency while keeping a high level of dimmer compatibility. The SSL2103 provides a control output for an external power switch to extend its application reach towards a higher power domain. Summarizing, the SSL2103 enables the lamp/module designer to produce an LED driver that:
- can drive any power
- has optimal dimmer compatibility
- is very flexible, cost and size effective, whilst benefiting from optimal thermal trade-off.
Application note Rev. 1 — 24 December 2010 4 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 2. LED properties LEDs need a completely different type of driver, to the type used with incandescent or halogen lamps. Incandescent lamps act as resistive loads with self-stabilizing properties whereas LEDs require a current source. The amount of light generated by an LED is approximately proportional to the current flowing through the device. The voltage drop across the device increases with current but decreases with temperature. In this respect, LEDs behave like diodes. However, the voltage drop during operation (the forward voltage or V F) is greater (see Figure 1). This voltage drop is related to the amount of energy (eV) generated when an electron is converted into a photon. The amount of energy generated is directly related to the color of the light. Additionally, VF can vary greatly between batches due to production spread.
2.1 Serial/parallel configuration
In most applications where LEDs replace existing lamps, multiple units need to be connected to the driver since a single LED would not generate enough light. The LEDs can be connected in either series or parallel. If the LEDs are connected in series, the total voltage across the LED chain will be equal to the sum of the forward voltages (the current will be the same in all the LEDs). If LEDs are connected in parallel, the current is distributed among the branches. However, because the forward voltage of an LED tends to fall as the temperature rises, this configuration is intrinsically unstable. As the temperature rises, more and more of the current generated will flow through the branches with the lower forward voltages. These branches will become brighter while the branches with the higher forward voltages become darker. Fig 1. Typical LED curve (warm white) 019aaa413 VF (V) 2.9 4 1500 ILED (mA)
Application note Rev. 1 — 24 December 2010 5 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver One reason for persisting with the parallel configuration (or a series-parallel combination), is that it allows a large number of LEDs to be combined on a safe supply voltage. An unacceptably high voltage might be needed to achieve the same degree of brightness with a series configuration. The parallel configuration also offers the advantage of redundancy. If a single LED or connection in a series-connected LED chain fails, resulting in an open circuit, the light will extinguish in all the LEDs in the chain. This would not happen if the LEDs were connected in parallel. With a parallel configuration, it is recommended that current regulation is added at each branch to prevent thermal runaway and the unequal distribution of current and light. In general, power converters operate at optimal efficiency when the difference between output and input voltages is minimized. With mains powered drivers and LEDs, optimizing this aspect will generate higher output voltages allowing more LEDs to be connected in series.
converter” and Figure 3 “Flyback equivalent circuits and waveforms (DCM mode)”. S1 whilst a diode would replace S2.
- States 1 and 2 - alternating primary and secondary conduction states
- State 3 - no primary or secondary conduction
- State 4 - both switches closed (must be avoided) Initially, switch S1 is closed (for 1T) and a current starts to flow in the primary winding of the transformer (state 1), rising linearly. Then S1 is opened and S2 is closed (for 2T) and the energy stored in the secondary winding of the transformer causes a current to flow in the load (state 2), which falls linearly as the energy is dissipated. The peak value of the load current is equal to the transformer primary-to-secondary turns ratio (n = Np/Ns) multiplied by the primary peak current at the instant S1 is opened. While S2 is conducting, Fig 2. Basic flyback converter
Table 1. Flyback converter operating modes
Application note Rev. 1 — 24 December 2010 7 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver the output voltage is reflected in the primary side of the transformer. State 3 occurs when the secondary current falls to zero while S1 remains open (for 3T). Primary and secondary currents are both zero. This mode of operation where the primary conducts for 1T (the primary stroke), the secondary conducts for 2T (the secondary stroke) and then conduction is halted for 3T, is called Discontinuous Conduction Mode (DCM). If a new cycle begins as soon as the secondary current falls to zero (3T = 0), the converter is operating in Boundary Conduction Mode (BCM). Figure 3 shows the equivalent circuit diagrams for the three valid states when a converter is operating in DCM mode. Simplified waveforms for one complete switching cycle are also shown. More detailed discussions of the operation of flyback converters can be found in electronic engineering reference books.
Application note Rev. 1 — 24 December 2010 8 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver Fig 3. Flyback equivalent circuits and waveforms (DCM mode) Ip S2 VI n : 1 n : 1 n : 1 Cin CO RL VS2 VLP VO VI t nVO n−1VI nIp(peak) 019aaa415 VLP Is VI Cin CO RLVO VS1S1 VLP VI Cin CO RL VS2 VO VS1S1 VLP VS1 VI t nVO VO Ip(peak) Ip Is VS2 Interval Switch 1 Switch 2 δ1T state 1 (δ1T) primary stroke state 2 (δ2T) secondary stroke state 3 (δ3T) closed open δ2T open closed δ3T δ1T δ2T δ3T open open
Application note Rev. 1 — 24 December 2010 9 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 4. Mains dimming Standard industrial and household dimmers were designed for use with incandescent lamps. Some of the more advanced types can be used with transformers connected to halogen lamps. LED-specific mains dimmers are still rare. The costs of buying and installing a dedicated dimmer, can easily surpass that of the light source itself. So an LED system that will work with the existing dimming infrastructure, will open up this market segment. Because existing dimmers were designed for use with incandescent lamps (which approximate resistive loads dissipating between 20 and 500 ), some additional circuitry will be needed to allow them to be used in an LED system. There is no standard for incandescent dimmers, which in practice leads to a large spread in performance and parameter values. The SSL2103 offers extensive possibilities to assure stable operation with all available current dimmers.
4.1 Dimmer switch classification
Dimmer switches work by turning off power to the lighting circuit during part of the supply cycle. By rapidly turning the light circuit on and off (twice for each cycle of the supply voltage, or 100 to 120 times per second), the total energy delivered to the lighting element is reduced. The longer the power is off during each cycle, the dimmer the light will be. The thermal persistence of the filament smooths out the pulses, ensuring imperceptible flickering due to the rapid switching. Fig 4. Forward phase - dimmer maximum ON Fig 5. Forward phase - dimmer minimum ON Fig 6. Reverse phase - dimmer maximum ON Fig 7. Reverse phase - dimmer minimum ON 019aaa416 on off off on i 019aaa417 i on on off off 019aaa418 off on on offi 019aaa419 i on off on off
Application note Rev. 1 — 24 December 2010 10 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver Dimmers can be divided into two operational categories: positive angle/forward phase operation, also known leading edge dimming, and negative angle/reverse phase operation, or trailing edge dimming. Forward phase dimmers work by varying the switch ON point of the supply current to a lighting circuit. They detect the start (zero-crossing point) of each half-cycle of the supply voltage, and then wait for a predetermined period before switching on the current (see Figure 4 and Figure 5). Reverse phase dimmers vary the switch OFF point, cutting off the supply current to the lighting circuit at predetermined intervals (see Figure 6 and Figure 7). Two switching methods can be distinguished: triac dimming and transistor dimming. Triac switching is always used with forward phase dimmers. Transistor switching can be used with forward and reverse phase dimmers. Transistor dimmers have the advantage of being able to switch capacitive loads, but most existing dimmers are still triac based.
4.2 Triac dimmer
A triac is a bidirectional gated switching device with distinct latching properties. A number of conditions must be met to ensure reliable latching and to maintain current flow once the device has been latched:
- When the triac is triggered, the voltage across the device must be sufficient to enable the minimum latch current to flow. I L is the minimum current needed to hold the component in the conducting state after the trigger (or gate) current has been removed. IL must flow for long enough (the firing time) to completely latch the device.
- Once the device has been latched, a continuous current must flow through the device in one direction. This is the hold current, IH. If the polarity of IH changes (i.e. at a zero cross point), the triac will switch off.
- A triac is not a fully symmetrical device - the values of the above parameters depend on the direction of current flow and on temperature. A timing circuit inside the dimmer, usually consisting of a resistor/capacitor combination, must be reset at zero crossing (the capacitor must be fully discharged). If the above stable dimmer operation conditions are not met, problems may arise that can lead to unstable operation. LED systems without oversized buffering are unforgiving, because they respond a lot faster to changes in power dissipation than incandescent lamps do. Even small variations in light output in the response frequency of the human eye (200 Hz to 120 Hz) can cause flickering and be disturbing. So the switching frequency should not be allowed to fall below 200 Hz. It should be noted that the human eye is more susceptible to variations in color than brightness.
4.3 Transistor dimmer
A transistor dimmer uses a rectifier bridge in combination with a switching device, such as a MOSFET or bipolar transistor, to switch the main current. It contains additional circuitry to drive these devices, and this circuitry needs to be powered. The power is tapped from the switch while it is open, and stored in a capacitor. Though the energy dissipated in the dimmer electronics is not substantial, the current drawn over the switch can be a lot greater than the current required for a passive timing circuit.
Application note Rev. 1 — 24 December 2010 11 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 5. Functional description The SSL2103 is a Multi-Chip Module (MCM) in an SO14 package and has the same core controller functions as the SSL2101 and SSL2102. The main differences between the SSL2103 with respect to the SSL2101 and SSL2102 are:
- The SSL2103 has a control output for an external power switch to drive any power. This is to extend the application reach towards a higher power domain.
- Drive outputs for real current source bleeder control are available and are preferred to resistive bleeder switching as they provide better dimmer compatibility. Further advantages over existing solutions, which are the same as the SSL2101 and SSL2102, (see also Figure 8):
- Valley detection - this feature reduces converter losses, because the switch is closed at the optimal time.
- Smart bleeder operation - the IC senses when bleeder action is not required (e.g. the LED chain provides sufficient load). This reduces power dissipation and increases system efficiency.
- Enhanced thermal lead frame - this can increase the lifetime of the IC and enable it to operate at higher ambient temperatures. For retrofit solutions, the lifetime of electronics at elevated temperatures can be a critical parameter.
- Dimming by duty factor control and by converter frequency - this allows the designer more freedom when defining parameter values. More accurate control of low dim levels can be achieved, and audible transformer noise eliminated, by adjusting the parameters controlling both dimming systems.
- Logarithmic dimming correction - this enables the dimming behavior of the LEDs to replicate that of an incandescent or halogen lamp.
- Built-in thermal protection, overcurrent protection, short-winding detection and maximum duty factor limiting - these features ensure the reliable operation of the IC with minimum failures, even when operating outside specifications. Further details and full specifications can be found in the SSL2103 data sheet (see Ref. 1).
Application note Rev. 1 — 24 December 2010 12 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver Fig 8. SSL2103 block diagram ISENSE SB_DRV WB_DRV HVDET BLEEDER SUPPL Y LOGIC PROTECTION LOGIC OSCILLATOR FREQUENCY REDUCTION CIRCUIT overcurrent blank low freq stop short-winding protection THERMAL SHUTDOWN POWER - UP RESET PWM LIMIT CIRCUIT VALLEY DRAIN AUX SOURCE PWR_DRV 100 mV 0.5 V 1.5 V VCC RC BRIGHTNESS RC2 PWMLIMIT GND 019aaa474 912 1 4 SSL2103
Application note Rev. 1 — 24 December 2010 13 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 6. Step-by-step design procedure Remark: All components referred to in the text can be located on Figure 9 “Typical flyback application using the SSL2103” and switches can be found on Figure 2 “Basic flyback converter” and Figure 3 “Flyback equivalent circuits and waveforms (DCM mode)”. This sections provides a step-by-step guide to designing a basic flyback converter application incorporating the SSL2103. It should be noted that the derivation of the formulas applied is beyond the scope of this application note. Where values used in formulas are application specific, reasonable estimates have been made. Recommended component values were achieved through extensive testing with a range of commercially available dimmers.
6.1 Basic configuration
A circuit for a typical flyback application driving a single LED chain is shown in Figure 9. The mains voltage is rectified, buffered and filtered in the input section and connected to the primary winding of the transformer. In the output section, the transferred energy is stored in a capacitor (C5) and filtered (L3) before driving the LED chain. A clamp is added across the primary winding of the transformer to prevent a high voltage overshoot on the DRAIN pin of the SSL2103, at the moment the external power MOS transistor is switched off. A dimming detection circuit divides and filters the mains rectified voltage to provide input for the generation of the dimming curve. The following functional blocks can be identified in the SSL2103 application and they will be discussed separately (refer to Figure 9 1. LED output current circuit 2. Oscillator 3. External power switch 4. Snubber 5. V CC generation 6. A/B bleeder settings 7. Dimming detection 8. Mains buffer 9. Input circuit
Application note Rev. 1 — 24 December 2010 14 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver Fig 9. Typical flyback application using the SSL2103 IC1 HVDET DRAIN PWR_DRV SOURCE AUX ISENSE PWMLIMIT PWMLIMIT SB_DRV WB_DRV VCCV CC GND BRIGHTNESS RC2 RC PWMLimit TO MAINS TO LED'S SSL2103 RGND VCC L N RGND 019aaa473 R14 R13 R16 R18 R10 R11 R19 R15 R12 R8 C7 R17 C6 D8 L1 L2 D3 D6 TX1 84 1
Application note Rev. 1 — 24 December 2010 15 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
6.2 LED output cu rrent circuit
The values of components in the output circuit will depend on the number of LEDs in the chain, the voltage across the chain and current through the chain. The current will have a ripple and the size of this ripple will dictate the size of the buffer capacitor (C5). The size of the buffer capacitor can be calculated from Equation 1: (1) where: ILED = LED current I = change in LED current fconv(nom) = nominal converter frequency R = series resistance of LED chain In the design example (Figure 9):
- It is assumed there are 10 LEDs in series at 350 mA with a forward voltage (VF) of 3.5 V, a current ripple of 10 % and a nominal converter working frequency of 100 kHz.
- The voltage across the LED chain will be 10 3.5 V = 35 V. Assuming that each LED has a differential resistance of 0.5 at 350 mA, the resistance of the LED chain will be 10 0.5 = 5 . which gives a buffer capacitor size of: (2) When using an electrolytic capacitor for C5, it is recommended that a low ESR ceramic or foil capacitor be connected in parallel to improve EMC filtering and reduce dissipation. This capacitor should be mounted closer to D6 than the electrolytic capacitor, C5. The output coil (L3) filters the high frequency signals from the converter. The size of this coil depends of the EMC norm to be applied on the final product and on the construction, grounding and screening. As a guideline, the cut-off frequency of the LR filter (consisting of the inductance of L3 and the resistance of the LED chain) can be chosen to be 120 th of the converter frequency. The coil value can be calculated using Equation 3: (3) In the following example this will give an output coil value of: (4) Diode D6 must meet the following selection criteria:
- be able to withstand the peak current
- be able to withstand the maximum reverse voltage
- have a low voltage drop in forward mode
- have a low capacitance value in reverse mode ILED C5 10 1 L3 20 R L3 20 5
Application note Rev. 1 — 24 December 2010 16 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver The peak diode current through D6 is determined by the secondary stroke time (2T) and the LED current. The peak reverse voltage across D6 is determined by the primary-to-secondary turns ratio of the transformer and the maximum buffer voltage (the voltage across C3 and C4 in the mains buffer; see Figure 9). A margin must be applied here to allow for oscillation effects. (5) where: Vrev(peak) = peak reverse voltage across diode Vbuff(max) = maximum voltage across capacitors in buffer circuit n = transformer primary-to-secondary turns ratio Vosc = margin applied for oscillation effects VO = Output voltage D6 can be either a Schottky diode with a VF of between 0.15 V and 0.4 V or a silicium diode with a VF of around 0.7 V. Note, however, that Schottky diodes have a relatively low maximum reverse voltage. A suitable Schottky diode may not be available for a given application. One of the main parameters determining reverse capacitance is junction size, which is in turn related to maximum current over sizing of D6, which results in unnecessary losses. C9 is connected between ground and the secondary circuit to counter capacitive coupling between primary, auxiliary and secondary windings. To be effective, the value of this capacitor should be much greater than the value of the capacitive coupling. As a general guide, a factor of 20 is recommended. So if Ccoup = 100 pF, C9 should be > 2 nF. If safety isolation is needed, this capacitor should be able to withstand the applied voltages as specified in EN132400 (type Yn). Fig 10. Flyback converter timing diagram for example circuit δ1 δ3δ2 019aaa421 I ILED = δ2/T X ID(peak) / 2 ID(avr) = ID(peak) / 2 ID(peak) Vrev peak Vbuff max
Application note Rev. 1 — 24 December 2010 17 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
6.3 Oscillator components
The maximum converter and oscillator frequencies are determined by the primary inductance and the transformer input power (see Section 7). The transformer input power is the sum of the power dissipated in the output circuit, in the auxiliary circuit and the transformer losses. The corresponding formula that gives this relation is stated below: (6) After the secondary stroke, the drain voltage oscillates at a ringing frequency, fring. The oscillator waits until it has detected a low drain voltage (a valley) before initiating a new primary stroke. The oscillator frequency is selected to achieve maximum efficiency and guarantee first valley detection (the first valley occurs after 12 of the period of fring). The oscillator frequency can then be lowered using the brightness input for dimming. As the oscillator frequency is lowered, valley detection will be triggered at the second, third, fourth valleys, etc. thereby gradually increasing the off time (3T). It can be seen from Equation 6, that there is a trade-off between primary peak current, converter frequency and primary inductance. The primary peak current helps determine switching losses, as does the switching frequency. The ratio of the primary inductance to peak current determines the core size. Common frequencies used are 50 kHz (in EMC-susceptible environments) and 100 kHz. A: Start of a new cycle using valley switching B: Start of new cycle in a classical PWM system Fig 11. Timing diagram for valley switching showing third valley detect Lp 2P input p fconv 019aaa426 drain valley secondary ringing secondary stroke primary stroke secondary current RC oscillator regulation level A B
Application note Rev. 1 — 24 December 2010 18 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver The ringing frequency at first valley detection is determined by the formula: (7) where: Lp = inductance of the primary winding Cp = parasitic capacitance on drain node. Note that the total primary capacitance is not only determined by the primary inductor but also by the switch, the snubber diode, and the capacitance of the rectifier diode divided by the primary-to-secondary turns ratio: (8) where: Clp = capacitance of primary coil Csw = COSS (MOSFET) switch, plus capacitance of DRAIN pin of SL2103 CD5 = capacitance of the snubber diode CD6 = capacitance of the rectifier diode. The time between transformer demagnetization and the first valley of fring is 12 of the period of the ringing frequency. An estimation for Cp is made in the following example, where Lp = 415 H: (9) Using Equation 7, fring = 722 kHz. As a result, the time for the first valley, after the second stroke has ended, is calculated as follows: (10) A nominal converter frequency of 100 kHz has a period (1T + 2T) of 10 s. This gives an actual total period (including time to first valley detect) of 10.6 s. So the actual converter frequency, and the oscillator frequency, will be 94.3 kHz (fconv = fosc = 94.3 kHz). The oscillator frequency is determined by the values of two parallel components; a resistor (R9) and a capacitor (C7). The capacitor is rapidly charged to VRC(max) (typically 2.5 V; see Ref. 1) and discharged via the resistor to VRC(min) (typical 75 mV; see Ref. 1). The discharge time has been calculated at 3.5 RC seconds (RC being the oscillator time constant).The oscillator time constant for this example can be calculated using Equation 11: (11) fring 2 Lp Cp Cp Clp Csw CD5 n--- CD6++ += Cp 20 70 10 1 T 1 RC 1 fosc =
Application note Rev. 1 — 24 December 2010 19 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver The oscillator charge time is derived from the SSL2103 specification (tch(RC) = 1 s; see Ref. 1). The values for both R9 and C7 can now be easily extracted from the RC time constant. It is not recommended to use an oscillator capacitor of less than 220 pF as the drain voltage might distort the oscillator voltage. With a view to efficiency, a value for C7 of less than 1 nF is preferred. Using Equation 11, a switching frequency of 94.3 kHz would require an oscillator time constant of 2.74 s. This time constant can be achieved by connecting a 4.0 kresistor (R9) and a 680 pF capacitor (C7) in parallel. Dimming can be implemented by lowering the oscillator frequency. The frequency reduction range is determined by the ratio of R8 to R9. It is recommended that R8 should not be greater than 220 kdue to timing tolerance issues. In the example for a dimming range between 100 % and 5 %, the frequency range will be from 94.3 kHz down to 4.8 kHz (maximum dimming). Applying Equation 11 with a switching frequency of 4.8 kHz, R8 will be 87 k. The nearest standard value is 91 k.
6.4 External power switch
The PWR_DRV output pin of the SSL2103 is used to drive the external power switch M1, (see block 3 Figure 9). The specification of this PWR_DRV output is given in data sheet SSL2103 (see Ref. 1), and is optimized to minimize EMI influences and to provide high switching efficiency. The SSL2103 is capable of driving large power switches, with RDSon down to 0.1 or Ciss up to 4 nF. This is to be able to apply higher power applications than those of SSL2101 and SSL2102. The source and drain from the external MOSFET must be connected to the corresponding pins of the SSL2103. To enable efficient power switching, all control features such as valley switching and built-in demagnetization detection are the same as for the SSL2101 and SSL2102. The same applies to all built-in protection measures via the SOURCE input pin such as over-current protection and short winding protection. The over-current activation level must be fixed by defining R7 together with the Iprimary of the transformer. To select the external power switch type, the primary peak current and converter frequency must first be determined with the help of Equation 6 in Section 6.3. By choosing a power switch with low RDSon, there will be less resistive power losses but more switching power losses will occur due to a larger drain capacitor. The efficiency of higher switching frequencies can benefit from choosing a power switch with a higher RDSon. Optimum efficiency is attained by selecting the type of power MOSFET based on the lowest sum of losses due to RDson (see Equation 12) and the losses due to the switching frequency (see Equation 13). Losses due to MOSFET RDson: (12) Losses due to MOSFET switching: Psw = P(loss switch-on) (13) PRDson Psw 12 Cp Vvalley 2 fconv=
Cp = total parasitic capacitance on drain node.
6.5 Snubber circuit design
efficient (lower losses) than alternative designs.
- Vzener = Value of zener diode D4
- VDRAIN(max) = Take lowest value from the two following parameters: a. maximum voltage of DRAIN pin SSL2103 (= 600 V see Ref. 1) b. maximum voltage of DRAIN pin of the external connected MOSFET A small safety margin of 25 V is included. In the following example, for a maximum buffer voltage of 384 V and a maximum drain voltage of 600 V (derived using Equation 14), a 200 V zener diode was selected for D4. (15)
Table 2. Flyback converter operating modes
Application note Rev. 1 — 24 December 2010 21 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
6.6 V CC generation
A circuit, consisting of a capacitor, a rectifier diode, a peak current limiting resistor and a protection zener diode, is used to generate an external VCC supply for the IC (see block 5 in Figure 9). The choice of component values involves a delicate trade-off between power dissipation and operation. The values are determined by the output voltage, the transformer auxiliary-to-secondary turns ratio, the VCC current and the lowest converter frequency. VCC should be between 10.75 V (VCC(startup)(max)) and 28 V and the current IVCC should be 2 mA (see Ref. 1). Note that for SSL2103, the output current drawn from the SB_DRV pin must be added, with the result that IVCC can go to maximum 5 mA. The zener diode requires a value that ensures sufficient energy is stored in the buffering capacitor without exceeding VCC. A practical value would be 20 V at 500 mW. The current delivered to the VCC circuit, at the highest converter frequency, determines the maximum dissipation. The auxiliary-to-secondary turns ratio can be calculated using Equation 16: (16) where: m = auxiliary-to-secondary turns ratio Na = the number of turns in the auxiliary winding Ns = the number of turns in the secondary winding Vaux = the voltage generated across the auxiliary winding VD6 = the voltage across D6 when it is conducting (normally between 0.3 V and 0.8 V) Vled = the voltage across the LED chain The value of R5 can be calculated using the following formula: (17) where: fmin = the minimum converter frequency during dimming fmax = the maximum converter frequency during dimming 1min = the minimum primary stroke duty factor at deepest dimming 1nom = the nominal primary stroke duty factor VCC(min) = the nominal minimum value for VCC (> VCC(startup)(max) - see Ref. 1) IVCC = the minimum current to be delivered to the IC to ensure reliable operation D7 should be selected to withstand the peak current and reverse voltage. The switching speed should be sufficient to operate at the converter working frequency. The reverse voltage depends on the primary-to-auxiliary turns ratio, the maximum buffer voltage and the maximum VCC voltage (which is equal to the zener voltage of D8). m Na Ns R5 2 fmin fmax 1min 1nom IVCC
Application note Rev. 1 — 24 December 2010 22 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver (18) The maximum current through D7 is limited and can be calculated at start-up by dividing Vaux by the value of R5. Capacitor C6 should provide sufficient buffering at the lowest frequency. This can be approximated with a linear model: (19) Assuming a VCC ripple voltage of 100 mV with IVCC estimated at 2 mA and fmin = 4.8 kHz, using Equation 19, C6 can be calculated as follows: (20)
6.7 Bleeder settings
The SSL2103 has extended options for bleeder configurations with respect to the SSL2101 and SSL2102. The bleeder drive outputs SB_DRV and WB_DRV, can be used to drive external bipolar transistors or MOSFETs to switch the bleeder resistors. This mode corresponds with the behavior of the SSL2101 and SSL2102 with internal bleeder switches. The bleeder resistors must be defined as given in application note Ref. 3. To improve accuracy and efficiency, it is possible for the SSL2103 to use the bleeder outputs to generate current sources as shown in Figure 9
6.7.1 Design approach for defining strong and weak bleeder currents
The strong bleeder is designed to provide sufficient load for the dimmer to reset the dimmer timer and provide latch current. Tests have shown that the resetting of the dimmer timing is related to a fixed charge transfer. A current source in the SSL2103, becomes active, via the SB_DRV pin, when the voltage on the HVDET pin falls below V th(HVDET), which is typically 52 V (Ref. 1). The strong bleeder current can be defined with T1 and R10. The output parameters of the SB_DRV pin must be taken into account (see Ref. 1) when defining R18. To allow the system to operate with the majority of field installed dimmers, the strong bleeder resistor R10 must be set to the value given in Table 3. The weak bleeder is designed to maintain the hold current through the dimmer. It switches off when the voltage on the ISENSE pin drops below Vth(low)ISENSE, typically 250 mV. It switches on again when the voltage on the ISENSE pin rises above Vth(high)ISENSE, typically 100 mV (for both levels, see Ref. 1). Hysteresis is included to prevent unwanted oscillations. The weak bleeder current should switch on if the input current from the converter drops below the hold current of the dimmer. The weak bleeder current can be defined with R19, T2 and R11. The output parameters of the WB_DRV pin must be taken into account when defining R19 (see Ref. 1 ). To allow the system to operate with the majority of field installed dimmers, the weak bleeder resistor R11 must be set to the value given in Table 3 VrevD7 Na Vbuff max Np Vzener V osc++= C6 IVCC C6 0.002
compensate for converter load. [1] These values are worst case figures for a maximum conduction time for T2. VSB_DRV can be found in Ref. 1. If Irequired S-BLEED = 60mA, R10 must be approximately 0.13 k. Table 3. Bleeder component settings
Application note Rev. 1 — 24 December 2010 24 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver (24) (25) Vth(HVDET) can be found in Ref. 1. To determine the required weaker bleeder current, calculate the value of R11 as follows: (26) VWB_DRV can be found in Ref. 1. If Irequired W-BLEED = 10mA, R11 must be approximately 1 k. The corresponding power dissipation of T2 (when active), can be calculated as follows: (27) With: (28) (29) The ratio between R13 and R14 can be calculated using this data: Assume a dimmer requires a minimum hold current of 10 mA, which is maintained by means of the weak bleeder switch. Switch on at 10 mA over 200 results in 2 V across R12 (or across R13 + R14). The weak bleeder switches on when the voltage on pin ISENSE (or across R14) is 100 mV. Therefore: R14 / (R13 + R14) = 100 mV / 2 V = 1 / 20 R13 + R14 = 20 R14 R13 = (20 1) R14 R13 / 19 = R14. IISENSE is protected by R13 and should not exceed 5 mA. The maximum peak voltage is limited to 400 V by D2, but a safety margin of 100 V is applied. Therefore: R13 = 500 V / 5 mA = 100 k. Therefore R14 = 100 k / 19 = 5.3 k. Note that all these resistors will need to be able to withstand peak power and peak voltage. T1 and T2 should be rated to withstand the voltage at which the TVS (D2) sets in and withstand the power dissipation. R12 should be rated to withstand the peak voltage and pulse energy at start-up. This pulse energy is listed in resistor data and can be calculated as follows: (30) 2 arc Vth HVDET Vˆmains sin= VE_T1 VSB _DRV IB_T1 R18 – VBE_T1–= Irequired W BLEED– PT2 2IWB L E E D– 2--- 2– = 2 arc Vth HVDET Vˆmains sin= Epulse 12 C34+ VIp e a k 2=
6.8 Dimming detection
converter is shifted. C8 provides filtering and has a recommended default value of 4.7 F. in = Pin(trans) (see Section 6.3) + snubber losses.
6.9 Buffer circuit
relation to mains conducted emissions. can be estimated as follows. Table 4. Recommended dimming circuit values
120 V (AC) 680 k 15 k 10 k
Application note Rev. 1 — 24 December 2010 26 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver (33) where fnet = frequency of the mains voltage: (34) Now take the transformer input power and add IC losses and snubber losses. Equation 35 can be used to calculate the total buffer capacitance: (35) where Ptot = Pin + IC losses. The combination of L2, C3 and C4 constitutes a Pi-Filter that will help to filter out the high frequency currents generated by converter action. Although a single filter stage will not be enough to satisfy legal requirements in relation to mains conducted emissions, it will go a long way to achieve these goals. The cut-off frequency of this filter should be a magnitude below the converter frequency: (36) Assuming C3 = C4. If the cut-off frequency is selected to be a decade below the working frequency, the resulting formula for L2 becomes: (37) where: Cs = C3 = C4. It is recommended that a low-frequency absorbent soft ferrite material, such as 3S1 (Ferroxcube) or 3W1200 (Wurth), be used for this inductor in order to dissipate high frequency energy and block unwanted oscillations.
6.10 Input circuit
The input circuit rectifies the mains voltage and provides overcurrent and overvoltage protection. It has to be over dimensioned to cope with overvoltage and overcurrent conditions on the input. Primary protection consists of a fuse or fusistor that breaks down when the current exceeds a specified value. If a fuse is used, a breakdown value should be selected that can handle inrush currents whilst still providing overcurrent protection. In practice, a value of between 1 A and 1.5 A is sufficient. If a fusistor is selected, the minimum value for this resistor can be calculated using Equation 38 . For most diode bridge rectifiers, the IFSM parameter is around 20 A. (38) tdis 1 2 --- arc Vbuff min 10+ Vˆmains 1 C3 C4+ 2P tot tdis Vˆmains Vbuff min fcutoff 2 L2 C3 C4 L2 100 Cs 4 2 fconv R1 2V AC max IFSM
Application note Rev. 1 — 24 December 2010 27 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver Using Equation 38, with 230 V (AC) 20 % and VAC(max) = 276 V, R1 is calculated as 19.5 and the nearest E24 series standard value is 20 . In addition to its ohmic value, the continuous power dissipation in R1 is an important characteristic. This value can be determined using Equation 39: (39) where the crest factor is the ratio of RMS to average current (typically 4). With V (AC) = 230 V, Ptot = 15.7 W (see Section 6.9), R1 = 20 and crest factor = 4, the power dissipated in R1 will be 370 mW. Capacitor C1 is added to improve differential mode filtering. By placing this component close to the mains input, the inductive coupling to mains is reduced. It also provides buffering against voltage spikes. The values of these input components are partly determined by the requirements of the dimmer. At low levels of output power, R4 can be added to reduce the audible noise generated by inrush current towards C3 and C4. Components D1 and D3 should be dimensioned to handle the peak current in the circuit. The peak current is restricted by the combination of R12, R1 and R4. (40) At 230 V (AC) 20 %, if the values for R12 = 260 , R1 = 20 and R4 = 0 , the peak current will be 1.4 A. PR1 Ccrestfactor R1 Ptot Ipeak
- Transformer design parameters
One of the most challenging aspects of flyback design involves transformer calculations. proximity losses and ohmic losses, can be optimized to maximize transformer efficiency. the fact that the SSL2103 has a PWR_DRV output to control an external power switch. materials are recommended - 3C90 or 3F3 (Ferroxcube), N87 (Epcos) or TP4 (TDG). should be considered if shielding is critical.
- a main or primary winding Np
- an output or secondary winding Ns
- an auxiliary winding Na The number of turns required must be calculated for each of the three windings.
Table 5. Comparative geometry considerations for ferrite cores
Application note Rev. 1 — 24 December 2010 29 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
7.1 Calculating the winding ratio
The following criterion must be met when selecting the winding ratio:
- the reflected output voltage should not exceed the zener snubber (D4) voltage
- n(max) = Vzener / Vout Example: if Vzener = 200 V and Vout = 35 V then n(max) = 5.7 The turn ratio is calculated with an empirical formula, and the result is limited by n(max): n = 43.417 Vout-3/4 Example: If Vout = 35 V then n = 3.01. Check to ensure that n < 5.7.
7.2 Calculating the primary inductance
The calculation of the primary inductance is performed using the following steps:
- 1 - Calculate 1 (duty cycle 1) The duty cycle at which the IC switch dissipation is acceptable needs to be calculated as follows: (41) Example: If fconv =8 5k H z , fring = 303 kHz, Vbuffavr = (310+220) / 2 = 265 V, ILED =3 5 0m A , Pin = 14 W and n = 3.01, then the value of 1 =2 6 . 8% .
- 2 - Calculate 2 (42) Example: If fring = 303 kHz, 1 = 0.268 and fconv = 85 kHz, t2 becomes 7 S resulting in 2 =5 9% .
- 3 - Calculate the primary peak current (Ip(peak))and secondary peak current (Is(peak)) (43) (44) 1 fconv
1 Vbuffavr ILED
2 t2 1 1– fconv IPp e a k Iˆs n---= Isp e a k 2I LED
Application note Rev. 1 — 24 December 2010 30 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
- 4 - Calculate the primary inductance (45) Example: If Pin = 14 W and fconv = 85 kHz then Lp = 2.1 mH.
- 5 - Recalculate the ringing frequency (46) Example: If Lp = 2.1 mH and Cp = 110 pF then fring = 303 kHz Remark: This is a circular calculation and steps 1 to 5 must be repeated for each new ringing frequency until the deviation from the previous calculation is minimal. The ohmic loss in the switch can then be calculated as shown in Equation 47: (47) Example: With RDSon =6 . 5 , Pin(trans) = 14 W, 1 = 26.5 % and Vbuff(eff) =2 8 9V , Psw will be 115 mW. Remark: Equation 47 not only dictates the primary inductance but also shows the relationship between primary current and power: (48) Example: With Vbuff =2 6 5V , Pinput = 14 W, Fconv =8 5k H z , 1 =26.8 % and Lprim = 2.1 mH, the value of Ip =0 . 3 9 4A . Remark: The initial calculation of primary duty factor was based upon minimizing the RDSon switch losses.This formula is also used in the calculation tool. It might be beneficial to reduce primary duty factor thus creating higher IC losses but lower transformer losses and better output current stabilization/input voltage variation rejection. Assuming this will be applied to the limit, the minimum duty factor can be calculated using Equation 49: (49) Example: Assume Psw(max) (allowable RDSon switch losses) to be 0.5 W and Vbuff(eff) = 265 V, then 1 will become 7.2 %. A smaller 1 and larger winding ratio will lead to higher switch losses but has a number of advantages:
- It lowers primary inductance, thus reducing transformer size and losses
- In BCM, it makes the system less dependent on input voltage variation. Lp 2P in Ipp e a k 2 fconv fring 2 Lp Cp Psw 2R DSon P2 in trans buff eff 1 Ip Vbuff 1 2R DSon P2 in trans
- In BCM, it makes the system react more to output voltage variation, which will lead to a more stable LED current.
- It allows a lower input voltage from which it still can deliver full power, thus bigger input voltage ripple and smaller input buffer capacitors.
- It allows for lower input voltage ripple providing the possibility to minimize input capacitance and increase output capacitance. This will give a high system power factor provided that the system stays in BCM mode. Remark: It is advisable to select a primary duty factor that is between the formula as used to calculate minimum switch losses (which is also used in the calculation tool) and the above the formula that utilizes the allowed switch RDSon losses.
7.3 Selecting the core type
7.4 Primary winding count
values can be obtained from the core material data sheet. Table 6. Comparative geometry considerations for ferrite cores
7.5 Secondary winding count
7.6 Auxiliary winding count
7.7 Selecting wire diameters
Amp). Table 7 provides the appropriate wire sizes for a range of currents.
18 A e
Table 7. Wire selection table Nearest AWG Area (mm2) Area (CM) DC Res.
7.8 Proximity losses
depth and the number of windings. even if it means selecting a higher current density. Table 7. Wire selection table …continued Nearest AWG Area (mm2) Area (CM) DC Res.
- Mains dimmer compatibility
8.1 Compatibility list
dimmers listed in Table 8 have all been successfully evaluated.
- At low dimming levels, a step function can be encountered in light output: the dimmer and converter interact and the dimmer output increases due to the increasing load.
- At certain dimming levels, the dimmer may react to an increase in load by reducing on time. This can lead to instability in the sensed voltage resulting in lamp flicker. The effects of these problems can be minimized by weakening the relationship between the variable converter power and the load, as seen by the dimmer, either by increasing the load, or reducing the steepness of the dimming curve. This can be achieved by altering the values of R15 and R17. Note that the trade-off will be a reduced dimming range or an increase in power dissipation.
Table 8. Dimmer list
Application note Rev. 1 — 24 December 2010 35 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver
8.2 Transistor dimmers
A transistor dimmer may demand a higher load then can be realized with the standard bleeder values, to ensure the full voltage drop when dimming is turned off. Typically, a continuous load current of 10 mA or more is required. The dimming range will be restricted with the standard dim-curve circuit, especially when deep dimming is combined with a low output load, because the average voltage drop will not be sufficient to detect dimming. To compensate for this, the dimming curve can be shifted but the trade-off will be a lower dim-range with triac dimmers. This will not be a problem as long as the output power is > 2.3 W in dimmed condition. If the circuit needs to be compatible with both triac and transistor dimmers, and deep dimming is required at low output loads, an additional resistive bleeder can be connected in parallel with C1. A value of 22 k / 3 W at 230 V (AC) or 12 k / 1.5 W at 120 V (AC) would be appropriate. A transistor dimmer with trailing edge operation doesn't need a hold current. Nor does it generate high inrush currents. These advantages over the standard triac dimmer can be exploited by omitting the damper network (R12/R13/R14). The ISENSE pin can be connected to GND. As a result, dissipation and audible noise will be reduced during dimming, and the inrush peak current will be reduced.
8.3 Multiple lamp circuits
The SSL2103 was designed to operate in a one-to-one situation - one lamp connected to one dimmer. However, it is possible to connect multiple lamps to a single dimmer. There is a restriction when using leading edge triac dimmers - the inrush current of all lamps must be combined if the dimmer is to withstand these inrush currents. Normal lamps and halogen lamps can generate inrush currents several times greater than the nominal current. The inrush current can be calculated by, subtracting the buffer voltage across C3 and C4 (at maximum input voltage) from the input voltage and dividing this by the value of R12: (54) A standard value for this inrush current is 500 mA at 230 V (AC). This corresponds to a Halogen lamp of 50 W. When trailing edge dimmers are used, this inrush current is eliminated. The effective load of the lamp will be close to the nominal load. Iinrush Vin Vbuff–
Application note Rev. 1 — 24 December 2010 36 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 9. Dimming curve calculations The dimming curve describes the relationship between light output and the dimmer setting. The SSL2103 offers a great deal of freedom in dimming curve selection. The typical flyback application is an example of power steering: The output power, dissipated in the LEDs, is regulated by the IC. The current is determined by the forward voltage of the LEDs. The relationship between light output and the dimmer setting is defined in Equation 55 (55) where = estimated converter efficiency. The SSL2103 has two control inputs: a BRIGHTNESS input that controls the output frequency and a PWMLIMIT pin that controls the on-time of the switch. If over-current protection is not enabled and/or the maximum duty factor of 75 % has not been exceeded, the LED power will correlate quadratically to the variation in duty factor. To enhance the performance of the system, a correction curve for the BRIGHTNESS pin voltage versus converter frequency was introduced. This correction curve compensates for the difference in light output between LEDs and incandescent/halogen lamps. As can be seen in Figure 14, that the frequency of the converter varies between a minimum frequency determined by the values of C7 and R8, and a maximum frequency determined by C7 and R9. The frequency is independent of converter input voltage and load fluctuations. Different rules apply to the PWMLIMIT input for which the peak current level varies with buffer voltage. The buffer voltage depends on the output load and dimmer setting and the resultant behavior is highly complex. Although a dimming function can be implemented using only the PWMLIMIT input, when deep dimming is required, the brightness modulation is also used. The result enables a dimming range from 100 % down to 0.1 %. Resistor R16 is added to reduce audible noise. Fig 14. Typical response of BRIGHTNESS pin P 12 Lp Ip 2 f= VBRIGHTNESS (V) 019aaa423 120 freq (kHz) 300 V
Application note Rev. 1 — 24 December 2010 37 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver The internal 20 A current source raises the voltage on the BRIGHTNESS pin. This shifts the brightness curve to the left, lowering the frequency at low dimmer settings. At these levels, the current controlled by the PWMLIMIT pin has already been reduced. The peak current through the inductor is the main source of audible transformer noise. 10. Summary This document describes the construction of a flyback based converter which is a typical application for the SSL2103 mains dimmable LED driver. The differences of the SSL2103 with respect to the SSL2101 and SSL2102, are also discussed. It provides some general information concerning LED properties, some converter basics and mains dimmer aspects. The step-by-step design procedure provides the designer with information on how to dimension the components in this application and the functionality of the circuit. It contains a section on transformer design that should enable the designer to estimate values for the main transformer parameters such as core size, air gap, number of windings and wire size. It concludes with a description of mains dimmer dependencies and advice on solving potential dimmer problems. Fig 15. Typical response of PWMLIMIT pin 019aaa424 VPWMLIMIT (V) 0.4 1.6 1.20.8 160 240 480 lLED (mA)
300 V 150 V
[1] Data sheet SSL2103 — SMPS controller IC for dimmable LED lighting. [2] Data sheet SSL2101/SSL2102 — SMPS controller IC for dimmable LED lighting. [3] AN10754 — SSL2101 and SSL2102 dimmable mains LED driver. [4] AN10876 — Buck converter for SSL applications. Table 9. Abbreviations
Application note Rev. 1 — 24 December 2010 39 of 40 NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver 13. Legal information
13.1 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.
13.2 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. Safety of high-voltage evaluation products — The non-insulated high voltages that are present when operating this product, constitute a risk of electric shock, personal injury, death and/or ignition of fire. This product is intended for evaluation purposes only. It shall be operated in a designated test area by personnel that is qualified according to local requirements and labor laws to work with non-insulated mains voltages and high-voltage circuits. The product does not comply with IEC 60950 based national or regional safety standards. NXP Semiconductors does not accept any liability for damages incurred due to inappropriate use of this product or related to non-insulated high voltages. Any use of this product is at customer’s own risk and liability. The customer shall fully indemnify and hold harmless NXP Semiconductors from any liability, damages and claims resulting from the use of the product.
13.3 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
NXP Semiconductors AN10952 SSL2103 flexible, mains-dimmable LED driver © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 December 2010 Document identifier: AN10952 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 14. Contents 6.6 V