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ST7 ROUTINE FOR I2C SLAVE MODE MANAGEMENT by Microcontroller Division Application Team INTRODUCTION The goal of this application note is to present a useful example of communication using the I2C peripheral of the ST7. The ST7 microcontroller is used as a slave and can communicate with any master. This slave, through the I2C interface, receives data bytes from the master im- plementing error management and returns them. This application has been realized with a ST72264,7-bit, general call and 10-bit addressing mode.
1 ST7 I2C INTERFACE
The ST7 I2C peripheral allows multi master and slave communication with bus error manage- ment. In this application, only the single slave mode is used (with error management). The I2C synchronous communication needs only two signals: SCL (Serial clock line) and SDA (Serial data line). The corresponding port pins have to be configured as floating inputs (here PA4 and PA6). Please refer to the ST7 datasheet for more details.
1.1 COMMUNICATION SPEED
The ST7 I2C peripheral allows to communicate at different speeds. It is able to work in standard and fast I2C modes up to 400kHz. It’s the master which imposes the communication speed. For more details, please refer to the AN971.
1.2 START, STOP CONDITION AND ACKNOWLEDGE GENERATION
The Start and Stop conditions are sent by the master. An Acknowledge is sent after an address or a data byte is received when the ACK bit is set in the Control register (CR).
1.3 TRANSFER SEQUENCING
Figure 1. I2C Slave Transfer Sequencing Diagram Legend:S=Start, P=Stop, A=Acknowledge, NA=Non-Acknowledge, EVx=Event (with interruptif ITE=1). EV1: EVF=1, ADSL=1, cleared by reading SR1 register. EV2: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register. EV3: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register. EV3_1: EVF=1, AF=1, cleared by reading SR1 register. EV4: EVF=1, STOPF=1, cleared by reading SR2 register. In blue are events sent by the master whereas blank ones are events sent by the slave. by the master and sometimes by the slave.
1.4 SLAVE EVENT FLAGS AND INTERRUPT GENERATION
Figure 2. Slave Interrupt Events Diagram
- EVF can also be set by EV6 or an error from the SR2 register.
2 ST7 I2C COMMUNICATION APPLICATION
2.1 HARDWARE CONFIGURATION
used as a slave which communicates with any master through an I2C bus interface. Figure 3. ST7 I2C Communication Application
2.2 ST7 I2C PERIPHERAL BASIC DRIVERS
In this chapter all registers refer to the ST7 I2C peripheral ones (otherwise specified).
2.2.1 Initialize the I2C peripheral
In this application the initialization of the ST7 I2C peripheral is done completely by software. are touched to clear all possible pending event. ACK bit of the Control register (CR) is set.
2.2.2 Slave Communication on the I2C Bus
GCAL_Add in user customizable part of the code.
ST7 ROUTINE FOR I2C SLAVE MODE MANAGEMENT When the address received matches, the interface generates in sequence: - Acknowledge pulse if the ACK bit is set. - EVF and ADSL are set with an interrupt if ITE bit is set. Then the interface waits for a read of SR1 register, holding the SCL line low. Then it deter- mines from the TRA bit of the SR1 register if the slave has to be receiver or transmitter. - TRA = 0: Data byte received (if BTF=1) - TRA=1: Data byte transmitted
2.2.3 Receiving Data on the I2C Bus
The slave then receives bytes from the SDA line into the DR register via the internal shift in- terface. After each byte, the interface generates in sequence: - Acknowledge pulse if the ACK bit is set. - EVF and BTF bits are set with an interrupt if ITE bit is set. Then the interface waits for a read of the SR1 register followed by a read of the DR register (see Transfer Sequencing). After each reception, the data bytes received are placed in a table. If an error occurs, the in- terface is re-initialized (I2CCR cleared and put to its initial value after having removed pending interrupts) and the slave waits for next start condition.
2.2.4 Sending Data on the I2C Bus
When the slave receives start condition and matching slave address (with LSB set) from the master, it becomes transmitter and then sends the master back data it stored into a table. It sends data from DR register to the SDA line via the internal shift register. The slave waits for a read of the SR1 register followed by a write of next data into the DR reg- ister (see Transfer Sequencing). When the acknowledge pulse is received: - the EVF and BTF bits are set by hardware with an interrupt if ITE bit is set. After the last data byte is transferred, a Stop condition is generated by the master. The inter- face detects this condition and sets: - EVF and STOPF bits with an interrupt if ITE bit is set. Then the interface waits for a read of the SR2 register. In this application, the TRA bit of the SR1 register is used as a flag to determine the mode (re- ceiver or transmitter) of the microcontroller.
2.3 COMMUNICATION
Figure 4. Communication Flow – a reception of 3 data bytes from any master. – a transmission of received data bytes to the master. Figure 5. Main Program Flowchart
Figure 6. Interrupt Flowchart
ST7 ROUTINE FOR I2C SLAVE MODE MANAGEMENT
3 SOFTWARE
All the source files in assembly code are given in the zip file with this application note. The source files are for guidance only. STMicroelectronics shall not be held liable for any di- rect, indirect or consequential damages with respect to any claims arising from use of this soft- ware.
ST7 ROUTINE FOR I2C SLAVE MODE MANAGEMENT THE PRESENT NOTE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH A NOTE AND/OR THE USE MADE BY CUSTOMERS OF THE INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved. Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips. STMicroelectronics Group of Companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com