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PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER ELECTRONIC SPECIFICATIONS parameter conditions/description min nom max units power supply 4.5 5 5.5 V current consumption 81 0 m A output resolution 4,096 incr. quadrature resolution 96, 192, 200, 250, 384, 400, 500, 512, 768, 800, 1000, 1024 incremental output signals Quadrature A, B signals and Index Z incremental output waveform square wave incremental outputs output voltage - sourcing to +5 V @ -32 mA output voltage - sinking to ground @ -32 mA 3.8 0.55 V V SPI output natural binary SPI bus PIC 16F690 (see datasheet) SPI resolution 12 bit accuracy 2 incr. MECHANICAL SPECIFICATIONS parameter conditions/description min nom max units SPI speed 8,000 RPM mounting options A) 2 each M1.6 on 16 mm (0.63”) bolt circle B) 2 each #4 on 19.05 mm (0.75”) bolt circle C) 2 each M1.6 or M2 on 20 mm (0.787”) bolt circle D) 3 each M1.6 or M2 on 20.9 mm (0.823”) bolt circle with washers in option B holes E) 3 each M1.6 or M2 on 22 mm (0.866”) bolt circle F) 4 each M1.6 or M2 on 25.4 mm (1”) bolt circle THE AMT203 is a high performance absolute encoder based on capacitive sensing technology. The AMT203 utilizes a custom ASIC to create absolute position over a single turn. This encoder is12 bit and communicates via an SPI serial bus for working as a slave to an external microprocessor. Incremental A,B and Index signals are provided for higher speed operation. Incremental A,B signals with a single index pulse per 360 deg are provided for higher speed operation. ENVIRONMENTAL SPECIFICATIONS parameter conditions/description min nom max units operating temperature -40 125 °C humidity 85 %RH vibration 1.5mm, 3 directions, 2 hours 10 55 Hz
FEATURES
- 12 bit (4096 positions) - SPI communication - Small Size 37mm - Incremental Line count up to 1024 - Single pulse index - Capacitive ASIC technology - Modular locking hub design for ease of installation - SPI adjustable settings - ‘One Touch’ zero position
PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER AMT203-V KIT In order to provide maximum flexibility for our customers, the AMT203 series is provided in kit form standard. This allows the user to implement the encoder into a range of applications using one sku#, reducing engineering and inventory costs. (4.76mm) 3mm4mm m m2mm5 3/16 inch1/4 inch (6.35mm) (3.175mm)6mm8mm 1/8 inch Snow eulB ykS thgiLegnarO1elpruP06yarG1wolleY1deR Green1Blue SLEEVES ADAPTER SHAFTBASE TOOL A TOP COVER TOOL C CUSTOM CONFIG KEY For customers that prefer a specific AMT203 configuration, please reference the custom configuration key below. AMT203 - XXXX - XXXX Sleeve Bore Diameter: 2000 = 2 mm 3000 = 3 mm 4000 = 4 mm 5000 = 5 mm 6000 = 6 mm 8000 = 8 mm Resolution (ppr): 0096 0192 0200 0250 0400 0500 0512 0640 1024
(Cable available without Demo Board Connector) Encoder Side Demo Board Side 10 conductor 1.27 mm pitch
28 AWG
(304.8) 1' 0.25" Samtec ISDF-07-D PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER PINOUT CONNECTOR 1 FUNCTION SPI X A B 5 V+ GND T_Bit CSB MISO SCK MOSI N/A N/A N/A N/A B 14 8 SCALE 4 : 1 212 311 DETAIL B ENCODER INTERFACE
PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER AMT203 ABS US Patent No. 6892590 SCALE 5:1 18.60mm R1.20mm 5.30mm 0.55 R2.10 0.083 25.48 1.003 1.70 0.067 (2 PLCS) 16.00 0.630 0.116 (2 PLCS) 2.00 0.079 (4 PLCS) 22.00 0.866 21.45 0.844 20.90 0.823 19.05 0.750 2.95 12.60 0.496 15.33 0.604 A (3 PLCS) 10.93 0.430 37.39 1.472 10.34 0.407 15.30 0.602R 0.61015.49 28.58 1.125 SPECIFIED ±0.05mm UNLESS OTHERWISE TOLERANCE: RoHSDETAIL A SCALE 4 : 1
- Initialization mode: At power up the encoder goes through an initiation and stabilization procedure. This includes microprocessor stabilization and the program for combining Coarse and Fine channel of the encoder for getting the absolute start position. This takes less than 0.1 seconds.
- Tracking mode: Only the Fine channel is active and the MCU internal position register is updated with data from Fine: – MCU 12 bit position register is updated from Fine every 48 μs. – For accurate position update without above time delay, outputs for incremental A quad B or Count and Up/Dwn from the Fine channel are provided. These outputs are operational up to 8000 RPM and there is no speed error. There is an acceleration error dependent on an internal filter constant of about 100 μs. – When using the incremental output there also is an Index output available, with one index pulse per turn. Serial Peripheral Interface Commands The SPI or Serial Peripheral Interface Bus is a standard interface promoted by Motorola and Microchip among others. It consists of 4 signals: MOSI: Master Out Slave In MISO: Master In Slave Out SCK: Serial Clock CSB: Chip Select (active low) SPI BUS The SPI bus runs full duplex and transfers multiples of 8 bits in a frame. The SPI type is the most common (CPOL=0, CPHA=0), also known as Microwire. Data is captured on the rising edge of SCK and the output data is changed after the falling edge of SCK. Serial Peripheral Interface Bus (SPI) on AMT203 Figure 7: SPI BUS Timing Diagram The msb data out on MISO is valid soon after CSB goes low. The MOSI data is valid soon after the falling edge of SCK. The Encoder drives data out on MISO as long as CSB is low. Normally, CSB goes low, then after 8 clocks the command is interpreted. CSB high resets the clock counter, and terminates any command sequence. SCK MISO MOSI CSB MSB LSB MSB LSB Setup Terminology MSB = most significant byte LSB = least significant byte msb = most significant bit lsb = least significant bit PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER
SPI Commands: The commands are all 8 bits long, the msb is shifted in first, and is the leftmost bit shown in Figure 7. Encoder Protocol Considerations: The Encoder is designed to operate with a high speed SPI link, in full duplex mode. This implies the host can is- sue commands and read data as quickly as necessary but there has to be an acknowledgement from the slave just before the data is transferred. Essentially the host issues a command, receives zero or more wait sequences (0xA5 or 1010,0101) then the echo of the command followed by an optional payload. So, for example to read the position, the host issues rd_pos (0x10 or 0001,0000), receiving a series of wait sequences (0xA5) then a reflected rd_pos (0x10), then the MSB data followed by the LSB data. It is recommended that the host leave a 20 us gap between reads to avoid extending the read time by forcing wait sequences. Command 0x00: nop_a5 This command is ignored by the Encoder and simply causes the next data to be read. The encoder responds with 0xA5 if there is nothing else to send. Command 0x10: rd_pos This command causes a read of the current position. The sequence is as follows: 1) issue read command, receive idle character 2) issue NOP, receive idle character 0xA5 or 0x10 3) repeat step 2 if it is 0xA5 4) issue NOP and receive MSB position (4 bits valid data) 5) issue NOP and receive LSB position (8 bits valid data) Note that it is possible to overlap commands, so instead of NOP is several steps above the user could start another operation. The read and write FIFOs for the PCI streams are 16 bytes long and it is up to the user to avoid overflow. Command 0x70: set_zero_point This command sets the current position to zero and saves this setting in the EEPROM. The host should send nop_a5 repeatedly after sending this command, the response will be 0xa5 while update is proceeding and 0x80 is the response when update is finished. PART NUMBER: DESCRIPTION: AMT203 12 BIT ABSOLUTE ENCODER