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REV. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002. All rights reserved. AMP02 High Accuracy Instrumentation Amplifier FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION The AMP02 is the first precision instrumentation amplifier available in an 8-lead package. Gain of the AMP02 is set by a single external resistor and can range from 1 to 10,000. No gain set resistor is required for unity gain. The AMP02 includes an input protection network that allows the inputs to be taken 60 V beyond either supply rail without damaging the device. Laser trimming reduces the input offset voltage to under 100 µV. Output offset voltage is below 4 mV, and gain accuracy is better than 0.5% for a gain of 1000. ADI’s proprietary thin-film resis- tor process keeps the gain temperature coefficient under 50 ppm/°C. Due to the AMP02’s design, its bandwidth remains very high over a wide range of gain. Slew rate is over 4 V/ µs, making the AMP02 ideal for fast data acquisition systems. A reference pin is provided to allow the output to be referenced to an external dc level. This pin may be used for offset correc- tion or level shifting as required. In the 8-lead package, sense is internally connected to the output. For an instrumentation amplifier with the highest precision, consult the AMP01 data sheet.

FEATURES

Low Offset Voltage: 100 /H9262V max Low Drift: 2 /H9262V//H11543C max Wide Gain Range: 1 to 10,000 High Common-Mode Rejection: 115 dB min High Bandwidth (G = 1000): 200 kHz typ Gain Equation Accuracy: 0.5% max Single Resistor Gain Set Input Overvoltage Protection Low Cost Available in Die Form

APPLICATIONS

Programmable Gain Instrumentation Amplifier Medical Instrumentation Data Acquisition Systems 8-Lead PDIP and CERDIP 1RG1 –IN +IN RG2 OUT REFERENCE 16-Lead SOIC 1NC RG1 NC –IN 5+IN NC NC NC = NO CONNECT NC RG2 NC SENSE OUT REFERENCE NC RG1 RG2 RG +IN –IN OUT REFERENCE G = = + 1VOUT (+IN) – (–IN) 50k/H9024 RG() FOR SOL CONNECT SENSE TO OUTPUT Figure 1. Basic Circuit Connections

REV. E–2– AMP02–SPECIFICATIONS AMP02E AMP02F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit OFFSET VOLTAGE Input Offset Voltage V IOS TA = 25°C2 0 100 40 200 µV –40°C ≤ TA ≤ +85°C5 0 200 100 350 µV Input Offset Voltage Drift TCV IOS –40°C ≤ TA ≤ +85°C 0.5 2 1 4 µV/°C Output Offset Voltage V OOS TA = 25°C1 4 2 8 m V –40°C ≤ TA ≤ +85°C4 1 0 9 2 0 m V Output Offset Voltage Drift TCV OOS –40°C ≤ TA ≤ +85°C5 0 100 100 200 µV/°C Power Supply Rejection PSR V S = ± 4.8 V to ± 18 V G = 100, 1000 115 125 110 115 dB G = 10 100 110 95 100 dB G = 1 80 90 75 80 dB V S = ± 4.8 V to ± 18 V –40°C ≤ TA ≤ +85°C G = 1000, 100 110 120 105 110 dB G = 10 95 110 90 95 dB G = 1 75 90 70 75 dB INPUT CURRENT Input Bias Current I B TA = 25°C2 1 0 4 2 0 n A Input Bias Current Drift TCI B –40°C ≤ TA ≤ +85°C 150 250 pA/ °C Input Offset Current I OS TA = 25°C 1.2 5 2 10 nA Input Offset Current Drift TCI OS –40°C ≤ TA ≤ +85°C9 1 5 pA/°C INPUT Input Resistance R IN Differential, G ≤ 1000 10 10 G Ω Common Mode, G = 1000 16.5 16.5 G Ω Input Voltage Range IVR T A = 25°C1 ± 11 ± 11 V Common-Mode Rejection CMR V CM = ± 11 V G = 1000, 100 115 120 110 115 dB G = 10 100 115 95 110 dB G = 1 80 95 75 90 dB V CM = ± 11 V –40°C ≤ TA ≤ +85°C G = 100, 1000 110 120 105 115 dB G = 10 95 110 90 105 dB G = 1 75 90 70 85 dB GAIN Gain Equation G = 1000 0.50 0.70 % Accuracy G = 50 kΩ +1 G = 100 0.30 0.50 %RG G = 10 0.25 0.40 % G = 1 0.02 0.05 % Gain Range G 1 10k 1 10k V/V Nonlinearity G = 1 to 1000 0.006 0.006 % Temperature Coefficient G TC 1 ≤ G ≤ 10002, 3 20 50 20 50 ppm/ °C OUTPUT RATING Output Voltage Swing V OUT TA = 25°C, RL = 1 kΩ± 12 ± 13 ± 12 ±13 V RL = 1 kΩ, –40°C ≤ TA ≤ +85°C ± 11 ± 12 ± 11 ±12 V Positive Current Limit Output-to-Ground Short 22 22 mA Negative Current Limit Output-to-Ground Short 32 32 mA NOISE Voltage Density, RTI e n fO = 1 kHz G = 1000 9 9 nV/ √Hz G = 100 10 10 nV/ √Hz G = 10 18 18 nV/ √Hz G = 1 120 120 nV/ √Hz Noise Current Density, RTI i n fO = 1 kHz, G = 1000 0.4 0.4 pA/ √Hz Input Noise Voltage e n p-p 0.1 Hz to 10 Hz G = 1000 0.4 0.4 µV p-p G = 100 0.5 0.5 µV p-p G = 10 1.2 1.2 µV p-p DYNAMIC RESPONSE Small-Signal Bandwidth BW G = 1 1200 1200 kHz (–3 dB) G = 10 300 300 kHz G = 100, 1000 200 200 kHz Slew Rate SR G = 10, R L = 1 kΩ 46 4 6 V / µs Settling Time t S To 0.01% ± 10 V Step G = 1 to 1000 10 10 µs SENSE INPUT Input Resistance R IN 25 25 k Ω Voltage Range ± 11 ±11 V REFERENCE INPUT Input Resistance R IN 50 50 k Ω Voltage Range ± 11 ± 11 V Gain to Output 11 V / V ELECTRICAL CHARACTERISTICS (@ VS = /H1155015 V, VCM = 0 V, TA = 25/H11543C, unless otherwise noted.)

1Input voltage range guaranteed by common-mode rejection test. 3Gain tempco does not include the effects of external component drift. Specifications subject to change without notice. Figure 2. Simplified Schematic conditions for extended periods may affect device reliability. printed circuit board for SOIC package.

REV. E–4– AMP02 1. RG1 2. –IN 3. +IN 4. V– 5. REFERENCE 6. OUT 7. V+ 8. RG 9. SENSE CONNECT SUBSTRA TE TO V– DIE SIZE 0.103 inch /H11547 0.116 inch, 11,948 sq. mils (2.62 mm /H11547 2.95 mm, 7.73 sq. mm) NOTE: PINS 1 and 8 are KEL VIN CONNECTED Die Characteristics WAFER TEST LIMITS* (@ VS = /H1155015 V, VCM = 0 V, TA = 25/H11543C, unless otherwise noted.) AMP02 GBC Parameter Symbol Conditions Limits Unit Input Offset Voltage V IOS 200 µV max Output Offset Voltage V OOS 8 mV max VS = ±4.8 V to ±18 V G = 1000 110 Power Supply PSR G = 100 110 dB Rejection G = 10 95 G = 1 75 Input Bias Current I B 20 nA max Input Offset Current I OS 10 nA max Input Voltage Range IVR Guaranteed by CMR Tests ±11 V min VCM = ±11 V G = 1000 110 Common-Mode CMR G = 100 110 dB Rejection G = 10 95 G = 1 75 Gain Equation Accuracy G = 50 kΩ RG +1, G=1000 0.7 % max Output Voltage Swing V OUT RL = 1 kΩ± 12 V min Supply Current I SY 6 mA max *Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through samp le lot assembly and testing. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AMP02 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. E Typical Performance Characteristics–AMP02 –5– INPUT OFFSET VOL T AGE – /H9262V NUMBER OF UNITS 1100 –100 –80 –60 –40 –30 0 20 40 60 80 100 1000 900 800 700 600 500 400 300 200 100 TA = 25/H11543C VS = /H1155015V

3000 UNITS

TPC 1. Typical Distribution of Input Offset Voltage OUTPUT OFFSET VOL T AGE – mV NUMBER OF UNITS 1100 1000 900 800 700 600 500 400 300 200 100 TA = 25/H11543C VS = /H1155015V TPC 4. Typical Distribution of Output Offset Voltage TEMPERA TURE – /H11543C INPUT OFFSET CURRENT – nA 3.0 –50 05 0 7 5 100 2.5 2.0 1.5 1.0 0.5 VS = /H1155015V VCM = 0V –25 25 TPC 7. Input Offset Current vs. Temperature TCVIOS – /H9262V//H11543C NUMBER OF UNITS 160 140 120 100

400 UNITS

VS = /H1155015V TPC 2. Typical Distribution of TCVIOS TCVOOS – /H9262V//H11543C NUMBER OF UNITS 200 0 20 40 60 80 100 120 140 160 175 150 125 100 VS = /H1155015V TPC 5. Typical Distribution of TCVOOS TEMPERA TURE – /H11543C INPUT BIAS CURRENT – nA –50 05 0 7 5 100 VS = /H1155015V VCM = 0V –25 25 TPC 8. Input Bias Current vs. Temperature POWER SUPPL Y VOL T AGE – V INPUT OFFSET VOL T AGE – /H9262V 0 /H115505 /H1155010 /H1155015 /H1155020 –10 TA = 25/H11543C TPC 3. Input Offset Voltage Change vs. Supply Voltage POWER SUPPL Y VOL T AGE – V INPUT OFFSET VOL T AGE – mV 1.5 0 /H115505 /H1155010 /H1155015 /H1155020 1.0 0.5 –0.5 –1.0 –1.5 TA = 25/H11543C TPC 6. Output Offset Voltage Change vs. Supply Voltage POWER SUPPL Y VOL T AGE – V INPUT BIAS CURRENT – nA 0 /H1155010 /H1155015 /H1155020 VS = /H1155015V VCM = 0V /H115505 TPC 9. Input Bias Current vs. Supply Voltage

REV. E–6– AMP02 FREQUENCY – Hz VOLTAGE GAIN – dB 1k 100k 1M 10M –20 –40 TA = 25/H11543C VS = /H1155015V 10k G = 1000 G = 100 G = 10 G = 1 TPC 10. Closed-Loop Voltage Gain vs. Frequency FREQUENCY – Hz POWER SUPPL Y REJECTION – dB 1 10k 100k TA = 25/H11543C VS = /H1155015V /H9004VS = /H115501V 100 100 120 140 1k10 G = 1 G = 10 G = 1000 G = 100 TPC 13. Positive PSR vs. Frequency FREQUENCY – Hz VOLTAG E NOISE DENSITY – nV/ Hz 1 10k 100k TA = 25/H11543C VS = /H1155015V G = 1000 100 1k10 TPC 16. Voltage Noise Density vs. Frequency FREQUENCY – Hz COMMON-MODE REJECTION – dB 1 100 1k 100k TA = 25/H11543C VS = /H1155015V VCM = 2V p-p G = 1000 G = 100 G = 10 G = 1 100 120 140 10k TPC 11. Common-Mode Rejection vs. Frequency FREQUENCY – Hz POWER SUPPL Y REJECTION – dB 1 10k 100k TA = 25/H11543C VS = /H1155015V /H9004VS = /H115501V 100 100 120 140 1k10 G = 1 G = 10 G = 1000 G = 100 TPC 14. Negative PSR vs. Frequency VOLTAGE GAIN – G VOLTAG E NOISE – nV/ Hz 1 100 1k TA = 25/H11543C VS = /H1155015V f = 1kHz 100 TPC 17. RTI Voltage Noise Density vs. Gain VOLTAGE GAIN – G COMMON-MODE REJECTION – dB 1 100 1k TA = 25/H11543C VS = /H1155015V 100 110 120 130 140 TPC 12. Common-Mode Rejection vs. Voltage Gain FREQUENCY – Hz TOTAL HARMONIC DISTORTION – % 10 1k 10k 0.01 TA = 25/H11543C VS = /H1155015V RL = 600/H9024 VOUT = 20V p-p 100 0.010 0.100 1.000 G = 100 G = 1 G = 10 TPC 15. Total Harmonic Distortion vs. Frequency TIME – S 1s100mV NOISE VOL T AGE – 200nV/DIV TPC 18. 0.1 Hz to 10 Hz Noise AV = 1000

REV. E AMP02 –7– FREQUENCY – Hz PEAK- TO-PEAK AMPLITUDE – V 100 10k 100k 1M TA = 25/H11543C VS = /H1155015V RL = 1k/H9024 TPC 19. Maximum Output Swing vs. Frequency SUPPL Y VOL T AGE – V SUPPL Y CURRENT – mA 0 /H1155020 TA = –25/H11543C, +25/H11543C, +85/H11543C /H1155010 /H1155015/H115505 TPC 22. Supply Current vs. Supply Voltage LOAD RESIST ANCE – /H9024 OUTPUT VOL T AGE – V 10 1k 10k 100k TA = 25/H11543C VS = /H1155015V 100 TPC 20. Maximum Output Voltage vs. Load Resistance VOLTAGE GAIN – G SLEW RA TE – V/H9262s 1 100 1k TA = –40/H11543C, +25/H11543C, +85/H11543C VS = /H1155015V TPC 23. Slew Rate vs. Voltage Gain FREQUENCY – Hz OUTPUT IMPEDANCE – /H9024 100 1M 10M –20 TA = 25/H11543C VS = /H1155015V IOUT = 20mA p-p 10k 100 120 100k1k TPC 21. Closed Loop Output Impedance vs. Frequency

resistors are recommended for best results. AMP02 independent of the external gain set resistor is 50 ppm/°C. TCVOS performance of the AMP02, which is typically 0.5 µV/°C. mounted parallel to a thermal gradient. ance amplifiers followed by a unity-gain differential amplifier. Figure 3. The AMP02 Keeps Its Bandwidth at specifications and G is the amplifier gain. signal source resistance appear as an additional offset voltage. nitude of the error is the offset current times the source resistance. inputs and analog ground to ensure correct amplifier operation. close to the signal source for best common-mode rejection.

Figure 5. AMP02’s Input Protection Circuitry Limits Input practical circuit requires careful attention to external influences.

REV. E AMP02 –11– OUTLINE DIMENSIONS 8-Lead Plastic Dual-in-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) SEATING PLANE 0.015 (0.38) MIN 0.180 (4.57) MAX 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 1 4 5 0.295 (7.49) 0.285 (7.24) 0.275 (6.98) 0.100 (2.54) BSC 0.375 (9.53) 0.365 (9.27) 0.355 (9.02) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA 8-Lead Ceramic DIP - Glass Hermetic Seal [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) 1 4 0.310 (7.87) 0.220 (5.59)PIN 1 0.005 (0.13) MIN 0.055 (1.40) MAX 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) SEATING PLANE 0.200 (5.08) MAX 0.405 (10.29) MAX 0.150 (3.81) MIN 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16-Lead Standard Small Outline Package [SOIC] Wide Body (R-16) Dimensions shown in millimeters and (inches) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-013AA SEATING PLANE 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) BSC 16 9 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 0.32 (0.0126) 0.23 (0.0091) 8/H11543 0/H11543 0.75 (0.0295) 0.25 (0.0098)/H11547 45/H11543 1.27 (0.0500) 0.40 (0.0157)COPLANARITY 0.10

REV. E C00248–0–1/03(E) PRINTED IN U.S.A. –12– AMP02

Revision History

1/03—Data Sheet changed from REV. D to REV. E.