AMMC-5023 HP | Alldatasheet
Document overview
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- PDF pages: 9
Technical content
Features
- Frequency range: 21.2 – 26.5 GHz
- High gain: 23 dB
- Low noise figure: 2.3 dB Input and output return loss: >10 dB
- Single supply bias: 5 volts, 28 mA
- Optional bias adjust
Applications
- Digital Radio Communication Systems (21.2–23.6 GHz and 24.5–26.5 GHz)
- Any narrow band application within 21 –26 GHz
- 24.1 GHz collision avoidance
- Front-end gain stage Absolute Maximum Ratings [1] Symbol Parameters/Conditions Units Min. Max. VD1, VD2 Drain Supply Voltage V 8 VG1, VG2 Gate Supply Voltage V 0.4 2 ID1 Drain Supply Current mA 35 ID2 Drain Supply Current mA 35 Pin RF Input Power dBm 15 Tch Channel T emperature °C +150 Tb Operating Backside Temperature °C -55 +140 Tstg Storage T emperature °C -65 +165 Tmax Max. Assembly T emp (60 sec max) °C +300 Notes: 1. Absolute maximum ratings for continuous operation unless otherwise noted. Chip Size: 1880 x 600 µm (74 x 23.6 mils) Chip Size T olerance: ±10 µm (±0.4 mils) Chip Thickness: 100 ± 10 µm (4 ± 0.4 mils) Pad Dimensions: 80 x 80 µm (3.1 x 3.1 mils), or larger
AMMC-5023 DC Specifications/Physical Properties[1] Symbol Parameters and Test Conditions Units Min. Typ. Max. VD1, VD2 Recommended Drain Supply Voltage V 3 5 7 VG1, VG2 Gate Supply Voltage[2] (VD1 ≤ VD1(max), VD2 ≤ VD2(max)) V 0.8 ID1, ID2 Input and Output Stage Drain Supply Current (VG1 = VG2 = Open, VD1 = VD2 = 5 V) mA 14 ID1+ID2 T otal Drain Supply Current (VG1 = VG2 = Open, VD1 = VD2 = 5 V) mA 13 28 35 θch-b Thermal Resistance[3] (Backside temperature, Tb = 25°C) °C/W 44 Notes: 1. Backside ambient operating temperature TA = 25°C unless otherwise noted. 2. Open circuit voltage at VG1 and VG2 when VD1 and VD2 are 5 Volts. 3. Channel-to-backside Thermal Resistance (θch-b) = 66°C/W at Tchannel (Tc) = 150°C as measured using the liquid crystal method. Thermal Resistance at backside temperature (Tb) = 25°C calculated from measured data. RF Specifications[4] (VG1 = VG2 = Open, VD1 = VD2 = 5V, ID1 + ID2 = 28 mA, Zin = Z0 = 50Ω) 21.2– 23.6 GHz 24.5 – 26.5 GHz |S21|2 Small-signal Gain dB 21 23.6 28 17 19 25 ∆|S21|2 Small-signal Gain Flatness dB ±1.5 ±1.2 RLin Input Return Loss dB 10 12 10 11.5 RLout Output Return Loss dB 9 12 10 17 |S12|2 Isolation dB 40 50 40 43 P-1dB Output Power @ 1 dB Gain Compression dBm 9.5 10 f = 23 GHz Psat Saturated Output Power dBm 10.5 11.5 (@ 3 dB Gain Compression) OIP3 Output 3 rd Order Intercept Point, 22.4 GHz dB 18 Rfin1 = Rfin2 = -20 dBm, ∆f = 2 MHz 25.5 GHz 24 NF Noise Figure 22 GHz dB 2.3 2.8 25 GHz 2.3 2.8 Note:
AMMC-5023 Typical Scattering Parameters[1] (Tc = 25°C, VD1 = VD2 = 5V, Idd = 28 mA, VG1 = VG2 = Open) Freq. S 11 S12 S21 S22 GHz dB Mag Phase dB Mag Phase dB Mag Phase dB Mag Phase Note: 1. Data obtained from on-wafer measurements.
Figure 20. AMMC-5023 Assembly Diagrams. (a) Single DC Drain Supply Voltage. (b) Assembly for custom biasing of output gain stages using an external chip-resistor.
Figure 21. AMMC-5023 Bonding Pad Locations. (dimensions in micrometers) distributors, please go to our web site. Copyright © 2003 Agilent Technologies, Inc.