AMIS-42665 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 11
Technical content
Features
- Wake−up (WU) Over Bus
- V oltage Source via VSPLIT Pin for Stabilizing the Recessive Bus Level (Further EMC Improvement)
- Ideal Passive Behavior when Supply V oltage is Removed
- Extremely Low Current Standby Mode
- Compatible with the ISO 11898 Standard (ISO 11898−2, ISO 11898−5 and SAE J2284)
- High Speed (up to 1 Mbps)
- Ideally Suited for 12 V and 24 V Industrial and Automotive
Applications
- Extremely Low Current Standby Mode with Wake−up via the Bus
- Low EME Common−Mode Choke is No Longer Required
- Differential Receiver with Wide Common−Mode Range (/C003635 V) for High EMS
- Transmit Data (TxD) Dominant Time−out Function
- Thermal Protection
- Bus Pins Protected against Transients in an Automotive Environment
- Power Down Mode in which the Transmitter is Disabled
- Bus and VSPLIT Pins Short Circuit Proof to Supply V oltage and Ground
- Logic Level Inputs Compatible with 3.3 V Devices
- These are Pb−Free Devices http://onsemi.com (Top View) TxD RxD STB GND CANL CANH AMIS− 42665 PC20040829.1 See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
8 XXXXX
/C0071 XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week /C0071 = Pb−Free Package MARKING DIAGRAM SOIC−8 CASE 751 PIN ASSIGNMENT
Table 1. TECHNICAL CHARACTERISTICS Figure 1. Block Diagram
8 CANH
Figure 2. Application Diagram Table 2. PIN LIST AND DESCRIPTIONS
1 TxD Transmit Data Input; Low Input → Dominant Driver; Internal Pullup Current
2 GND Ground
3 VCC Supply Voltage
4 RxD Receive Data Output; Dominant transmitter → Low Output
5 VSPLIT Common−Mode Stabilization Output
6 CANL Low−Level CAN Bus Line (Low in Dominant Mode)
7 CANH High−Level CAN Bus Line (High in Dominant Mode)
8 STB Standby Mode Control Input
Table 3. ABSOLUTE MAXIMUM RATINGS
- Applied transient waveforms in accordance with ISO 7637 part 3, test pulses 1, 2, 3a, and 3b (see Figure 5).
- Standardized human body model electrostatic discharge (ESD) pulses in accordance to MIL883 method 3015.7.
- Static latch −up immunity: Static latch−up protection level when tested according to EIA/JESD78.
- Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3 −1993.
Table 4. THERMAL CHARACTERISTICS AMIS−42665 provides two modes of operation as illustrated in Table 5. These modes are selectable through pin STB. Table 5. OPERATING MODES
AMIS−42665 http://onsemi.com
ELECTRICAL CHARACTERISTICS
All voltages are referenced to GND (Pin 2). Positive currents flow into the IC. Sinking current means the current is flowing into the pin; sourcing current means the current is flowing out of the pin. CHARACTERISTICS VCC = 4.75 V to 5.25 V; TJ = −40°C to +150°C; RLT = 60 /C0087 unless specified otherwise. Symbol Parameter Conditions Min Typ Max Unit SUPPLY (PIN VCC) ICC Supply Current Dominant; VTxD = 0 V Recessive; VTxD = VCC mA ICCS Supply Current in Standby Mode TJ,max = 100°C 10 15 /C0109A TRANSMITTER DATA INPUT (PIN TxD) VIH High−Level Input Voltage Output Recessive 2.0 − VCC + 0.3 V VIL Low−Level Input Voltage Output Dominant −0.3 − +0.8 V IIH High−Level Input Current VTxD = VCC −5 0 +5 /C0109A IIL Low−Level Input Current VTxD = 0 V −75 −200 −350 /C0109A Ci Input Capacitance Not Tested − 5 10 pF TRANSMITTER MODE SELECT (PIN STB) VIH High−Level Input Voltage Standby Mode 2.0 − VCC + 0.3 V VIL Low−Level Input Voltage Normal Mode −0.3 − +0.8 V IIH High−Level Input Current VSTB = VCC −5 0 +5 /C0109A IIL Low−Level Input Current VSTB = 0 V −1 −4 −10 /C0109A Ci Input Capacitance Not Tested − 5 10 pF RECEIVER DATA OUTPUT (PIN RxD) Ioh High−Level Output Current Vo = 0.7 x VCC −5 −10 −15 mA Iol Low−Level Output Current Vo = 0.3 x VCC 5 10 15 mA BUS LINES (PINS CANH AND CANL) Vo(reces) (norm) Recessive Bus Voltage Normal Mode VTxD = VCC; No Load 2.0 2.5 3.0 V Vo(reces) (stby) Recessive Bus Voltage VTxD = VCC; No Load Standby Mode −100 0 100 mV Io(reces) (CANH) Recessive Output Current at Pin CANH −35 V < VCANH < +35 V; 0 V < VCC < 5.25 V −2.5 − +2.5 mA Io(reces) (CANL) Recessive Output Current at Pin CANL −35 V < VCANL < +35 V; 0 V < VCC < 5.25 V −2.5 − +2.5 mA Vo(dom) (CANH) Dominant Output Voltage at Pin CANH VTxD = 0 V 3.0 3.6 4.25 V Vo(dom) (CANL) Dominant Output Voltage at Pin CANL VTxD = 0 V 0. 5 1.4 1.75 V Vo(dif) (bus_dom) Differential Bus Output Voltage (VCANH − VCANL) VTxD = 0 V; Dominant; 42.5 /C0087 < RLT < 60 /C0087 1.5 2.25 3.0 V Vo(dif) (bus_rec) Differential Bus Output Voltage (VCANH − VCANL) VTxD = VCC; Recessive; No Load −120 0 +50 mV Io(sc) (CANH) Short Circuit Output Current at Pin CANH VCANH = 0 V; VTxD = 0 V −45 −70 −120 mA Io(sc) (CANL) Short Circuit Output Current at Pin CANL VCANL = 36 V; VTxD = 0 V 45 70 120 mA Vi(dif) (th) Differential Receiver Threshold Voltage (see Figure 6) −5 V < VCANL < +12 V; −5 V < VCANH < +12 V; 0.5 0.7 0.9 V
AMIS−42665 http://onsemi.com CHARACTERISTICS VCC = 4.75 V to 5.25 V; TJ = −40°C to +150°C; RLT = 60 /C0087 unless specified otherwise. Symbol UnitMaxTypMinConditionsParameter BUS LINES (PINS CANH AND CANL) Vihcm(dif) (th) Differential Receiver Threshold Voltage for High Common−Mode (See Figure 6) −35 V < VCANL < +35 V; −35 V < VCANH < +35 V; 0.40 0.7 1.00 V Vi(dif) (hys) Differential Receiver Input Voltage Hysteresis (see Figure 6) −35 V < VCANL < +35 V; −35 V < VCANH < +35 V; 50 70 100 mV Ri(cm) (CANH) Common−Mode Input Resistance at Pin CANH 15 26 37 k/C0087 Ri(cm) (CANL) Common−Mode Input Resistance at Pin CANL 15 26 37 k/C0087 Ri(cm) (m) Matching Between Pin CANH and Pin CANL Common Mode Input Resistance VCANH = VCANL −3 0 +3 % Ri(dif) Differential Input Resistance 25 50 75 k/C0087 Ci(CANH) Input Capacitance at Pin CANH VTxD = VCC; Not Tested 7.5 20 pF Ci(CANL) Input Capacitance at Pin CANL VTxD = VCC; Not Tested 7.5 20 pF Ci(dif) Differential Input Capacitance VTxD = VCC; Not Tested 3.75 10 pF COMMON−MODE STABILIZATION (PIN VSPLIT) VSPLIT Reference Output Voltage at Pin VSPLIT Normal Mode; −500 /C0109A < ISPLIT < 500 /C0109A 0.3 x VCC − 0.7 x VCC ISPLIT(i) VSPLIT Leakage Current Standby Mode −5 +5 /C0109A ISPLIT(lim) VSPLIT Limitation Current Normal Mode −3 +3 mA POWER−ON−RESET (POR) PORL POR Level CANH, CANL, Vref in Tri−State Below POR Level 2.2 3.5 4.7 V THERMAL SHUTDOWN TJ(sd) Shutdown Junction Temperature 150 160 180 °C TIMING CHARACTERISTICS (see Figures 7 and 8) td(TxD−BUSon) Delay TXD to Bus Active Cl = 100 pF Between CANH to CANL 40 85 105 ns td(TxD−BUSoff) Delay TXD to Bus Inactive Cl = 100 pF Between CANH to CANL 30 60 105 ns td(BUSon−RXD) Delay Bus Active to RXD Crxd = 15 pF 25 55 105 ns td(BUSoff−RXD) Delay Bus Inactive to RXD Crxd = 15 pF 40 100 105 ns tpd(rec−dom) Propagation Delay TXD to RXD from Recessive−to−Dominant Cl = 100 pF Between CANH to CANL 90 230 ns td(dom−rec) Propagation Delay TXD to RXD from Dominant−to−Recessive Cl = 100 pF Between CANH to CANL 90 245 ns td(stb−nm) Delay Standby Mode to Normal Mode 5 7.5 10 /C0109s tdbus Dominant Time for Wake−up via Bus 0.75 2.5 5 /C0109s tdom(TxD) TxD Dominant Time for Time Out VTxD = 0 V 300 650 1000 /C0109s Baudrate Communication Speed Achievable 40k 1M bps
Figure 11. Basic Test Setup for Electromagnetic Measurement Figure 12. EME Measurements
96 Tube / Tray
Specifications Brochure, BRD8011/D.
AMIS−42665 http://onsemi.com PACKAGE DIMENSIONS SOIC−8 CASE 751−07 ISSUE AJ SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751 −01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 /C0466mm inches/C0467SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 AMIS−42665/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative