ALVTH16245

SN54ALVTH16245_07 TI | Alldatasheet

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SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation /C0068 Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V V CC ) /C0068 Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C /C0068 High Drive (–32/64 mA at 3.3-V VCC ) /C0068 Ioff and Power-Up 3-State Support Hot Insertion /C0068 Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating /C0068 Flow-Through Architecture Facilitates Printed Circuit Board Layout /C0068 Distributed VCC and GND Pins Minimize High-Speed Switching Noise /C0068 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

description

The ’ALVTH16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for 2.5-V or 3.3-V V CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE ) input can be used to disable the device so that the buses are effectively isolated. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When V CC is between 0 and 1.2 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Copyright  2002, Texas Instruments IncorporatedUNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. SN54ALVTH16245 . . . WD PACKAGE SN74ALVTH16245 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 V CC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 V CC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 V CC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V CC 2A5 2A6 GND 2A7 2A8 2OE

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002

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NC – No internal connection

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP – DL Tape and reel SN74ALVTH16245DLR ALVTH16245 40°Ct o8 5°C TSSOP – DGG Tape and reel SN74ALVTH16245GR ALVTH16245 –40°C to 85°C TVSOP – DGV Tape and reel SN74ALVTH16245VR VT245 VFBGA – GQL Tape and reel SN74ALVTH16245QR –55°C to 125°C CFP – WD Tube SNJ54ALVTH16245WD SNJ54ALVTH16245WD † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each 8-bit section) INPUTS OPERATION OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation SN74ALVTH16245 . . . GQL PACKAGE (TOP VIEW) J H G F E D C B A 213 4 65 K

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE Pin numbers shown are for the DGG, DGV, DL, and WD packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002

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recommended operating conditions, VCC = 2.5 V ± 0.2 V (see Note 3) SN54ALVTH16245 SN74ALVTH16245 UNIT MIN TYP MAX MIN TYP MAX UNIT VCC Supply voltage 2.3 2.7 2.3 2.7 V VIH High-level input voltage 1.7 1.7 V VIL Low-level input voltage 0.7 0.7 V VI Input voltage 0 VCC 5.5 0 VCC 5.5 V IOH High-level output current –6 –8 mA IOL Low-level output current 6 8 mAIOL Low-level output current; current duty cycle ≤ 50%; f ≥ 1 kHz 18 24 mA ∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V ∆t/∆VCC Power-up ramp rate 200 200 µs/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. recommended operating conditions, VCC = 3.3 V ± 0.3 V (see Note 3) SN54ALVTH16245 SN74ALVTH16245 UNIT MIN TYP MAX MIN TYP MAX UNIT VCC Supply voltage 3 3.6 3 3.6 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 0 VCC 5.5 0 VCC 5.5 V IOH High-level output current –24 –32 mA IOL Low-level output current 24 32 mAIOL Low-level output current; current duty cycle ≤ 50%; f ≥ 1 kHz 48 64 mA ∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V ∆t/∆VCC Power-up ramp rate 200 200 µs/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) PARAMETER TEST CONDITIONS SN54ALVTH16245 SN74ALVTH16245 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT VIK VCC = 2.3 V, II = –18 mA –1.2 –1.2 V VCC = 2.3 V to 2.7 V,IOH = –100 µA VCC –0.2 VCC –0.2 VOH VCC =23V IOH = –6 mA 1.8 V VCC = 2.3 V IOH = –8 mA 1.8 VCC = 2.3 V to 2.7 V,IOL = 100 µA 0.2 0.2 IOL = 6 mA 0.4 VOL VCC =23V IOL = 8 mA 0.4 V VCC = 2.3 V IOL = 18 mA 0.5 IOL = 24 mA 0.5 Control inputs VCC = 2.7 V, VI = VCC or GND ±1 ±1 Control inputs VCC = 0 or 2.7 V, VI = 5.5 V 10 10 II VI = 5.5 V 20 20 µA A or B ports VCC = 2.7 V VI = VCC 1 1 VI = 0 –5 –5 Ioff VCC = 0, VI or VO = 0 to 4.5 V ±100 µA IBHL ‡ VCC = 2.3 V, VI = 0.7 V 115 115 µA IBHH § VCC = 2.3 V, VI = 1.7 V –10 –10 µA IBHLO ¶ VCC = 2.7 V, VI = 0 to VCC 300 300 µA IBHHO # VCC = 2.7 V, VI = 0 to VCC –300 –300 µA IEX || VCC = 2.3 V, VO = 5.5 V 125 125 µA IOZ(PU/PD)/C0107 VCC ≤ 1.2 V, VO = 0.5 V to VCC , VI = GND or VCC , OE = don’t care ±100 ±100 µA ICC VCC = 2.7 V, IO = 0, Outputs low 2.3 4.5 2.3 4.5 mA VI = VCC or GND Outputs disabled 0.04 0.1 0.04 0.1 C i VCC = 2.5 V, VI = 2.5 V or 0 3.5 3.5 pF C io VCC = 2.5 V, VO = 2.5 V or 0 8 8 pF † All typical values are at VCC = 2.5 V, TA = 25°C. ‡ The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. § The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. ¶ An external driver must source at least IBHLO to switch this node from low to high. # An external driver must sink at least IBHHO to switch this node from high to low. ||Current into an output in the high state when VO > VCC/C0107 High-impedance state during power up or power down PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002

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electrical characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS SN54ALVTH16245 SN74ALVTH16245 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT VIK VCC = 3 V, II = –18 mA –1.2 –1.2 V VCC = 3 V to 3.6 V, IOH = –100 µA VCC –0.2 VCC –0.2 VOH VCC =3V IOH = –24 mA 2 V VCC = 3 V IOH = –32 mA 2 VCC = 3 V to 3.6 V, IOL = 100 µA 0.2 0.2 IOL = 16 mA 0.4 VOL IOL = 24 mA 0.5 VVOL VCC = 3 V IOL = 32 mA 0.5 V IOL = 48 mA 0.55 IOL = 64 mA 0.55 Control inputs VCC = 3.6 V, VI = VCC or GND ±1 ±1 Control inputs VCC = 0 or 3.6 V, VI = 5.5 V 10 10 II VI = 5.5 V 20 20 µA A or B ports VCC = 3.6 V VI = VCC 1 1 VI = 0 –5 –5 Ioff VCC = 0, VI or VO = 0 to 4.5 V ±100 µA IBHL ‡ VCC = 3 V, VI = 0.8 V 75 75 µA IBHH § VCC = 3 V, VI = 2 V –75 –75 µA IBHLO ¶ VCC = 3.6 V, VI = 0 to VCC 500 500 µA IBHHO # VCC = 3.6 V, VI = 0 to VCC –500 –500 µA IEX || VCC = 3 V, VO = 5.5 V 125 125 µA IOZ(PU/PD)/C0107 VCC ≤ 1.2 V, VO = 0.5 V to VCC , VI = GND or VCC , OE = don’t care ±100 ±100 µA ICC VCC = 3.6 V, IO = 0, Outputs low 3.2 5 3.2 5 mA VI = VCC or GND Outputs disabled 0.07 0.1 0.07 0.1 ∆ICC /C0104 VCC = 3 V to 3.6 V, One input at VCC – 0.6 V, Other inputs at VCC or GND 0.2 0.2 mA C i VCC = 3.3 V, VI = 3.3 V or 0 3.5 3.5 pF C io VCC = 3.3 V, VO = 3.3 V or 0 8 8 pF † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. § The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. ¶ An external driver must source at least IBHLO to switch this node from low to high. # An external driver must sink at least IBHHO to switch this node from high to low. ||Current into an output in the high state when VO > VCC/C0107 High-impedance state during power up or power down /C0104 This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

SN54ALVTH16245, SN74ALVTH16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES066G – JUNE 1996 – REVISED APRIL 2002 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating free-air temperature range, CL = 30 pF, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO SN54ALVTH16245 SN74ALVTH16245 UNITPARAMETER (INPUT) (OUTPUT) MIN MAX MIN MAX UNIT tPLH Ao rB Bo rA 0.5 3.6 0.5 3.6 ns tPHL A or B B or A 0.5 3.4 0.5 3.4 ns tPZH OE Ao rB 1.5 4.9 1.5 4.9 ns tPZL OE A or B 1 4 1 4 ns tPHZ OE Ao rB 1.5 4.9 1.5 4.9 ns tPLZ OE A or B 1 4.2 1 4.2 ns switching characteristics over recommended operating free-air temperature range, CL = 50 pF, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO SN54ALVTH16245 SN74ALVTH16245 UNITPARAMETER (INPUT) (OUTPUT) MIN MAX MIN MAX UNIT tPLH Ao rB Bo rA 0.5 3.1 0.5 3.1 ns tPHL A or B B or A 0.5 2.9 0.5 2.9 ns tPZH OE Ao rB 1 4.2 1 4.2 ns tPZL OE A or B 1 3.5 1 3.5 ns tPHZ OE Ao rB 1.5 5.3 1.5 5.3 ns tPLZ OE A or B 1.5 5 1.5 5 ns skew tps (pin or transition skew), tps = |tPHL – tPHL | VCC = 2.5 V VCC = 3.3 V UNIT TYP TYP UNIT tpsmax 438 118 ps tOST = |tpΦ m – tpΦ n|, where Φ is any edge transition (high to low or low to high) measured between any two outputs (m or n) within any given device (see Note 4) VCC = 2.5 V VCC = 3.3 V UNIT TYP TYP UNIT tOST A–B 227 248 pstOST B–A 223 243 ps NOTE 4: One output switching, TA = 25°C tOSHL /tOSLH (common edge skew), tOSHL = |tPHL max – tPHL min| (output skew for low-to-high transitions), and tOSLH = |tPLH max – tPLH min| (output skew for high-to-low transitions) (see Note 4) VCC = 2.5 V VCC = 3.3 V UNIT TYP TYP UNIT tOSLH A B 210 145 ps tOSHL A–B 243 351 ps tOSLH B A 207 136 ps tOSHL B–A 238 350 ps NOTE 4: One output switching, TA = 25°C PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0 V0 V

NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 74ALVTH16245DLG4 ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245DLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245GRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245VRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245ZQLR ACTIVE BGA MI CROSTA R JUNI OR ZQL 56 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74ALVTH16245DL ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245DLR ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245GR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245KR ACTIVE BGA MI CROSTA R JUNI OR GQL 56 1000 TBD SNPB Level-1-240C-UNLIM SN74ALVTH16245VR ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 1

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 Addendum-Page 2

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194

MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040048/E 12/01

48 PINS SHOWN

0.730 (18,54) 0.720 (18,29) 4828 0.370 (9,40) (9,65) 0.380 Gage Plane DIM 0.420 (10,67) 0.395 (10,03) A MIN A MAX 0.010 (0,25) PINS ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) Seating Plane 0.020 (0,51) 0.040 (1,02) 0.008 (0,203) 0.0135 (0,343) 0.008 (0,20) MIN A 0.110 (2,79) MAX 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) M0.005 (0,13) 0.025 (0,635) 0°–/C02578° 0.005 (0,13) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-118

MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97 0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

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Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 74ALVTH16245DLG4 ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245DLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245GRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245VRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ALVTH16245ZQLR ACTIVE BGA MI CROSTA R JUNI OR ZQL 56 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74ALVTH16245DL ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245DLR ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245GR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALVTH16245KR NRND BGA MI CROSTA R JUNI OR GQL 56 1000 TBD SNPB Level-1-240C-UNLIM SN74ALVTH16245VR ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2007 Addendum-Page 1

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2007 Addendum-Page 2

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194

MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040048/E 12/01 0.730 (18,54) 0.720 (18,29) 4828 0.370 (9,40) (9,65) 0.380 Gage Plane DIM 0.420 (10,67) 0.395 (10,03) A MIN A MAX 0.010 (0,25) PINS ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) Seating Plane 0.020 (0,51) 0.040 (1,02) 0.008 (0,203) 0.0135 (0,343) 0.008 (0,20) MIN A 0.110 (2,79) MAX 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) M0.005 (0,13) 0.025 (0,635) 0°–/C02578° 0.005 (0,13) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-118

MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97 0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Cu stomers should obtain the latest relevant information before placing orders and should verify that such info rmation is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by governm ent requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI component s. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implie d, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are us ed. Information published by TI regarding third-party products or services does not consti tute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the pat ents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, lim itations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements diffe rent from or beyond the parameters stated by TI for that product or service voids all express and any imp lied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.c om Audio www.ti.com/audio Data Converters dataconverter.ti.co m Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 6553 03 Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated