ALVD ABRACON | Alldatasheet

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Technical content

STANDARD SPECIFICATIONS: APPLICATIONS:

  • SONET, xDSL
  • SDH, CPE
  • STB FEATURES:
  • Based on a proprietary digital multiplier
  • Tri-State Output
  • Low Phase Jitter
  • 2.5V to 3.3V +/- 5% operation
  • Ceramic SMD, low profile package 7.0 x 5.0 x 1.8mmPb RoHS Compliant PARAMETERS Frequency Range 750 KHz to 800 MHz Storage Temperature -55°C to +125°C Overall Frequency Stability ±50 PPM max. (see options) Operating Temperature 0°C to +70°C (see options) 0.3VDC min, 1.65VDC typ, 3.0 VDC max. 3.3V ± 10% 40/60% max. See options (PECL, CMOS, or LVDS) Voltage Control (Vcc) ± 50ppm (see option) Supply Voltage (Vdd) Output Level Aging per year RMS Phase Jitter Pullability Tristate Function Period Jitter (peak to peak) Phase Noise ±5 ppm max. Symmetry at 1/2 Vdd ABRACON P/N ALVD Series ABRACON IS ISO 9001 / QS 9000 CERTIFIED ABRACON IS ISO 9001 / QS 9000 CERTIFIED CERAMIC SMD CRYSTAL CLOCK OSCILLATOR 3ps typical, 5ps max. (12KHz~20MHz) 35 ps typical -112 dBc/Hz @ 1kHz Offset from 155.52MHz -125 dBc/Hz @ 10kHz Offset from 155.52MHz -123 dBc/Hz @ 100KHz Offset from 155.52MHz -109 dBc/Hz @ 1kHz Offset from 622.08MHz -110 dBc/Hz @ 10kHz Offset from 622.08MHz -109 dBc/Hz @ 100KHz Offset from 622.08MHz "1" (VIH>= 0.7* Vdd) or open: Oscillation "0" (VIL< 0.3* Vdd) : Hi Z PECL: CMOS: Supply current DD):25mA max (for Fo<24MHz),65mA max (for 24MHz<Fo<96MHz),100mA max (96MHz<Fo<700MHz) Output Logic High: Vdd-1.025V min, Vdd-0.880V max. Output Logic Low: Vdd-1.810V min. Vdd-1.620V max. Symmetry (Duty Cycle): 45% min, 50% typ, 55% max, Rise time: 0.6nSec typ,1.5nS max Fall time: 0.6nSec typ, 1.5nS max Supply current( IDD):15mA max (for Fo<24MHz),30mA max (for 24MHz<Fo<96MHz), 40mA max (96MHz<Fo<700MHz) Output Clock Rise/ Fall Time [10%~90% VDD with 10pF load]: 1.2ns typ, 1.6ns max. Output Clock Duty Cycle [Measured @ 50% VDD]: 45% min, 50% typical, 55% max

30332 Esperanza, Rancho Santa Margarita, California 92688

tel 949-546-8000 | fax 949-546-8001 | www.abracon.com Revised: 07.11.07Visit www.abracon.com for Terms & Conditions of Sale

7.0 x 5.0 x 1.8mmPb RoHS Compliant ABRACON IS ISO 9001 / QS 9000 CERTIFIED ABRACON IS ISO 9001 / QS 9000 CERTIFIED CERAMIC SMD CRYSTAL CLOCK OSCILLATOR LVDS: PIN ASSIGNMENTS PIN # TRI-STATE PIN OPERATION: 0 (Default) 1(Default) 1(Default) *Connect to VDD for logic level "1", connect to ground for logic level "0". C CMOS Disabled Enabled V LVDS Disabled Enabled OUTPUT TYPE OPTION PIN 2 logic level* Disabled EnabledP1 PECL1 dnuorGDNG .tuptuO SOMC ro ,SDVL ,LCEPQ Output State (Tri-state) P PECL Enabled Disabled VDD VDD Connection. NOITPIRSEDemaN lortnoC egatloVcV etatsirTetatsirT .CN ro ,SDVL,LCEP yratnemilpmoCQ OPTIONS & PART IDENTIFICATION: (Left blank if standard) R ±25ppm max. Blank Bulk K ±30ppm max. H ±35ppm max. D -10ºC~60ºC E -20ºC~70ºC F -30ºC~70ºC P PECL N100 ±100ppm N -30ºC~85ºC P1 PECL1 L -40ºC~85ºC V LVDS CC M O S Frequency Operating Temp. Output Level Packaging Pullability Frequency Stability T Tape and Reel XX.XXXXMHz ALVD - Frequency - - - - - Supply current( IDD):25mA max (for Fo<24MHz),45mA max (for 24MHz<Fo<96MHz),80mA max (96MHz<Fo<700MHz) Output Clock Duty Cycle @ 1.25V: 45% min, 50% typical, 55% max Output DifferentialV oltage (VOD): 247mV min, 355mVt ypical, 454mV max VDD Magnitude Change (ΔVOD): -50mV min, 50mV max Output High Voltage : VOH = 1.4V typical, 1.6V max. Output Low Voltage: VOL = 0.9V min, 1.1V typical Offset Voltage [RL = 100Ω]: VOS = 1.125V min, 1.2V typical, 1.375V max Offset Magnitude Change [RL = 100Ω]: ΔVOS = 0mV min, 3mV typical, 25mV max Power-off Leakage (IOXD) [Vout=VDD or GND, VDD=0V] = ±1μA typical, ±10μA max. Differential Clock Rise Time (tr) [RL=100Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS,max Differential Clock Fall Time (tf) [RL=100Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS max tel 949-546-8000 | fax 949-546-8001 | www.abracon.com Revised: 07.11.07Visit www.abracon.com for Terms & Conditions of Sale

7.0 x 5.0 x 1.8mmPb RoHS Compliant ABRACON IS ISO 9001 / QS 9000 CERTIFIED ABRACON IS ISO 9001 / QS 9000 CERTIFIED CERAMIC SMD CRYSTAL CLOCK OSCILLATOR OUTLINE DRAWING: TAPE & REEL: PIN FUNCTION Tri-state Vc VDD GND Q Q Note: It is recommended to use an approximately 0.01uF bypass capacitor between PIN 3 and 6. Dimensions: Inches (mm) Dimensions: mm *Complimentary PECL/LVDS or NC. tel 949-546-8000 | fax 949-546-8001 | www.abracon.com Revised: 07.11.07Visit www.abracon.com for Terms & Conditions of Sale