ALTAIR04-900 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 29
Technical content
Datasheet sections
- 1 Device description
- 2 Pin connection
- 3 Maximum ratings
- 3.1 Absolute maximum ratings
- 3.2 Thermal data
- 4 Electrical characteristics
- 5 Application information
- 5.1 Power section and gate driver
- 5.2 High voltage startup generator
- 5.3 Zero current detection and triggering block
- 5.4 Constant voltage operation
- 5.5 Constant current operation
- 5.6 Voltage feedforward block
- 5.7 Burst-mode operation at no load or very light load
- 5.8 Soft-start and starter block
- 5.9 Hiccup mode OCP
- 5.10 Layout recommendations
- 6 Typical application
- 6.1 Test board: evaluation data
- 6.2 Test board: main waveforms
- 7 Package mechanical data
- 8 Order codes
- 9 Revision history
Features
■ Primary side constant voltage operations with no optocoupler ■ Adjustable and main-independent maximum output current for safe operations during overload/short circuit conditions ■ 900 V avalanche rugged internal power section ■ Quasi-resonant valley switching operation ■ Low standby consumption ■ Overcurrent protection against transformer saturation and secondary diode short circuit ■ SO16 package
Applications
■ SMPS for energy metering ■ Auxiliary power supplies for 3-phases input industrial systems ■ AC-DC adapters
Description
ALTAIR04-900 is a high-voltage all-primary- sensing switcher intended for operating directly from the rectified mains with minimum external parts. It combines a high-performance low- voltage PWM controller chip and a 900 V avalanche-rugged power section in the same package. SO16N Figure 1. Block diagram
ALTAIR04-900 Device description Doc ID 18211 Rev 2 3/29
1 Device description
The device combines two silicon in the same package: a low voltage PWM controller and a 900 V avalanche rugged power section. The controller is a current-mode specifically designed for off-line quasi-resonant flyback converters. The device is capable of providing constant output voltage using all primary sensing feedback. This eliminates the need for the optocoupler, the secondary voltage reference, as well as the current sensor, still maintaining quite accurate regulation. Also, it is possible to set the maximum deliverable output current, thus increasing the end-product's safety and reliability during fault events. Quasi-resonant operation is guaranteed by means of a transformer demagnetization sensing input that turns on the power section. The same input serves also the output voltage monitor, to perform CV regulation, and the input voltage monitor, to achieve mains- independent maximum deliverable output current (line voltage feedforward). The maximum switching frequency is top-limited below 166 kHz, so that at medium-light load a special function automatically lowers the operating frequency still maintaining the valley switching operation. At very light load, the device enters a controlled burst-mode operation that, along with the built-in high-voltage start-up circuit and the low operating current, helps minimize the standby power. Although an auxiliary winding is required in the transformer to correctly perform CV/CC regulation, the chip is able to power itself directly from the rectified mains. This is useful especially during CC regulation, where the flyback voltage generated by the winding drops below UVLO threshold. However, if ultra-low no-load input consumption is required to comply with the most stringent energy-saving recommendations, then the device needs to be powered via the auxiliary winding. In addition to these functions that optimize power handling under different operating conditions, the device offers protection features that considerably increase end-product's safety and reliability: auxiliary winding disconnection - or brownout - detection and shorted secondary rectifier - or transformer's saturation - detection. All of them are auto restart mode.
2 Pin connection
Figure 2. Pin connection (top view) Table 1. Pin functions restarted after Vcc has dropped below 5V. separate from any pulsed current return. automatically adjusted to keep the average output current constant.
6 ZCD/FB
the pin and the auxiliary transformer. 12 N.C Not internally connected. Provision for clearance on the PCB to meet safety requirements. Table 1. Pin functions (continued)
3 Maximum ratings
3.1 Absolute maximum ratings
3.2 Thermal data
Table 2. Absolute maximum ratings Table 3. Thermal data
4 Electrical characteristics
Table 4. Electrical characteristics
- Parameters tracking each other
Table 4. Electrical characteristics (continued)
Figure 6. Quiescent current test circuit Figure 7. Operating supply current test circuit Figure 8. Quiescent current during fault test circuit
14 VAIq_meas
5 Application information
- QR mode at heavy load. Quasi-resonant operation lies in synchronizing MOSFET's
benefits of this kind of operation.
- Valley-skipping mode at medium/ light load. Depending on voltage on COMP pin, the
increased (piecewise linear portion in Figure 9).
- Burst-mode with no or very light load. When the load is extremely light or disconnected,
the converter enters a controlled on/off operation with constant peak current. very low, no issue of audible noise arises. Figure 9. Multi-mode operation of ALTAIR04-900
5.1 Power section and gate driver
The power section guarantees safe avalanche operation within the specified energy rating as well as high dv/dt capability. The Power MOSFET has a V(BR)DSS of 900 V min. and a typical RDS(on) of 16 Ω. The gate driver is designed to supply a controlled gate current during both turn-on and turn- off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned on accidentally.
5.2 High voltage startup generator
Figure 10 shows the internal schematic of the high-voltage start-up generator (HV generator). The HV current generator is supplied through the DRAIN pin and it is enabled only if the input bulk capacitor voltage is higher than Vstart threshold, 50 V DC typically. When the HV current generator is ON, the Icharge current (5.5 mA typical value) is delivered to the capacitor on the V CC pin. With reference to the timing diagram of Figure 10, when power is applied to the circuit and the voltage on the input bulk capacitor is high enough, the HV generator is sufficiently biased to start operating, thus it draws about 5.5 mA (typical) from the bulk capacitor. Most of this current charges the bypass capacitor connected between the Vcc pin and ground and make its voltage rise linearly. As the Vcc voltage reaches the start-up threshold (13 V typ.) the chip starts operating, the internal power MOSFET is enabled to switch and the HV generator is cut off by the Vcc_OK signal asserted high. The IC is powered by the energy stored in the Vcc capacitor. The chip is able to power itself directly from the rectified mains: when the voltage on the V CC pin falls below Vccrestart (10.5V typ.), during each MOSFET’s off-time the HV current generator is turned on and charges the supply capacitor until it reaches the VCCOn threshold. In this way, the self-supply circuit develops a voltage high enough to sustain the operation of the device. This feature is useful especially during CC regulation, when the flyback voltage generated by the auxiliary winding alone may not be able to keep Vcc above VCCrestart. At converter power-down the system loses regulation as soon as the input voltage falls below V Start. This prevents converter’s restart attempts and ensures monotonic output voltage decay at system power-down.
Figure 10. Timing diagram: normal power-up and power-down sequences
5.3 Zero current detection and triggering block
triggering block must be previously armed by a positive-going edge exceeding 100 mV. Figure 11. ZCD block, triggering block
frequency tends to increase excessively at light load and high input voltage. converter power-up, when no or a too small signal is available on the ZCD pin. becomes 8 kHz if this voltage exceed this value. locked to transformer demagnetization, hence setting up QR operation. high enough to allow the ZCD triggering. Figure 12. Drain ringing cycle skipping as the load is progressively reduced of the converter or on its output voltage.
5.4 Constant voltage operation
Figure 13. Voltage control principle: internal schematic the output voltage and it is compared with the error amplifier internal reference. stabilizes the overall voltage control loop, is connected between this pin and ground. Where NSEC and NAUX are the secondary and auxiliary turn’s number respectively. Voltage feedforward block”).
5.5 Constant current operation
C/R, where VC is the voltage developed across the capacitor Cref. The flip-flop’s output is high as long as the transformer delivers current on secondary side. The capacitor Cref has to be chosen so that its voltage VC can be considered as a constant. for switching frequencies in the ten kHz. PRI is the primary turn's number. Current loop gain GI and current reference voltage VCREF are internally defined. Figure 14. Current control principle
Figure 15. Constant current operation: Switching cycle waveforms
5.6 Voltage feedforward block
switches off the MOSFET with a peak current than higher the foreseen value. depending on the input voltage. The internal schematic is shown in Figure 16.
Figure 16. Feedforward compensation: internal schematic In this case the peak drain current does not depend on input voltage anymore. If IZCD < IZCDON, the brownout function is activated and the IC is shut-down. and considerably increases the end-product’s safety and reliability.
5.7 Burst-mode operation at no load or very light load
reduced at a lower value to minimize Vcc capacitor discharge. µs), with minimum energy transfer. OFF for another 500 µs period.
Figure 17. Load-dependent operating modes: timing diagrams
5.8 Soft-start and starter block
primary peak current is limited from the voltage on the CREF capacitor. soft-start feature is ensured. capacitors and load. The user can define the best appropriate value by experiments.
5.9 Hiccup mode OCP
again a real malfunction is assumed and the device is stopped. circuit. This special condition is illustrated in the timing diagram of Figure 18. Figure 18. Hiccup-mode OCP: timing diagram
5.10 Layout recommendations
- The compensation network should be connected as close as possible to the COMP pin, maintaining the trace for the GND as short as possible
- Signal Ground should be routed separately from power ground, as well from the sense resistor trace.
Figure 19. Suggested routing for converter
6 Typical application
Figure 20. Test board schematic: 4.5 W (9 V - 500 mA) wide range mains adapter Figure 21. Electrical schematic for 440 Vac input voltage option thanks to the 900 V
6.1 Test board: evaluation data
Figure 22. No-load consumption Figure 23. Efficiency at full load Figure 24. VI Curve @ 110 V AC Figure 25. VI Curve @ 264 V AC
6.2 Test board: main waveforms
Figure 26. 110 V AC, No-load Figure 27. 264 V AC, No-load Figure 28. 110 V AC, Full load Figure 29. 234 V AC, Full load
7 Package mechanical data
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 5. SO16N mechanical data
Figure 30. Package dimensions
8 Order codes
Table 6. Ordering information
9 Revision history
Table 7. Document revision history