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Technical content
Features
- Fully RoHS Compliant
- Diagnostic Features Per SFF-8472 “Diagnostic Monitoring Interface for Optical Transceivers”
- Real time monitors of: − Transmitted Optical Power − Received Optical Power − Laser Bias Current − Temperature − Supply Voltage
- Industrial Temperature and Supply Voltage Operation
- Transceiver Specifi cations per SFP (INF-8074) and SFF-8472 (revision 9.6)
- Up to 7km with 9um fi ber for 3.072 Gb/s
- Up to 8km with 9um fi ber for 2.4576 Gb/s
- LC Duplex optical connector interface conforming to ANSI TIA/EIA604-10 (FOCIS 10A)
- 1310nm Fabry Perot Laser (FP) Source Technology
- IEC 60825-1 Class 1/CDRH Class 1 laser eye safe
- Compatible with Fibre Channel and Gigabit Ethernet
applications
Wireless and cellular base station system interconnect: OBSAI rates: 3.072 Gb/s, 1.536 Gb/s, 0.768 Gb/s CPRI rates: 3.072 Gb/s, 2.4576 Gb/s, 1.2288 Gb/s, 0.6144 Gb/s AFCT-57J5APZ 1310nm LASER PROD 21CRF(J) CLASS1 SINGAPORE 0446 SN: AJ0446CD1C PPOC-4102-DIn2
Digital Diagnostic Interface and Serial Identifi cation The 2-wire serial interface is based on ATMEL AT24C01A series EEPROM protocol and signaling detail. Conven- tional EEPROM memory, bytes 0-255 at memory address 0xA0, is organized in compliance with INF-8074. New digital diagnostic information, bytes 0-255 at memory address 0xA2, is compliant to SFF-8472. The new diag- nostic information provides the opportunity for Predic- tive Failure Identifi cation, Compliance Prediction, Fault Isolation and Component Monitoring. The I2C accessible memory page address 0xB0 is used in- ternally by SFP for the test and diagnostic purposes and it is reserved. Predictive Failure Identifi cation The AFCT-57J5APZ predictive failure feature allows a host to identify potential link problems before system perfor- mance is impacted. Prior identifi cation of link problems enables a host to service an application via “fail over” to a redundant link or replace a suspect device, maintaining system uptime in the process. For applications where ul- tra-high system uptime is required, a digital SFP provides a means to monitor two real-time laser metrics associ- ated with observing laser degradation and predicting failure: average laser bias current (Tx_Bias) and average laser optical power (Tx_Power). Compliance Prediction: Compliance prediction is the ability to determine if an optical transceiver is opera ting within its operating and Figure 1 . Transceiver Functional Diagram environmental requirements. AFCT-57J5APZ devices provide real-time access to transceiver internal supply voltage and temperature, allowing a host to identify potential component compliance issues. Received optical power is also available to assess compliance of a cable plant and remote transmitter. When operating out of re- quirements, the link cannot guarantee error free trans- mission. Fault Isolation The fault isolation feature allows a host to quickly pinpoint the location of a link failure, minimizing downtime. For optical links, the ability to identify a fault at a local device, remote device or cable plant is crucial to speeding service of an installation. AFCT-57J5APZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Tempera- ture and Rx_Power can be used to assess local transceiv- er current operating conditions. In addition, status fl ags Tx_Disable and Rx Loss of Signal (LOS) are mirrored in memory and available via the two-wire serial interface. Component Monitoring Component evaluation is a more casual use of the AF- CT-57J5APZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power. Potential uses are as debugging aids for system installation and design, and transceiver parametric evaluation for factory or fi eld qualifi cation. For example, temperature per module can be observed in high density applications to facilitate thermal evaluation of blades, PCI cards and systems. EEPROM CONTROLLER EEPROM Photo-Detector Amplification Quantization FP Laser Laser Driver & Safety Circuit Electrical Interface RD+ (Receive Data) RD- (Receive Data) Rx Loss Of Signal MOD-DEF2 (SDA) TX_DISABLE TD+ (Transmit Data) TD- (Transmit Data) TX_FAULT MOD-DEF0 MOD-DEF1 (SCL) Receiver Transmitter Optical Interface Light from Fiber Light to Fiber Rate Select
The transmitter section includes consists of the Transmit- ter Optical SubAssembly (TOSA) and laser driver circuitry. The TOSA, containing a 1310nm FABRY PEROT light source, is located at the optical interface and mates with the LC optical connector. The TOSA is driven by a custom IC which uses the incoming diff erential high speed logic signal to modulate the laser diode driver current. This Tx laser driver circuit regulates the optical power at a constant level provided the incoming data pattern is dc balanced (8B/10B code, for example). Transmit Disable (Tx_Disable) The AFCT-57J5APZ accepts a TTL and CMOS compatible transmit disable control signal input (pin 3) which shuts down the transmitter optical output. A high signal im- plements this function while a low signal allows normal transceiver operation. In the event of a fault (e.g. eye safety circuit activated), cycling this control signal resets the module as depicted in Figure 4. An internal pull up resistor disables the transceiver transmitter until the host pulls the input low. Host systems should allow a 10ms interval between successive assertions of this control signal. Tx_Disable can also be asserted via the two-wire serial interface (address A2h, byte 110, bit 6) and monitored (address A2h, byte 110, bit 7). The contents of A2h, byte 110, bit 6 are logic OR’d with hardware Tx_Disable (pin 3) to control transmitter operation.. Transmit Fault (Tx_Fault) A catastrophic laser fault will activate the transmitter signal, TX_FAULT, and disable the laser. This signal is an open collector output (pull-up required on the host board). A low signal indicates normal laser operation and a high signal indicates a fault. The TX_FAULT will be latched high when a laser fault occurs and is cleared by toggling the TX_DISABLE input or power cycling the transceiver. The transmitter fault condition can also be monitored via the two-wire serial interface (address A2, byte 110, bit 2). Eye Safety Circuit The AFCT-57J5APZ provides Class 1 (single fault tolerant) eye safety by design and has been tested for compliance with the requirements listed in Table 1. The eye safety circuit continuously monitors the optical output power level and will disable the transmitter upon detecting an unsafe condition beyond the scope of Class 1 certifi ca- tion. Such unsafe conditions can be due to inputs from the host board (Vcc fl uctuation, unbalanced code) or a fault within the transceiver. Receiver Section The receiver section includes the Receiver Optical SubAssembly (ROSA) and the amplifi cation/quanti- zation circuitry. The ROSA, containing a PIN photodi- ode and custom transimpedance amplifi er, is located at the optical interface and mates with the LC optical connector. The ROSA output is fed to a custom IC that provides post-amplifi cation and quantization. Receiver Loss of Signal (Rx_LOS) The post-amplifi cation IC also includes transition detection circuitry which monitors the ac level of incoming optical signals and provides a TTL/CMOS com- patible status signal to the host (pin 8). An adequate optical input results in a low Rx_LOS output while a high Rx_LOS output indicates an unusable optical input. The Rx_LOS thresholds are factory set so that a high output indicates a defi nite optical fault has occurred. Rx_LOS can also be monitored via the two-wire serial interface (address A2h, byte 110, bit 1). Functional Data I/O The AFCT-57J5APZ interfaces with the host circuit board through twenty I/O pins (SFP electrical connector) iden- tifi ed by function in Table 2. The board layout for this interface is depicted in Figure 6. The AFCT-57J5APZ high speed transmit and receive in- terfaces require SFP MSA, OBSAI or CPRI compliant signal lines on the host board. To simplify board requirements, biasing resistors and ac coupling capacitors are incorpo- rated into the SFP transceiver module (per INF-8074) and hence are not required on the host board. The Tx_Disable, Tx_Fault, Rx_LOS and Rate_Select lines require TTL lines on the host board (per INF-8074) if used. If an application chooses not to take advantage of the functionality of these pins care must be taken to ground Tx_Disable (for normal operation) and Rate_Select is set to default in the proper state. Figure 2 depicts the recommended interface circuit to link the AFCT-57J5APZ to supporting physical layer ICs. Timing for MSA compliant control signals implemented in the transceiver are listed in Figure 4.
An Evaluation Kit and Reference Designs are available to assist in evaluation of the AFCT-57J5APZ . Please contact your local Field Sales representative for availability and ordering details. Caution There are no user serviceable parts nor maintenance re- quirements for the AFCT-57J5APZ. All mechanical ad- justments are made at the factory prior to shipment. Tampering with, modifying, misusing or improperly handling the AFCT-57J5APZ will void the product warranty. It may also result in improper operation and possibly overstress the laser source. Performance deg- radation or device failure may result. Connection of the AFCT-57J5APZ to a light source not compliant with these specifi cations, operating above maximum operating conditions or in a manner inconsistent with it’s design and function may result in exposure to hazardous light radiation and may constitute an act of modifying or man- ufacturing a laser product. Persons performing such an act are required by law to re-certify and re-identify the laser product under the provisions of U.S. 21 CFR (Sub- chapter J) and TUV.
Ordering Information
Please contact your local fi eld sales engineer or one of Avago Technologies franchised distributors for ordering information. For technical information, please visit Avago Technologies’ WEB page at www.Avago.com or contact Avago Technologies Semiconductor Products Customer Response Center at 1-800-235-0312. For in- formation related to SFF Committee documentation visit www.sff committee.org. Regulatory Compliance The AFCT-57J5APZ complies with all applicable laws and regulations as detailed in Table 1. Certifi cation level is dependent on the overall confi guration of the host equipment. The transceiver performance is off ered as a fi gure of merit to assist the designer Electrostatic Discharge (ESD) The AFCT-57J5APZ is compatible with ESD levels found in typical manufacturing and operating environments as described in Table 1. In the normal handling and operation of optical transceivers, ESD is of concern in two circumstances. The fi rst case is during handling of the transceiver prior to insertion into an SFP compliant cage. To protect the device, it’s important to use normal ESD handling precau- tions. These include using of grounded wrist straps, work- benches and fl oor wherever a transceiver is handled. The second case to consider is static discharges to the exterior of the host equipment chassis after installation. If the optical interface is exposed to the exterior of host equipment cabinet, the transceiver may be subject to system level ESD requirements. Electromagnetic Interference (EMI) Equipment incorporating g igabit transceivers is typically subject to regulation by the FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The AFCT-57J5APZ’s compliance to these standards is detailed in Table 1. The metal housing and shielded design of the AFCT-57J5APZ minimizes the EMI challenge facing the equipment designer. EMI Immunity (Susceptibility) Due to its shielded design, the EMI immunity of the AF- CT-57J5APZ exceeds typical industry standards. Flammability The AFCT-57J5APZ optical transceiver is made of metal and high strength, heat resistant, chemical resistant and UL 94V-0 fl ame retardant plastic.
Table 1. Regulatory Compliance contacted by a Human Body Model probe. faceplate with device inserted into a panel. customer board and chassis design. a 10V/m fi eld swept from 10 MHz to 1 GHz.
Table 2. Pin Description
1 VeeT Transmitter Ground
2 TX_FAULT Transmitter Fault Indication – High indicates a fault condition Note 1
3 TX_DISABLE Transmitter Disable – Module optical output disables on high or open Note 2
4 MOD-DEF2 Module Defi nition 2 – Two wire serial ID interface data line (SDA) Note 3
5 MOD-DEF1 Module Defi nition 1 – Two wire serial ID interface clock line (SCL) Note 3
6 MOD-DEF0 Module Defi nition 0 – Grounded in module (module present indicator) Note 3
8 RX_LOS Loss of Signal – High indicates loss of received optical signal Note 4
9 VeeR Receiver Ground
10 VeeR Receiver Ground
11 VeeR Receiver Ground
12 RD- Inverse Received Data Out Note 5
13 RD+ Received Data Out Note 5
14 VeeR Receiver Ground
17 VeeT Transmitter Ground
18 TD+ Transmitter Data In Note 7
19 TD- Inverse Transmitter Data In Note 7
20 VeeT Transmitter Ground
- TX_FAULT is an open collector/drain output, which must be pulled up with a 4.7k – 10k Ω resistor on the host board. When high, this output
indicates a laser fault of some kind. Low indicates normal operation. In the low state, the output will be pulled to < 0.8V.
- TX_DISABLE is an input that is used to shut down the transmitt er optical output. It is internally pulled up (within the tra nsceiver) with a 6.8k Ω
- The signals Mod-Def 0, 1, 2 designate the two wire serial interface pins. They must be pulled up with a 4.7k – 10k Ω resistor on the host board.
- RX_LOS (Rx Loss of Signal) is an open collector/drain output that must be pulled up with a 4.7k – 10k Ω resistor on the host board. When high,
normal operation. In the low state, the output will be pulled to < 0.8V.
- RD-/+ designate the diff erential receiver outputs. They are AC coupled 100Ω diff erential lines which should be terminated with 100Ω diff erential
be between 500 and 1600 mV diff erential (250 – 800 mV single ended) when properly terminated.
- VccR and VccT are the receiver and transmitter power supplies. They are defi ned at the SFP connector pin. The maximum supply current is 300
mA and the associated in-rush current will typically be no more than 30 mA above steady state after 500 nanoseconds.
- TD-/+ designate the diff erential transmitter inputs. They are AC coupled diff erential lines with 100 Ω diff erential termination inside the module.
used for best EMI performance.
Table 3. Absolute Maximum Ratings
- Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short
period of time. See Reliability Data Sheet for specifi c reliability performance.
- Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device rel iability is
not implied, and damage to the device may occur over an extended period of time.
- The module supply voltages, V CCT and VCCR must not diff er by more than 0.5V or damage to the device may occur.
Table 4. Recommended Operating Conditions
- The Ambient Operating Temper ature limitations are based on the Case Operating Temperature limitations and are subject to the host system
- Recommended Operating Conditions are those values for which functional performance and device reliability is implied.
Table 5. Transceiver Electrical Characteristics
- Filter per SFP specifi cation is required on host board to remove 10 Hz to 2 MHz content.
- Pulled up externally with a 4.7k – 10k Ω resistor on the host board to 3.3V.
- Rate_Select, Mod-Def1 and Mod-Def2 must be pulled up externally with a 4.7k – 10k Ω resistor on the host board to 3.3V.
Table 6. Transmitter Optical Characteristics
- Max Pout is the lesser of Class 1 safety limits (CDRH and EN 60825) or receiver power, max.
- Into single-mode optical fi ber.
- Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern.
- Contributed RJ is calculated for 1x10
-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14.
- In a network link, each component’s output jitter equals each component’s input jitter combined with each component’s contri buted jitter.
Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion.
- OMA, center wavelength and spectral width must comply with the Triple Tradeoff Curve shown below.
Table 7. Receiver Optical Characteristics
- Input Optical Modulation Amplitude (commonly known as sensitivity) requires a valid 8B/10B encoded input.
- These average power values are specifi ed with an Extinction Ratio of 9dB. The loss of signal circuitry responds to valid 8B/10B encoded peak to
peak input optical power, not average power. Table 8. Transmitter and Receiver Electrical Characteristics
- Internally AC coupled and terminated (100 Ohm diff erential).
- Internally AC coupled but requires an external load termination (100 Ohm diff erential).
- Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern
- Contributed RJ is calculated for 1x10
-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14.
- 20%-80% electrical rise & fall times measured with a 500 MHz signal utilizing a 1010 data pattern.
- In a network link, each component’s output jitter equals each component’s input jitter combined with each component’s contri buted jitter.
Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion.
- Measured at an input optical power of 48uW, OMA.
Table 9. Transceiver SOFT DIAGNOSTIC Timing Characteristics
- Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal.
- Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
- Time from power on or falling edge of Tx_Disable to when the modulated optical output rises above 90% of nominal.
- From power on or negation of TX_FAULT using TX_DISABLE.
- Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
- Time from loss of optical signal to Rx_LOS Assertion.
- Time from valid optical signal to Rx_LOS De-Assertion.
- Time from rising or falling edge of Rate_Select input until transceiver is in conformance with appropriate specifi cation.
- Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of no minal. Measured
from falling clock edge after stop bit of write transaction.
- Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises a bove 90% of
- Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
- Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
- Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
- Time from two-wire interface selection of Rate_Select input (A2h, byte 110, bit 3) write STOP condition until completion of the receiver
- From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
- Time from power on until module is ready for data transmission over the serial bus (reads or writes over A0h and A2h).
- Time from stop bit to completion of a 1-8 byte write command.
Table 10. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics TINT ± 3.0 °C Temperature is measured internal to the transceiver. Valid from = -40°C to 85 °C case temperature. INT ± 10 % IINT is better than ± 10% of the nominal value. PT ± 3.0 dB Coupled into single-mode fi ber. Valid from 100 uW to 500 uW, avg. PR ± 3.0 dB Coupled from single-mode fi ber. Valid from 15 uW to 500 uW, avg. case or laser junction contact Avago Technologies. pins due to use of internal transient suppression circuitry. variations due to changing transceiver operating points. detecting cable plant or remote transmitter problems.
Figure 4. Transceiver Timing Diagrams (Module Installed Except Where Noted)
Table 12. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h)
- The IEEE Organizationally Unique Identifi er (OUI) assigned to Avago Technologies is 00-17-6A (3 bytes of hex).
- Laser wavelength is represented in 16 unsigned bits. The hex representation of 1310 (nm) is 051E.
- Addresses 63 and 95 are checksums calculated (per SFF-8472 and SFF-8074) and stored prior to product shipment.
- Addresses 68-83 specify the AFCT-57J5APZ ASCII serial number and will vary on a per unit basis.
- Addresses 84-91 specify the AFCT-57J5APZ ASCII date code and will vary on a per date code basis.
Table 13. EEPROM Serial ID Memory Contents – Enhanced Feature Set Memory (Address A2h)
0 Temp H Alarm MSB 1 26 Tx Pwr L Alarm MSB 4 104 Real Time Rx Pwr MSB 5
1 Temp H Alarm LSB 1 27 Tx Pwr L Alarm LSB 4 105 Real Time Rx Pwr LSB 5
2 Temp L Alarm MSB 1 28 Tx Pwr H Warning MSB 4 106 Reserved
3 Temp L Alarm LSB 1 29 Tx Pwr H Warning LSB 4 107 Reserved
4 Temp H Warning MSB 1 30 Tx Pwr L Warning MSB 4 108 Reserved
5 Temp H Warning LSB 1 31 Tx Pwr L Warning LSB 4 109 Reserved
6 Temp L Warning MSB 1 32 Rx Pwr H Alarm MSB 5 110 Status/Control - See Table 14
7 Temp L Warning LSB 1 33 Rx Pwr H Alarm LSB 5 111 Reserved
8 Vcc H Alarm MSB 2 34 Rx Pwr L Alarm MSB 5 112 Flag Bits - See Table 15
9 Vcc H Alarm LSB 2 35 Rx Pwr L Alarm LSB 5 113 Flag Bits - See Table 15
10 Vcc L Alarm MSB 2 36 Rx Pwr H Warning MSB 5 114 Reserved
11 Vcc L Alarm LSB 2 37 Rx Pwr H Warning LSB 5 115 Reserved
12 Vcc H Warning MSB 2 38 Rx Pwr L Warning MSB 5 116 Flag Bits - See Table 15
13 Vcc H Warning LSB 2 39 Rx Pwr L Warning LSB 5 117 Flag Bits - See Table 15
14 Vcc L Warning MSB 2 40-55 Reserved 118-127 Reserved
15 Vcc L Warning LSB 2 56-94 External Calibration
16 Tx Bias H Alarm MSB 3 95 Checksum for Bytes 0-94 7 248-255 Vendor Specifi c
17 Tx Bias H Alarm LSB 3 96 Real Time Temperature MSB 1
18 Tx Bias L Alarm MSB 3 97 Real Time Temperature LSB 1
19 Tx Bias L Alarm LSB 3 98 Real Time Vcc MSB 2
20 Tx Bias H Warning MSB 3 99 Real Time Vcc LSB 2
21 Tx Bias H Warning LSB 3 100 Real Time Tx Bias MSB 3
22 Tx Bias L Warning MSB 3 101 Real Time Tx Bias LSB 3
23 Tx Bias L Warning LSB 3 102 Real Time Tx Power MSB 4
24 Tx Pwr H Alarm MSB 4 103 Real Time Tx Power LSB 4
25 Tx Pwr H Alarm LSB 4
- Temperature (Temp) is decoded as a 16 bit signed twos compliment integer in increments of 1/256 degrees C.
- Supply Voltage (Vcc) is decoded as a 16 bit unsigned integer in increments of 100 uV.
- Laser bias current (Tx Bias) is decoded as a 16 bit unsigned integer in increments of 2 uA.
- Transmitted average optical power (Tx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 uW.
- Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 uW.
- Bytes 55-94 are not intended for use with AFCT-57J5APZ, but have been set to default values per SFF-8472.
- Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment.
Table 14. EEPROM Serial ID Memory Contents – Soft Commands (Address A2h, Byte 110)
7 TX_ DISABLE State Digital state of SFP TX_ DISABLE Input Pin (1 = TX_DISABLE asserted) Note 1
6 Soft TX_ DISABLE Read/write bit for changing digital state of TX_DISABLE function Note 1,2
2 TX_FAULT State Digital state of the SFP TX_FAULT Output Pin (1 = TX_FAULT asserted) Note 1
1 RX_LOS State Digital state of the SFP RX_LOS Output Pin (1 = RX_LOS asserted) Note 1
- The response time for soft commands of the AFCT-57J5APZ is 100 msec as specifi ed by the MSA SFF-8472
Table 15. EEPROM Serial ID Memory Contents – Alarms and Warnings (Address A2h, Bytes 112, 113, 116, 117) 112 7 Temp High Alarm Set when transceiver internal temperature exceeds high alarm threshold. 6 Temp Low Alarm Set when transceiver internal temperature exceeds low alarm threshold. 5 Vcc High Alarm Set when transceiver internal supply voltage exceeds high alarm threshold. 4 Vcc Low Alarm Set when transceiver internal supply voltage exceeds low alarm threshold. 3 Tx Bias High Alarm Set when transceiver laser bias current exceeds high alarm threshold. 2 Tx Bias Low Alarm Set when transceiver laser bias current exceeds low alarm threshold. 1 Tx Power High Alarm Set when transmitted average optical power exceeds high alarm threshold. 0 Tx Power Low Alarm Set when transmitted average optical power exceeds low alarm threshold. 113 7 Rx Power High Alarm Set when received average optical power exceeds high alarm threshold. 6 Rx Power Low Alarm Set when received average optical power exceeds low alarm threshold. 116 7 Temp High Warning Set when transceiver internal temperature exceeds high warning threshold. 6 Temp Low Warning Set when transceiver internal temperature exceeds low warning threshold. 5 Vcc High Warning Set when transceiver internal supply voltage exceeds high warning threshold. 4 Vcc Low Warning Set when transceiver internal supply voltage exceeds low warning threshold. 3 Tx Bias High Warning Set when transceiver laser bias current exceeds high warning threshold. 2 Tx Bias Low Warning Set when transceiver laser bias current exceeds low warning threshold. 1 Tx Power High Warning Set when transmitted average optical power exceeds high warning threshold. 0 Tx Power Low Warning Set when transmitted average optical power exceeds low warning threshold. 117 7 Rx Power High Warning Set when received average optical power exceeds high warning threshold. 6 Rx Power Low Warning Set when received average optical power exceeds low warning threshold.
Figure 5 . Module drawing DEVICE SHOWN WITH DUST CAP AND BAIL DELATCH AFCT-57J5APZ1310nm LASER PROD21CRF(J) CLASS1CHINA 0445SN: A30445CD1C PPOG-4402-Din2 55.3 r 0.2 8.5 r 0.1 13.4 r 0.1 6.25 r 0.05 TX RX 1.91 13.6 12.4 r 0.2 13.6
14.9 UNCOMPRESSED
0.55 UNCOMPRESSED
1.39 UNCOMPRESSED
21CRF(J) CLASS1 SINGAPORE 0446 SN: AJ0446CD1CPPOC-4102-DIn2 + 0.2
Figure 6. SFP host board mechanical layout
0.06 L A S B S
- PADS AND VIAS ARE CHASSIS GROUND
- THROUGH HOLES, PLATING OPTIONAL
- HA TCHED AREA DENOTES COMPONENT
0.1 L A S B S
0.1 L X A S
0.1 S X Y
Figure 7 . SFP Assembly Drawing 41.78 ± 0.5 3.5 ± 0.3 1.7 ± 0.9 CASE TEMPERATURE MEASUREMENT POINT PCB
10 REF
(to PCB) 0.4 ± 0.1 (below PCB) 10.4 ± 0.1 15.25 ± 0.1 16.25 ± 0.1 MIN. PITCH DIMENSIONS ARE IN MILLIMETERS
11.73 REF
9.8 MAX. 15 MAX. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. AV02-0680EN - September 12, 2012