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/g120 Avago 1310nm DFB source and Transmitter Optical Subassembly technology /g120 Avago PIN detector and Receiver Optical Subassembly technology /g120/g3Typical power dissipation 850mW /g120 Extended case temperature 0-85 /g113C /g120 Full digital diagnostic management interface /g120/g3Avago SFP+ package design enables equipment EMI performance in high port density applications with margin to Class B limits Specifications /g120 Optical interface specifications per IEEE 802.3ae 10GBASE-LR /g120 Electrical interface specifications per SFF Committee SFF 8431 Specifications for Enhanced 8.5 and 10 Gigabit Small Form Factor Pluggable Module “SFP+” /g120 Management interface specifications per SFF Committee SFF 8431 and SFF 8472 Diagnostic Monitoring Interface for Optical Transceivers /g120 Mechanical specifications per SFF Committee SFF
8432 Improved Pluggable Formfactor “IPF”
/g120 LC Duplex optical connector interface confirming to ANSI TIA/EA 604-10 (FOCIS 10A) /g120 Compliant to Restriction on Hazardous Substances (RoHS) per EU and China requirements /g120 Class 1 Eye safe per requirements of IEC 60825-1 / CDRH
Description, continued Installation The AFCT-701ASDZ transceiver package is compliant with the SFF 8432 Improved Pluggable Formfactor hous- ing specification for the SFP+. It can be installed in any INF-8074 or SFF-8431/2 compliant Small Form Pluggable (SFP) port regardless of host equipment operating status The AFCT-701ASDZ is hot-pluggable, allowing the mod- ule to be installed while the host system is operating and on-line. Upon insertion, the transceiver housing makes initial contact with the host board SFP cage, mitigating potential damage due to Electro-Static Discharge (ESD). Digital Diagnostic Interface and Serial Identification The two-wire interface protocol and signaling detail are based on SFF-8431. Conventional EEPROM mem- ory, bytes 0-255 at memory address 0xA0, is organized in compliance with SFF-8431. New digital diagnostic information, bytes 0-255 at memory address 0xA2, is compliant to SFF-8472. The new diagnostic information provides the opportunity for Predictive Failure Identifi- cation, Compliance Prediction, Fault Isolation and Com- ponent Monitoring. Predictive Failure Identification The AFCT-701ASDZ predictive failure feature allows a host to identify potential link problems before system performance is impacted. Prior identification of link problems enables a host to service an application via “fail over” to a redundant link or replace a suspect device, maintaining system uptime in the process. For applica- tions where ultra-high system uptime is required, a digi- tal SFP provides a means to monitor two real-time laser metrics asso ciated with observing laser degradation and predicting failure: average laser bias current (Tx_Bias) and average laser optical power (Tx_Power). Compliance Prediction Compliance prediction is the ability to determine if an optical transceiver is opera ting within its operating and environmental requirements. AFCT-701ASDZ devices provide real-time access to transceiver internal supply voltage and temperature, allowing a host to identify po- tential component compliance issues. Received optical power is also available to assess compliance of a cable plant and remote transmitter. When operating out of re- quirements, the link cannot guarantee error free trans- mission. Fault Isolation The fault isolation feature allows a host to quickly pin- point the location of a link failure, minimizing downtime. For optical links, the ability to identify a fault at a local device, remote device or cable plant is crucial to speed- ing service of an installation. AFCT-701ASDZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power can be used to assess local transceiver current operating conditions. In addition, status flags TX_DIS- ABLE and Rx Loss of Signal (LOS) are mirrored in memory and available via the two-wire serial interface. Component Monitoring Component evaluation is a more casual use of the AFCT- 701ASDZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power. Potential uses are as debug- ging aids for system installation and design, and trans- ceiver parametric evaluation for factory or field qualifi- cation. For example, temperature per module can be observed in high density applications to facilitate ther- mal evaluation of blades, PCI cards and systems.
Figure 1. Transceiver functional diagram two-wire serial interface (address A2, byte 110, bit 2). power at a level within the specified range. (address A2h, byte 110, bit 7).
The receiver section includes the Receiver Optical Sub- Assembly (ROSA) and the amplification/quantization cir- cuitry. The ROSA, containing a PIN photodiode and cus- tom transimpedance amplifier, is located at the optical interface and mates with the LC optical connector. The ROSA output is fed to a custom IC that provides post- amplification and quantization. Receiver Loss of Signal (Rx_L OS) The post-amp IC also includes transition detection cir- cuitry which monitors the AC level of incoming optical signals and provides a LVTTL/CMOS compatible status signal to the host. A high status signal indicates loss of modulated signal, indicating link failures such as broken fiber or failed transmitter. Rx_LOS can also be monitored via the two-wire serial interface (address A2h, byte 110, bit 1). Functional Data I/ O The AFCT-701ASDZ interfaces with the host circuit board through the twenty contact SFP+ electrical connector. See Table 2 for contact descriptions. The module edge connector is shown in Figure 3. The host board layout for this interface is depicted in Figure 6. The AFCT-701ASDZ high speed transmit and receive in- terfaces require SFF-8431 compliant signal lines on the host board. To simplify board requirements, biasing re- sistors and AC coupling capacitors are incorpo rated into the SFP+ transceiver module (per SFF-8431) and hence are not required on the host board. The TX_DISABLE, TX_ FAULT and RX_LOS signals require LVTTL signals on the host board (per SFF-8431) if used. If an application does not take advantage of these func tions, care must be tak- en to ground TX_DISABLE to enable normal operation. Figure 2 depicts the recom mended interface circuit to link the AFCT-701ASDZ to supporting physical layer ICs. Timing for the dedicated SFP+ control signals imple- mented in the transceiver are listed in Figure 5. Application Support An Evaluation Kit and Reference Designs are available to assist in evaluation of the AFCT-701ASDZ. Please contact your local Field Sales representative for availability and ordering details. Caution There are no user serviceable parts nor maintenance requirements for the AFCT-701ASDZ. All mechanical adjustments are made at the factory prior to shipment. Tampering with, modifying, misusing or improperly han- dling the AFCT-701ASDZ will void the product warranty. It may also result in improper operation and possibly overstress the laser source. Performance degrada tion or device failure may result. Connection of the AFCT-701AS- DZ to a light source not compliant with IEEE Std. 802.3ae Clause 52 and SFF-8341 specifications, operating above maximum operating conditions or in a manner inconsis- tent with it’s design and function may result in exposure to hazardous light radiation and may constitute an act of modifying or manufacturing a laser product. Persons performing such an act are required by law to recertify and re-identify the laser product under the provisions of U.S. 21 CFR (Subchapter J) and TUV. Customer Manufacturing Processes This module is pluggable and is not designed for aque- ous wash, IR reflow, or wave soldering processes.
Ordering Information
Please contact your local field sales engineer or one of Avago Technologies franchised distributors for ordering information. For technical information, please visit Ava- go Technologies’ WEB page at www.avagotech.com. For information related to SFF Committee documentation visit www.sffcommittee.org.
The AFCT-701ASDZ complies with all applicable laws and regulations as detailed in Table 1. Certification level is dependent on the overall configuration of the host equipment. The transceiver performance is offered as a figure of merit to assist the designer. Electrostatic Discharge ( ESD) The AFCT-701ASDZ is compatible with ESD levels found in typical manufacturing and operating environments as described in Table 1. In the normal handling and op- eration of optical transceivers, ESD is of concern in two circumstances. The first case is during handling of the transceiver prior to insertion into an SFP compliant cage. To protect the device, it’s important to use normal ESD handling pre- cautions. These include use of grounded wrist straps, work-benches and floor wherever a transceiver is han- dled. The second case to consider is static discharges to the exterior of the host equipment chassis after installation. If the optical interface is exposed to the exterior of host equipment cabinet, the transceiver may be subject to system level ESD requirements. Electromagnetic Interference ( EMI) Equipment incorporating 10 gigabit transceivers is typically subject to regulation by the FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The AFCT-701ASDZ enables equipment com- pliance to these standards detailed in Table 1. The metal housing and shielded design of the AFCT-701ASDZ min- imizes the EMI challenge facing the equipment designer. For superior EMI performance it is recommended that equipment designs utilize SFP+ cages per SFF 8432. RF Immunity (Susceptibility) Due to its shielded design, the EMI immunity of the AF- CT-701ASDZ exceeds typical industry standards. Eye Safety The AFCT-701ASDZ provides Class 1 (single fault toler- ant) eye safety by design and has been tested for com- pliance with the requirements listed in Table 1. The eye safety circuit continuously monitors the optical output power level and will disable the transmitter upon de- tecting a condition beyond the scope of Class 1 certi- fication Such conditions can be due to inputs from the host board (Vcc fluctuation, unbalanced code) or a fault within the transceiver. US CDRH and EU TUV certificates are listed in table 1. Flammability The AFCT-701ASDZ optical transceiver is made of metal and high strength, heat resistant, chemical resistant and UL 94V-0 flame retardant plastic.
Table 1. Regulatory Compliance contacted by a Human Body Model probe. with device inserted into a panel. Interference (EMI) CENELEC EN55022 Class B board and chassis design.
Figure 2. Typical application configuration
- The module signal grounds are isolated from the module case.
- This is an open collector/drain output that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost. See Figure 2.
- This input is internally biased high with a 4.7 kΩ to 10 kΩ pullup resistor to VccT.
- Two-Wire Serial interface clock and data lines require an external pullup resistor dependent on the capacitance load.
- This is a ground return that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost.
Table 2. Contact Description
1 VeeT Transmitter Signal Ground Note 1
2 TX_FAULT Transmitter Fault (LVTTL-O) – High indicates a fault condition Note 2
3 TX_DISABLE Transmitter Disable (LVTTL-I) – High or open disables the transmitter Note 3
4 SDA Two Wire Serial Interface Data Line (LVCMOS – I/O)
5 SCL Two Wire Serial Interface Clock Line (LVCMOS – I/O)
6 MOD_ABS Module Absent (Output), connected to VeeT or VeeR in the module Note 5
7 RS0 Rate Select 0 - Not used, Presents high input impedance.
8 RX_LOS Receiver Loss of Signal (LVTTL-O) Note 2
9 RS1 Rate Select 1 - Not used, Presents high input impedance.
10 VeeR Receiver Signal Ground Note 1
11 VeeR Receiver Signal Ground Note 1
12 RD- Receiver Data Out Inverted (CML-O)
13 RD+ Receiver Data Out (CML-O)
14 VeeR Receiver Signal Ground
17 VeeT Transmitter Signal Ground Note 1
18 TD+ Transmitter Data In (CML-I)
19 TD- Transmitter Data In Inverted (CML-I)
20 VeeT Transmitter Signal Ground Note 1
Figure 3. Module edge connector contacts
Table 3. Absolute Maximum Ratings mum Ratings for extended periods can adversely affect reliability.
- The module supply voltages, VccT and VccR must not differ by more than 0.5 V or damage to the device may occur.
Table 4. Recommended Operating Conditions
- Ambient operating tempera ture limits are based on the Case Operating Temperature limits and are subject to the host system thermal design.
See Figure 6 for the module Tc reference point.
- The Power Supply Filter (PSF) and resulting Power Supply Noise Tolerance (PSNT) are specified in the SFF 8431 MSA. The PSNT value applies over
the range from 10Hz to 10MHz.
Table 6. High Speed Signal Electrical Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
- Internally AC coupled and terminated (100 Ohm differential).
- Internally AC coupled but requires an external load termination (100 Ohm differential).
- Reflection Coefficient given by equation SDD11(dB)=Max(-12 + 2*SQRT(f ) -6.3+13Log10(f/5.5)), with f in GHz.
- Differential Output S-parameter given by equation SDD22(dB)= Max(-12 + 2*SQRT(f ) -6.3+13Log10(f/5.5)), with f in GHz.
- The RMS value is measured by calculating the standard deviation of the histogram for one UI of the common mode signal.
Table 5. Low Speed Signal Electrical Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.
- Supply current includes both VccT and VccR connections.
- Measured with a 4.7 k Ω load to VccHost.
- TX_DISABLE has an internal 4.7 kΩ to 10 kΩ pull-up to VccT
Table 7. Two-Wire Interface Electrical Characteristics
- Rp is the pull up resistor. Active bus termination may be used by the host in place of a pullup resistor. Pull ups can be connected to various
the module to sink more than 3.0 mA current.
- C i is the capacitance looking into the module SCL and SDA contacts
- C b is the total bus capacitance on the SCL or SDA bus.
Table 8. Optical Specifications The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
- IEEE 802.3ae Clause 52 compliant.
- Vertical eye closure and stressed eye jitter are test conditions for stressed sensitivity (OMA) measurements.
- Loss of Signal (LOS) detection responds only to OMA and the indicator will respond unpredictably with the application of unmodulated optical
Table 9. Control Functions: Low Speed Signals Timing Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
- Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal. A 10 ms interval between asserti ons of TX_
- Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
- Time from power on or falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal and the Two -Wire
- From power on or negation of TX_FAULT using TX_DISABLE.
- Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
- Time from loss of optical signal to Rx_LOS Assertion.
- Time from valid optical signal to Rx_LOS De-Assertion.
Table 10. Control Functions: Two-Wire Interface Timing Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
- Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of no minal. Measured
from falling clock edge after stop bit of write transaction.
- Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises ab ove 90% of
- Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
- Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
- Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
- From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functio nal.
- Time from power on until module is ready for data transmission over the two-wire interface (reads or writes over A0h and A2h ).
- Operation of the Two Wire Serial Interface at rtes beyond 100kHz requires the use of clock stretching techniques.
- Between STOP and START. See SFF 8431 Section 4.3
Table 11. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Transceiver Internal Temperature T INT ±3.0 °C Temperature is measured internal to the transceiver. Valid from = -10°C to 85°C case temperature. voltage at the VccT contact. Valid over 3.3 V ± 10%. INT ±10 % I INT accuracy is better than ±10% of the nominal value. Output Power fiber. Valid from151 μW to 1120 μW. Power fiber. Valid from 25 μW to 1120 μW. Figure 5. Transceiver timing diagrams (module installed and power applied except where noted)
Table 12. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h)
- The IEEE Organizationally Unique Identifier (OUI) assigned to Avago Technologies is 00-17-6A (3 bytes of hex).
- Laser wavelength is represented in 16 unsigned bits.
- Addresses 63 and 95 are checksums calculated (per SFF-8472) and stored prior to product shipment.
- Addresses 68-83 specify the AFCT-701ASDZ ASCII serial number and will vary on a per unit basis.
- Addresses 84-91 specify the AFCT-701ASDZ ASCII date code and will vary on a per date code basis.
Table 13. EEPROM Serial ID Memory Contents – Enhanced Feature Set Memory (Address A2h)
0 Temp H Alarm MSB [1] 26 Tx Pwr L Alarm MSB [4] 104 Real Time Rx Pwr MSB [5]
1 Temp H Alarm LSB [1] 27 Tx Pwr L Alarm LSB [4] 105 Real Time Rx Pwr LSB [5]
2 Temp L Alarm MSB [1] 28 Tx Pwr H Warning MSB [4] 106 Reserved
3 Temp L Alarm LSB [1] 29 Tx Pwr H Warning LSB [4] 107 Reserved
4 Temp H Warning MSB [1] 30 Tx Pwr L Warning MSB [4] 108 Reserved
5 Temp H Warning LSB [1] 31 Tx Pwr L Warning LSB [4] 109 Reserved
6 Temp L Warning MSB [1] 32 Rx Pwr H Alarm MSB [5] 110 Status/Control
7 Temp L Warning LSB [1] 33 Rx Pwr H Alarm LSB [5] 111 Reserved
8 Vcc H Alarm MSB [2] 34 Rx Pwr L Alarm MSB [5] 112 Flag Bits - See Table 16
9 Vcc H Alarm LSB [2] 35 Rx Pwr L Alarm LSB [5] 113 Flag Bits - See Table 16
10 Vcc L Alarm MSB [2] 36 Rx Pwr H Warning MSB [5] 114 Reserved
11 Vcc L Alarm LSB [2] 37 Rx Pwr H Warning LSB [5] 115 Reserved
12 Vcc H Warning MSB [2] 38 Rx Pwr L Warning MSB [5] 116 Flag Bits - See Table 16
13 Vcc H Warning LSB [2] 39 Rx Pwr L Warning LSB [5] 117 Flag Bits - See Table 16
14 Vcc L Warning MSB [2] 40-55 Reserved 118-127 Reserved
15 Vcc L Warning LSB [2] 56-94 External Calibration Constants [6] 128-247 Customer Writeable
16 Tx Bias H Alarm MSB [3] 95 Checksum for Bytes 0-94 [7] 248-255 Vendor Specific
17 Tx Bias H Alarm LSB [3] 96 Real Time Temperature MSB [1]
18 Tx Bias L Alarm MSB [3] 97 Real Time Temperature LSB [1]
19 Tx Bias L Alarm LSB [3] 98 Real Time Vcc MSB [2]
20 Tx Bias H Warning MSB [3] 99 Real Time Vcc LS [2]
21 Tx Bias H Warning LSB [3] 100 Real Time Tx Bias MSB [3]
22 Tx Bias L Warning MSB [3] 101 Real Time Tx Bias LSB [3]
23 Tx Bias L Warning LSB [3] 102 Real Time Tx Power MSB [4]
24 Tx Pwr H Alarm MSB [4] 103 Real Time Tx Power LSB [4]
25 Tx Pwr H Alarm LSB [4]
- Temperature (Temp) is decoded as a 16 bit signed twos compliment integer in increments of 1/256°C.
- Supply Voltage (Vcc) is decoded as a 16 bit unsigned integer in increments of 100 μV.
- Laser bias current (Tx Bias) is decoded as a 16 bit unsigned integer in increments of 2 μA.
- Transmitted average optical power (Tx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 μW.
- Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 μW.
- Bytes 56-94 are not intended for use with AFCT-701ASDZ, but have been set to default values per SFF-8472.
- Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment.
Table 14. EEPROM Serial ID Memory Contents – Soft Commands (Address A2h, Byte 110)
7 TX_ DISABLE State Digital state of SFP TX_ DISABLE Input (1 = TX_DISABLE asserted) Note 1
6 Soft TX_ DISABLE Read/write bit for changing digital state of TX_DISABLE function Note 1, 2
5 Reserved
4 Reserved
3 Reserved
2 TX_FAULT State Digital state of the SFP TX_FAULT Output (1 = TX_FAULT asserted) Note 1
1 RX_LOS State Digital state of the SFP RX_LOS Output (1 = RX_LOS asserted) Note 1
- The response time for soft commands of the AFCT-701ASDZ is 100 msec as specified by SFF-8472.
- Bit 6 is logic OR’d with the SFP TX_DISABLE input on contact 3; either asserted will disable the SFP+ transmitter.
Table 15. EEPROM Serial ID Memory Contents – Alarms and Warnings (Address A2h, Bytes 112, 113, 116, 117)