AFBR-1531CZ

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• 1 - Introduction Avago Technologies manufactures fiber-optic components for industrial, medical, transportation, power generation, and gaming markets. Its products have been adopted in various applications for years since it started producing fiber-optic components. Avago Technologies offers both discrete and integrated fiber-optic components that can be easily designed into customer systems. Integrated transmitters incorporate the driving circuit with the product, while discrete transmitters require customers to design the transmitter driving circuit. The advantage of using discrete components is the flexibility in designing optical link solutions that are optimized for the target customer application. Objective Avago Technologies supports its customers to implement cost-effective components to interface with its products. This application note (AN) describes the logic device SN74LVC86Ax by Texas Instruments for creating a light emitting diode (LED) driver circuit operating at 3.3V. The driving circuit for analog transmitters offers flexibility in design and requires only a low component count. New Driver for 3.3V Operations For best performance and optimum matching with Avago´s optical parts, the SN74LVC86Ax logic integrated circuit (IC) is described in this AN. This AN provides details about LED driver circuits for Avago Technologies' discrete fiber-optic transmitters of the versatile link product family AFBR-15x1CZ with an LED at 650 nm. The LED driver circuit is recommended to create optical links with versatile link fiber-optic receivers at supply voltage levels of 3.3 V, such as AFBR-25x1CZ. The quadruple 2-input exclusive-or gate SN74LVC86Ax at Vcc = 3.3V shows comparable performance to the Vcc = 5.0V compatible logic devices, such as 74ACT[Q]00xx (NAND gate) or 74ACT08Mxx (AND gate) as mentioned in the optical transmitter data sheets. NOTE All data shown in this AN is based on tests with one driver IC SN74LVC86AD and three transmitter samples of the versatile link product family AFBR-15x1CZ. Test data shown in this application note reflects the typical behavior of the tested fiber-optic transmitters in combination with the specific driver IC and does not cover worst case conditions. The schematic shown in this application note is a recommendation and Avago Technologies cannot guarantee full function and performance. The designer should perform his own verification. AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Cost-Effective 650 nm LED Transmitter Driver for DC-5MBd Application for 3.3V Power Supply Voltage Application Note

• 2 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Low Voltage Quadruple 2-Input Exclusive-OR Gates SN74LVC86Ax Low Voltage Quadruple 2-Input Exclusive-OR Gates SN74LVC86Ax Using an exclusive-OR gate instead of the common AND or NAND gate shows the flexibility in circuit design of analog fiber-optic transmitters. The SN74LVC86Ax IC provides four low-voltage, 2-input exclusive-OR (XOR) gates and is fabricated with advanced CMOS technology. At a supply voltage of 3.3V, the used exclusive-OR gate of SN74LVC86AD is compatible with electrical (LV)TTL input levels. A wide operating temperature range enables optical links with Avago Technologies' transmitter AFBR-15x1CZ for ambient temperatures up to 95°C. The current load capability per output is up to ± 24 mA for 3.3V operations. For the following described circuit, one of the four gates is used as common input to drive the other three gates, which provide the LED driver current in parallel. Due to the used CMOS technology, the output voltage levels of the XOR gates at electrical output state LOW are slightly above the GND level. For simplification, this specific voltage drop is called V gate. Equation 1 Equation 1 is based on test data of one single SN74LVC86AD IC. For more details about the typical IC performance, contact the manufacturer of the driver IC. Because of the low supply voltage of 3.3V, relative small voltage variations have a measurable influence to the typical driver circuit behavior. Therefore, the individual gate voltage (Vgate) of the used driver IC and the individual forward voltage (Vf ) of the LED at the specific driver current should be used for the calculations that appear in this AN. NOTE The following information is valid when using discrete fiber optic transmitters of the Avago Technologies' versatile link families AFBR-15x1CZ with bare LED in combination with the XOR gate SN74LVC86AD. Nevertheless, using other Avago Technologies´ discrete fiber-optic transmitters, such as AFBR-15x9Z and ABFR-1528CZ, for higher data rates should show comparable results. Use this AN to create LED driver circuits to support the individual needs of the customer’s specific applications.

• 3 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Driver Circuit for AFBR-15x1CZ (650 nm LED Discrete Fiber-Optic Transmitter) Optimized for Low Current Consumption Driver Circuit for AFBR-15x1CZ (650 nm LED Discrete Fiber-Optic Transmitter) Optimized for Low Current Consumption Figure 1 Driver Circuit for AFBR-15x1CZ at Vcc=3.3 V *A) Pin 1 of the exclusive-OR gate (U1) has to be used for circuit logic selection. By wiring Pin1 of the XOR gate accordingly, the driver circuit shown in Figure 1 can operate with inverse or non-inverse logic. Inverse logic means that an electrical input level of HIGH results in LED OFF, and vice versa. Non-inverse logic means that an electrical Input level of HIGH results in LED ON, and vice versa. The optical receivers AFBR-25x1CZ have inverted output signals, which means that LIGHT ON leads to an electrical output level of LOW, and vice versa. If a non-inverting optical link with AFBR-15x1CZ and AFBR-25x1CZ should be created, Pin 1 of the driver circuit in Figure 1 should be connected to Vcc. Supply line capacitors (10 μF and 100 nF; tolerance ± 20%) have a noise filter effect and are recommended. The pull-up resistor R1 (4.7 k) is optional and has no direct influence to the LED driver current level. Resistor R2 is the LED driver current limiting resistor. Typically, the optical fall time of the LED is faster than the optical rise time, which is related to the inner LED structure and the driver circuit. This unbalanced switching times of the LED lead to pulse width distortion (PWD) of the optical signal. For an inverse logic (inverting) driver circuit: XOR (U1) Input pin1 connected to V CC For a non-inverse (non-inverting) driver circuit: XOR (U1) Input pin1 connected to GND U1 (= SN74LVC86Axx) GND +3V3 Vcc Input 100nF 10μF GND AFBR-15x1CZ R2 R3 GND

• 4 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Driver Circuit for AFBR-15x1CZ (650 nm LED Discrete Fiber-Optic Transmitter) Optimized for Low Current Consumption To reduce this effect, R3 and C1 realize a current peaking of the LED forward currents, which increases the optical rise times (tr) of the LED. Careful selection of R2, R3, and C1 allows aligning of the optical rise and fall times to similar values, which helps to reduce the negative effect of pulse width distortion. An additional benefit of this driver circuit is the very low current consumption when the LED is OFF, which is typically far below 1 mA, independent of the selected LED driver current. The driver current (peak value) at TA = 25 °C can be calculated by following formula. Equation 2 Equation 3 Where VCC is the supply voltage, R2 is the effective current limiting resistor value for condition LED = ON, Vf is the forward voltage of the LED at target driver current, and Vgate is the gate voltage drop across the IC outputs at the target driver current, when they are low. The more accurate the resistor value (tolerance class) is, the better the accordance between theoretical calculated and actual realized LED driver current in the application. Equation 4 shows the optimization rules determined by testing for fast optical switching times when using SN74LVC86AD and Avago Technologie´s discrete fiber-optic transmitters of the versatile link product family, AFBR-15x1CZ for data rates up to 5 MBd. Equation 4 NOTE Using a higher capacitance value for C1 results in a higher current peaking effect that creates faster LED rise times, but also higher optical overshoot. The LED capacitance, the individual capacitance of the PCB layout, and the tolerances of the used board components influence the actual switching capacity and the peaking effect. Therefore, an individual check of the optical output signal quality is recommended during the circuit design. By reducing the LED driver current, the optical peaking effect must be increased to realize fast-enough LED switching times. NOTE For highest performance and reliability of the driver circuit, the LED peak current level should be above 10mA, but below the recommended maximum current load of the transmitter. By using the optimization rules mentioned before following component values can be calculated for V CC = 3.3V and TA = 25°C. NOTE If the calculated component value is not available or not desired, choose the next closer component value; however, a recalculation of the LED driver current is required. Target Peak LED Current (mA) R2 () R3 () C1 (pF) 30 44 15 248 10 145 48 187

• 5 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Further Details about the Recommended Driver Circuit (Figure 1) To design a 30 mA, DC proven (that is, constant LED ON operations) driver circuit over the entire temperature range, the next lower standard value for R1 and C1 were chosen to create slightly lower LED driver currents and lower peaking effects at TA = 25°C. However, the components for the 10 mA LED driver circuit were selected to create slightly higher LED driver currents. Component values installed in driver circuit (Figure 1) and tested with AFBR-1521CZ. Further Details about the Recommended Driver Circuit (Figure 1) Capacitance C1 builds the peaking component, which helps to improve the optical rise time of the LED. To reach comparable optical rise and fall times, a specific level of optical overshoot is required; therefore, do not choose a value C1 that is too low. By using the recommended value for C1, a sufficiently high overshoot level for 3.3V operation is provided for most applications. If the recommended C1 value is not available, select a closer one. Note that higher C1 values result in a higher optical overshoot. Typically the LED forward voltage (Vf ) decreases with ambient temperature, which means that at lower ambient temperatures, the voltage drop (Vf ) over the active LED (LIGHT ON) is higher. The efficiency of electro/optical conversion of LEDs typically decreases with ambient temperature, which means that the optical output power at a constant LED driver current level is lower at higher ambient temperatures. By using an LED driver circuit with a current-limiting resistor in the switched voltage output path (such as Figure 1), an increasing LED forward voltage Vf will reduce the effective LED driver current (see Equation 2) at a stable VCC, because the voltage drop over the current limiting resistor is reduced. Therefore, at lower ambient temperatures, the effective LED current is reduced, and at higher ambient temperatures, the effective LED current is increased. These characteristics result in a slight compensation effect that stabilizes the LED optical output power over temperature. The optional pull-up resistor R1 (4.7 k) causes parallel current loads beside the LED of around 0.7 mA at VCC = 3.3V when LED is ON. Other effects are typically negligible; therefore, the parameter value ICC at Light ON closely reflects the effective LED peak driver current. VCC is the supply voltage of the driver circuit, and ICC is the current consumption of the driver circuit under operation. The Pulse Width Distortion (PWD), the optical rise time (tr) and optical fall time (tf ) of the discrete transmitters and the light output power (LOP) variation can be found in Table 1 and Table 2. The LOP variation value reflects the variation in optical peak power relative to the typical optical output power measured at 3.3V and TA = 25°C. NOTE The following tables reflect the typical behavior of the tested three transmitter samples installed in a specific test circuit and are not generally valid. Individual performance tests are recommended. Expected Peak LED Current (mA) R2 () ± 1% R3 () ± 1% C1 (pF) ± 5% ≈28 47 15 220 ≈11 130 43 180

• 6 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Further Details about the Recommended Driver Circuit (Figure 1) Table 1 shows the average test data of three AFBR-1521CZ optical transmitters, placed in driver circuit (Figure 1) with components for the LED current of around 28 mA at VCC = 3.3V and TA = 25°C. Components installed are as follows: R1 = 4.7 k(± 5%); R2 = 47(± 1%); R3 = 15(± 1%); C1 = 220 pF (± 5%).; Table 2 shows the average test data of three AFBR-1521CZ optical transmitters, placed in driver circuit (Figure 1) with components for the LED current of around 11 mA at VCC = 3.3V and TA = 25°C. Components installed are as follows: R1 = 4.7 k(± 5%); R2 = 130(± 1%); R3 = 43(± 1%); C1 = 180 pF (± 5%). The variation in supply voltage VCC of the driver circuit has significant influence on the LED driver current level. Table 1 and Table 2 show that VCC fluctuations in the driver circuit of around ± 10% (3.3V ± 0.3V) typically result in up to a 1.5 dB optical output power variation. Table 1 Typical Values Vcc (V) PWD (ns) Optical tr (ns) Optical tf (ns) Icc at Light OFF (μA) Icc at Light ON (mA) LOP Variation (Relative to Vc c= 3.3V, TA = 25°C) (dB) TA=95°C at 5MBd (pulse width = 200ns) PRBS 2^7-1, target ILED peak = 28mA TA=25°C at 5MBd (pulse width = 200ns) PRBS 2^7-1, target I LED peak = 28mA TA=-40°C at 5MBd (pulse width = 200ns) PRBS 2^7-1, target I LED peak = 28mA Table 2 Typical Values Vcc (V) PWD (ns) Optical tr (ns) Optical tf (ns) Icc at Light OFF (μA) Icc at Light ON (mA) LOP Variation (Relative to Vcc = 3.3V, TA = 25°C) (dB) TA = 95°C at 5 MBd (pulse width = 200 ns), PRBS 2^7-1, target ILED peak = 11 mA TA = 25°C at 5 MBd (pulse width = 200 ns), PRBS 2^7-1, target I LED peak = 11 mA TA = –40°C at 5 MBd (pulse width = 200 ns), PRBS 2^7-1, target I LED peak = 11 mA

• 7 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Eye Diagrams Therefore it is recommended to stabilize the VCC level and reducing voltage fluctuations. NOTE The mentioned supply line capacitors (10 μF and 100 nF) should be seen as first guidance. Depending on the actual VCC noise characteristic in the end application an individual adaption of the supply line noise filtering can be necessary to ensure stable and low-noise power supply for the LED driver circuit. The tables show that the driver circuit (Figure 1) together with the temperature-related LED characteristics provide reliable operations combined with a very low quiescent current when the LED is OFF. If a stable and low-noise supply voltage (VCC) level for the driver circuit is provided, the LED current is stable (the typical LOP variation is around ± -0.5 dB) over temperature as well. Nevertheless, individual performance tests before design-in are recommended. Eye Diagrams The following eye diagrams are of the O/E converted transmitter signal of AFBR-1521CZ installed in the driver circuit (Figure 1) with components for 28 mA LED peak current. VCC = 3.3V; Electrical Input Pattern: PRBS 2^7 -1 at 5 MBd Components installed: R1=4.7 k; R2=47; R3=15; C1=220 pF ILED peak = 28 mA ILED peak = 28 mA

• 8 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Eye Diagrams ILED peak = 28 mA The following eye diagrams are of O/E converted transmitter signals of AFBR-1521CZ installed in the driver circuit (Figure 1) with components for 11 mA LED peak current. VCC = 3.3V; Electrical Input Pattern: PRBS 2^7 -1 at 5 MBd Components installed: R1=4.7k; R2=130; R3=43; C1=180pF ILED peak = 11 mA

• 9 - AFBR-1521CZ, AFBR-1531CZ, AFBR-1541CZ Application Note Eye Diagrams ILED peak = 11 mA ILED peak = 11mA

For product information and a complete list of distributors, please go to our web site: www.broadcom.com. Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, and the A logo are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries and/or the EU. Copyright © 2016 by Broadcom. All Rights Reserved. The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. pub-005893 – November 22, 2016 Terminology An opto-electrical (O/E) converter converts the optical signal to an electrical signal. To measure the characteristics of the optical transmitter performance, the output of the O/E converter is connected to an oscilloscope. Pulse width distortion (PWD) of an optical signal is the difference in pulse width between the electrical input signal of the driver circuit and the optical signal of the transmitter, measured over all pulses in the acquired waveform. PWD values mentioned in this AN are based on pulse widths measured at 50% of the O/E converted and 50% of the electrical input signal amplitude. Optical overshoot is the amount of overshoot following a rising edge of the O/E converted signal. Optical rise time (tr) is the transition time from 10% to 90% for a rising edge of the O/E converted signal. Optical fall time (tf ) is the transition time from 90% to 10% for a falling edge of the O/E converted signal. PRBS stands for pseudo random binary sequence and is a commonly used test pattern generated by a pulse pattern generator connected to the electrical input of the driver circuit. By selecting PRBS2^7–1, the generator uses 7 tabs of an internal linear-feedback shift register to create random bits of 1 and 0. The sequence length is determined by the number of used tabs (l = 2^N - 1). With a selected data rate of 5MBd (pulse width = 200 ns) the PRBS sequence restarts each ≈25.4 μs (=(2^7–1) × 200 ns). The electrical input line of the driver circuit was terminated with 51 and the following electrical input levels were selected: LOW level = 0V; HIGH level = 2.5V.