AF4901P ANACHIP | Alldatasheet
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Technical content
Dual P-Channel 30-V (D-S) Common Drain MOSFET This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. 1.0 Jul 16, 2004 Features -Low rDS(on) Provides Higher Efficiency and Extends Battery Life -Miniature SO-8 Surface Mount Package Saves Board Space -High power and current handling capability -Extended VGS range (±25) for battery pack
applications
Product Summary VDS (V) rDS(on) (mΩ) ID (A) 21@VGS=-10V -9.5 -30 35@VGS=-4.5V -7.0 Pin Assignments SOP-8 D D D D S G S G General Description These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWM DC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. Pin Descriptions Pin Name
Description
S Source G Gate D Drain Ordering information A X 4901P X X X PN Package Feature F :MOSFET S: SOP-8 Lead Free Blank : Normal L : Lead Free Package Packing Blank : Tube or Bulk A : Tape & Reel
Dual P-Channel 30-V (D-S) Common Drain MOSFET Anachip Corp. Absolute Maximum Ratings (TA=25ºC unless otherwise noted) Symbol Parameter Rating Units VDS Drain-Source Voltage -30 V VGS Gate-Source Voltage ±25 V TA=25ºC -9.5 ID Continuous Drain Current (Note 1) TA=70ºC -7.5 A IDM Pulsed Drain Current (Note 2) ±30 A IS Continuous Source Current (Diode Conduction) (Note 1) -2.1 A TA=25ºC 3.1 PD Power Dissipation (Note 1) TA=70ºC 2.6 W TJ, TSTG Operating Junction and Storage Temperature Range -55 to 150 ºC Thermal Resistance Ratings Symbol Parameter Maximum Units RθJC Maximum Junction-to-Case (Note 1) t < 5 sec ºC/W RθJA Maximum Junction-to-Ambient (Note 1) t < 5 sec ºC/W Note 1: surface Mounted on 1”x 1” FR4 Board. Note 2: Pulse width limited by maximum junction temperature Specifications (TA=25ºC unless otherwise noted) Limits Symbol Parameter Test Conditions Min. Typ. Max. Unit Static V(BR)DSS Drain-Source breakdown Voltage VGS=0V, ID=-250uA -30 V VGS(th) Gate-Threshold Voltage VDS= VGS, ID=-250uA -1.6 V IGSS Gate-Body Leakage VDS=0V, VGS=±25V ±100 nA VDS=-24V, VGS=0V IDSS Zero Gate Voltage Drain Current VDS=-24V, VGS=0V, TJ=55ºC uA ID(on) On-State Drain Current (Note 3) VDS=-5V, VGS=-10V -30 A VGS=-10V, ID=-9.5A VGS=-4.5V, ID=-7.0A rDS(on) Drain-Source On-Resistance (Note 3) VGS=-10V, ID=-7A, TJ=125ºC mΩ gfs Forward Tranconductance (Note 3) VDS=-5V, ID=-13A S VSD Diode Forward Voltage IS=2.1A, VGS=0V -0.7 -1.2 V Dynamic (Note 4) Qg Total Gate Charge Qgs Gate-Source Charge 4.7 Qgd Gate-Drain Charge VDS=-15V, VGS=-5V, ID=-7A 4.8 nC Switching td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall-Time VDD=-15, RL=6Ω, ID=-1A, VGEN=-10V nS Note 3: Pulse test: PW < 300us duty cycle < 2%. Note 4: Guaranteed by design, not subject to production testing.
Dual P-Channel 30-V (D-S) Common Drain MOSFET Anachip Corp. Marking Information SOP-8L ( Top View ) 4 9 0 1 P AA Y W X Year code: Part Number Lot code: Week code: Factory code "A~Z": 01~26; "A~Z": 27~52 "4" =2004 "A~Z": 01~26; "A~Z": 27~52 "X": Non-Lead Free; "X": Lead Free Logo Package Information Package Type: SOP-8L VIEW "A" L C VIEW "A" H E A B e D 7 (4X) 0.015x45 7 (4X) y Dimensions In Millimeters Dimensions In Inches Symbol Min. Nom. Max. Min. Nom. Max. A 1.40 1.60 1.75 0.055 0.063 0.069 0.10 0.25 0.040 0.100 1.30 1.45 1.50 0.051 0.057 0.059 B 0.33 0.41 0.51 0.013 0.016 0.020 C 0.19 0.20 0.25 0.0075 0.008 0.010 D 4.80 5.05 5.30 0.189 0.199 0.209 E 3.70 3.90 4.10 0.146 0.154 0.161 e 1.27 0.050 H 5.79 5.99 6.20 0.228 0.236 0.244 L 0.38 0.71 1.27 0.015 0.028 0.050 y 0.10 0.004 θ