ADXL103CE-REEL1

ADXL103 AD | Alldatasheet

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Technical content

Precision ±1.7 g Single/Dual Axis Accelerometer ADXL103/ADXL203 Rev. 0 Information furn ished by An alog D evices is believed to be accurate and reliable. However, n o resp onsibility is assume d b y A nalog De vices fo r its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or p atent rights of Analog De vices. Trademarks an d registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.

FEATURES

High performance, single/dual axis accelerometer on a single IC chip 5 mm × 5 mm × 2 mm LCC package 1 mg resolution at 60 Hz Low power: 700 µA at VS = 5 V (typical) High zero g bias stability High sensitivity accuracy –40°C to +125°C temperature range X and Y axes aligned to within 0.1° (typical) BW adjustment with a single capacitor Single-supply operation 3500 g shock survival

APPLICATIONS

Vehicle Dynamic Control (VDC)/Electronic Stability Program (ESP) systems Electronic chassis control Electronic braking Platform stabilization/leveling Navigation Alarms and motion detectors. High accuracy, 2-axis tilt sensing GENERAL DESCRIPTION The ADXL103/ADXL203 are high precision, low power, complete single and dual axis accelerometers with signal conditioned voltage outputs, all on a single monolithic IC. The ADXL103/ADXL203 measures acceleration with a full-scale range of ±1.7 g . The ADXL103/ADXL203 can measure both dynamic acceleration (e.g., vibration) and static acceleration (e.g., gravity). The typical noise floor is 110 μg/√Hz, allowing signals below 1 mg (0.06° of inclination) to be resolved in tilt sensing applications using narrow bandwidths (<60 Hz). The user selects the bandwidth of the accelerometer using capacitors CX and CY at the XOUT and YOUT pins. Bandwidths of 0.5 Hz to 2.5 kHz may be selected to suit the application. The ADXL103 and ADXL203 are available in 5 mm × 5 mm × 2 mm, 8-pad hermetic LCC packages. FUNCTIONAL BLOCK DIAGRAM ADXL103 03757-0-001 SENSOR +5V OUTPUT AMP COM ST XOUT VS CDC CX RFILT 32kΩ DEMODAC AMP ADXL203 SENSOR +5V OUTPUT AMP OUTPUT AMP COM ST YOUT VS CDC CY RFILT 32kΩ DEMOD XOUT CX RFILT 32kΩ AC AMP Figure 1. ADXL103/ADXL203 Functional Block Diagram

Rev. 0 | Page 2 of 12 TABLE OF CONTENTS Design Trade-Offs for Selecting Filter Characteristics: The Using the ADXL103/ADXL203 with Operating Voltages Other than 5 V

REVISION HISTORY

Revision 0: Initial Version

Table 1. TA = –40°C to +125°C, VS = 5 V, CX = CY = 0.1 μF, Acceleration = 0 g, unless otherwise noted. 1 Guaranteed by measurement of initial offset and sensitivity. 2 Sensitivity is essentially ratiometric to VS. For VS = 4.75 V to 5.25 V, sensitivity is 186 mV/V/g to 215 mV/V/g. 3 Defined as the output change from ambient-to-maximum temperature or ambient-to-minimum temperature. 4 Actual frequency response controlled by user-supplied external capacitor (CX, CY). 6 Self-test response changes cubically with VS. 7 Larger values of CX, CY will increase turn-on time. Turn-on time is approximately 160 × CX or CY + 4 ms, where CX, CY are in µF. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed.

Table 2. ADXL103/ADXL203 Stress Ratings Table 3. Package Characteristics

• Minimum Temperature (TSMIN) 100°C 150°C
• Minimum Temperature (TSMAX) 150°C 200°C
• Time (TSMIN to TSMAX) (tS) 60–120 seconds 60–150 seconds TSMAX to TL
• Ramp-Up Rate 3°C/second Time Maintained above Liquidous (TL)
• Liquidous Temperature (TL) 183°C 217°C
• Time (tL) 60–150 seconds 60–150 seconds Peak Temperature (TP) 240°C +0°C/–5°C 260°C +0°C/–5°C Time within 5°C of Actual Peak Temperature (tP) 10–30 seconds 20–40 seconds Ramp-Down Rate 6°C/second Max Time 25°C to Peak Temperature 6 minutes Max 8 minutes Max

Figure 2. Recommended Soldering Profile

Rev. 0 | Page 9 of 12 For most applications, a single 0.1 µF capacitor, CDC, will adequately decouple the accelerometer from noise on the power supply. However in some cases, particularly where noise is pre- sent at the 140 kHz internal clock frequency (or any harmonic thereof), noise on the supply may cause interference on the ADXL103/ADXL203 output. If additional decoupling is needed, a 100 Ω (or smaller) resistor or ferrite beads may be inserted in the supply line of the ADXL103/ADXL203. Additionally, a larger bulk bypass capacitor (in the 1 µF to 22 µF range) may be added in parallel to CDC. SETTING THE BANDWIDTH USING CX AND CY The ADXL103/ADXL203 has provisions for bandlimiting the XOUT and YOUT pins. Capacitors must be added at these pins to implement low-pass filtering for antialiasing and noise reduction. The equation for the 3 dB bandwidth is F–3 dB = 1/(2π(32 kΩ) × C(X, Y)) or more simply, F–3 dB = 5 µF/C(X, Y) The tolerance of the internal resistor (RFILT) can vary typically as much as ±25% of its nominal value (32 kΩ); thus, the band- width will vary accordingly. A minimum capacitance of 2000 pF for CX and CY is required in all cases. Table 4. Filter Capacitor Selection, CX and CY be left open-circuit or connected to common in normal use. low VF clamping diode between ST and VS is recommended. is dependent on the analog filter bandwidth at XOUT and YOUT. values, given the rms value. Table 5. Estimation of Peak-to-Peak Noise

Table 6. Filter Capacitor Selection (CX, CY) voltage. At VS = 3 V the output sensitivity is typically 560 mV/g. nominally equal to VS/2 at all supply voltages. density is typically 190 µg/√Hz. to 150 mV , or equivalent to 270 mg (typical). The supply current decreases as the supply voltage decreases. Typical current consumption at VDD = 3 V is 450 µA. input vector to determine the orientation of an object in space. only 12.2 mg per degree and resolution declines. vibration, shock, or other accelerations.

Figure 22. ADXL103 8-Lead CLCC Table 7. ADXL103 8-Lead CLCC Pin Function Descriptions

1 ST Self Test

2 DNC Do Not Connect

3 COM Common

4 DNC Do Not Connect

5 DNC Do Not Connect

6 DNC Do Not Connect

7 XOUT X Channel Output

8 VS 3 V to 6 V

Figure 23. ADXL203 8-Lead CLCC Table 8. ADXL203 8-Lead CLCC Pin Function Descriptions

6 YOUT Y Channel Output

0.38 DIAMETER

0.50 DIAMETER

Figure 24. 8-Terminal Ceramic Leadless Chip Carrier [LCC] degradation or loss of functionality. 1 Lead finish—Gold over Nickel over Tungsten. registered tra demarks are the prop erty of their respective owners .