ADUM1241ARSZ-RL7

ADUM1240_V01 AD | Alldatasheet

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Micropower, Dual-Channel Digital Isolators Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2013–2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

3.3 V operation

5.6 μA per channel quiescent current, refresh enabled 0.3 μA per channel quiescent current, refresh disabled 148 μA/Mbps per channel typical dynamic current

2.5 V operation

3.1 μA per channel quiescent current, refresh enabled 0.1 μA per channel quiescent current, refresh disabled 116 μA/Mbps per channel typical dynamic current Small, 20-lead SSOP package and small 8-lead SOIC package Bidirectional communication Up to 2 Mbps data rate nonreturn to zero (NRZ) High temperature operation: 125°C High common-mode transient immunity: >25 kV/μs Safety and Regulatory Approvals UL 1577 component recognition program

3750 V rms for 1 minute per UL 1577 (20-lead SSOP)

3000 V rms for 1 minute per UL 1577 (8-lead SOIC)

CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 V IORM = 849 V peak (20-lead SSOP) VIORM = 560 V peak (8-lead SOIC)

APPLICATIONS

General-purpose, low power, multichannel isolation

1 MHz low power serial peripheral interface (SPI)

4 mA to 20 mA loop process control GENERAL DESCRIPTION The ADuM1240/ADuM1241/ADuM1245/ADuM12461 are micropower, 2-channel, digital isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed, complementary metal oxide semiconductor (CMOS) and monolithic air core transformer technologies, these isolation components provide outstanding performance characteristics superior to the alternatives, such as optocoupler devices. The 20-lead SSOP version of the ADuM1240/ADuM1241/ ADuM1245/ADuM1246 allows control of the internal refresh functions. As shown in Figure 3, in standard operating mode, when EN x = 0 (internal refresh enabled), the current per channel is less than 10 μA. When ENx = 1 (internal refresh disabled), the current per channel drops to less than 1 μA. FUNCTIONAL BLOCK DIAGRAMS ENCODE DECODE ENCODE DECODE VDD1 GND1 NIC NIC VIA/VOA VIB EN1 NIC VDD2 GND2 NIC NIC V OA/VIA VOB EN2 NIC NIC GND1 NIC GND2 ADuM124x 11925-002 Figure 1. 20-Lead SSOP Package Functional Block Diagram

5 GND2

Figure 2. 8-Lead SOIC Package Functional Block Diagram meet regulatory requirements, such as UL and CSA standards. protect against extraneous noise disturbances. Figure 3. Typical Total Supply Current (IDD1 + IDD2) per Channel (VDDx =

3.3 V) as a Function of Data Rate

Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B | Page 3 of 24 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—3.3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V . Minimum and maximum specifications apply over the entire specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within pulse width distortion (PWD) limit Propagation Delay tPHL, tPLH 80 180 ns 50% input to 50% output Change vs. Temperature 200 ps/°C Minimum Pulse Width PW 500 ns Within PWD limit Pulse Width Distortion PWD 8 ns |tPLH − tPHL| Propagation Delay Skew1 tPSK 10 ns Channel Matching Codirectional tPSKCD 10 ns Opposing Direction tPSKOD 15 ns 1 tPSK is the magnitude of the worst case difference in tPHL and tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1240/ADuM1245 IDD1 366 600 µA IDD2 246 375 µA ADuM1241/ADuM1246 IDD1 306 450 µA IDD2 306 450 µA Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Threshold Logic High VIH 0.7 VDDx1 V Logic Low VIL 0.3 VDDx1 V Output Voltages Logic High VOH VDDx1 − 0.1 3.3 V IOUTx = −20 µA, VIx = VIxH VDDx1 − 0.4 3.1 V IOUTx = −4 mA, VIx = VIxH Logic Low VOL 0.0 0.1 V IOUTx = 20 µA, VIx = VIxL 0.2 0.4 V IOUTx = 4 mA, VIx = VIxL Input Current per Channel II −1 +0.01 +1 µA 0 V ≤ VIx ≤ VDDx1 Input Switching Thresholds Positive Threshold Voltage VT+ 1.8 V Negative Going Threshold VT− 1.2 V Input Hysteresis ΔVT 0.6 V Undervoltage Lockout, VDD1 or VDD2 UVLO 1.5 V Supply Current per Channel Quiescent Current Input Supply IDDI (Q) 4.8 10 µA ENX low Output Supply IDDO (Q) 0.8 6 µA ENX low Input (Refresh Off ) IDDI (Q) 0.12 µA ENX high Output (Refresh Off ) IDDO (Q) 0.13 µA ENX high

ADuM1240/ADuM1241/ADuM1245/ADuM1246 Data Sheet Rev. B | Page 4 of 24 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Dynamic Supply Current Input IDDI (D) 88 µA/Mbps Output IDDO (D) 60 µA/Mbps AC SPECIFICATIONS Output Rise Time/Fall Time tR/tF 2 ns 10% to 90% Common-Mode Transient Immunity2 |CM| 25 40 kV/µs VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 14 kbps 1 VDDx = VDD1 or VDD2. 2 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V OUT > 0.8 VDDx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. ELECTRICAL CHARACTERISTICS—2.5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 2.5 V . Minimum and maximum specifications apply over the entire Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Table 4. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay tPHL, tPLH 112 180 ns 50% input to 50% output Change vs. Temperature 280 ps/°C Pulse Width Distortion PWD 12 ns |tPLH − tPHL| Minimum Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 tPSK 10 ns Channel Matching Codirectional tPSKCD 10 ns Opposing Direction tPSKOD 30 ns 1 tPSK is the magnitude of the worst case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 5. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1240/ADuM1245 IDD1 312 400 µA IDD2 168 250 µA ADuM1241/ADuM1246 IDD1 240 375 µA IDD2 240 375 µA

Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B | Page 5 of 24 Table 6. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Threshold Logic High VIH 0.7 VDDx1 V Logic Low VIL 0.3 VDDx1 V Output Voltages Logic High VOH VDDx1 − 0.1 2.5 V IOx = −20 µA, VIx = VIxH VDDx1 − 0.4 2.35 V IOx = −4 mA, VIx = VIxH Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.1 0.4 V IOx = 4 mA, VIx = VIxL Input Current per Channel II −1 +0.01 +1 µA 0 V ≤ VIx ≤ VDDx1 Input Switching Thresholds Positive Threshold Voltage VT+ 1.5 V Negative Going Threshold VT− 1.0 V Input Hysteresis ΔVT 0.5 V Undervoltage Lockout, VDD1 or VDD2 UVLO 1.5 V Supply Current per Channel Quiescent Current Input Supply IDDI (Q) 2.6 3.75 µA ENX low Output Supply IDDO (Q) 0.5 3.75 µA ENX low Input (Refresh Off ) IDDI (Q) 0.05 µA ENX high Output (Refresh Off ) IDDO (Q) 0.05 µA ENX high Dynamic Supply Current Input IDDI (D) 76 µA/Mbps Output IDDO (D) 41 µA/Mbps AC SPECIFICATIONS Output Rise Time/Fall Time tR/tF 2 ns 10% to 90% Common-Mode Transient Immunity2 |CM| 25 40 kV/µs VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 14 kbps 1 VDDx = VDD1 or VDD2. 2 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V OUT > 0.8 VDDx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

ADuM1240/ADuM1241/ADuM1245/ADuM1246 Data Sheet Rev. B | Page 6 of 24 ELECTRICAL CHARACTERISTICS—VDD1 = 3.3 V, VDD2 = 2.5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 3.3 V , and VDD2 = 2.5 V . Minimum and maximum specifications apply over the entire Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. For dc specifications and ac specifications, see Table 3 for parameters related to Side 1 operation, and see Table 6 for parameters related to Side 2 operation. Table 7. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay Side 1 to Side 2 tPHL, tPLH 84 180 ns 50% input to 50% output Side 2 to Side 1 tPHL, tPLH 120 180 ns 50% input to 50% output Change vs. Temperature 280 ps/°C Pulse Width Distortion PWD 12 ns |tPLH − tPHL| Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 tPSK 10 ns Channel Matching Codirectional tPSKCD 10 ns Opposing Direction tPSKOD 60 ns 1 tPSK is the magnitude of the worst case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 8. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1240/ADuM1245 IDD1 366 500 µA IDD2 168 375 µA ADuM1241/ADuM1246 IDD1 306 400 µA IDD2 240 375 µA ELECTRICAL CHARACTERISTICS—VDD1 = 2.5 V, VDD2 = 3.3 V OPERATION All typical specifications are at TA = 25°C, VDD1 = 2.5 V , and VDD2 = 3.3 V . Minimum and maximum specifications apply over the entire Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. For dc specifications and ac specifications, see Table 6 for parameters related to Side 1 operation, and see Table 3 for parameters related to Side 2 operation. Table 9. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay Side 1 to Side 2 tPHL, tPLH 120 180 ns 50% input to 50% output Side 2 to Side 1 tPHL, tPLH 84 180 ns 50% input to 50% output Change vs. Temperature 200 ps/°C Pulse Width Distortion PWD 12 ns |tPLH − tPHL| Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 tPSK 10 ns Channel Matching Codirectional tPSKCD 10 ns Opposing Direction tPSKOD 60 ns 1 tPSK is the magnitude of the worst case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions.

Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B | Page 7 of 24 Table 10. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1240/ADuM1245 IDD1 306 500 µA IDD2 248 375 µA ADuM1241/ADuM1246 IDD1 240 375 µA IDD2 306 450 µA PACKAGE CHARACTERISTICS Table 11. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Resistance (Input to Output)1 RI-O 1013 Ω Capacitance (Input to Output)1 CI-O 2 pF f = 1 MHz Input Capacitance2 CI 4.0 pF IC Junction to Ambient Thermal Resistance θJA 85 °C/W Thermocouple located at center of package underside 1 The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. 2 Input capacitance is from any input data pin to ground. REGULATORY INFORMATION See Table 18 and the Absolute Maximum Ratings section for recommended maximum working voltages for specific cross isolation waveforms and insulation levels. Table 12. UL CSA VDE Recognized under 1577 component recognition program1 Approved under CSA Component Acceptance Notice 5A Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122 Single protection, 8-lead SOIC package,

3000 V rms isolation voltage

8-lead SOIC package, basic insulation per CSA 60950-1-03 and IEC 60950-1, 400 V rms (565 V peak) maximum working voltage 8-lead SOIC package, reinforced insulation, 560 VPEAK Single protection, 20-lead SSOP package,

3750 V rms isolation voltage

20-lead SSOP package, basic insulation per CSA 60950-1-03 and IEC 60950-1, 530 V rms (700 V peak) maximum working voltage 20-lead SSOP package, reinforced insulation, 849 VPEAK 20-lead SSOP package, reinforced insulation per CSA 60950-1-03 and IEC 60950-1, 265 V rms (374 V peak) maximum working voltage File E214100 File 205078 File 2471900-4880-0001 1 In accordance with UL1577, each ADuM1240/ADuM1241/ADuM1245/ADuM1246 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 second (current leakage detection limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM1240/ADuM1241/ADuM1245/ADuM1246 is proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval.

3000 V rms 1 minute duration

3750 V rms 1 minute duration

protective circuits. The asterisk (*) marked on packages denotes DIN V VDE V 0884-10 approval. Table 14. 8-Lead SOIC (R-8)

1050 VPEAK

840 VPEAK

672 VPEAK

Table 15. 20-Lead SSOP (RS-20)

1592 VPEAK

1273 VPEAK

1018 VPEAK

6000 VPEAK

Figure 4. Thermal Derating Curve, Dependent on Safety Limiting Values with

1 See the DC Correctness and Low Power Operation section for more

TA = 25°C, unless otherwise noted. 1 See Figure 4 for maximum rated current values for various temperatures. latch-up or permanent damage. Table 18. Maximum Continuous Working Voltage1

1 Refers to continuous voltage magnitude imposed across the isolation

barrier. See the Insulation Lifetime section for more details.

Table 21. Truth Table Abbreviations Table 22. ADuM1240/ADuM1241 Truth Table (Positive Logic)1, 2, 3 H Powered Powered L H Normal operation; data is high and refresh is enabled. L Powered Powered L L Normal operation; data is low and refresh is enabled. descriptions (Table 19 and Table 20) for details.  Powered Powered H H Output is high after propagation delay, refresh is disabled.  Powered Powered H L Output is low after propagation delay, refresh is disabled. pin function descriptions (Table 19 and Table 20) for details. 1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). 2 VDDI refers to the power supply on the input side of a given channel (A, B, C, or D). 3 VDDO refers to the power supply on the output side of a given channel (A, B, C, or D). Table 23. ADuM1245/ADuM1246 Truth Table (Positive Logic)1, 2, 3 H Powered Powered L H Normal operation; data is high and refresh is enabled. L Powered Powered L L Normal operation; data is low and refresh is enabled. the pin function descriptions (Table 19 and Table 20) for details. descriptions (Table 19 and Table 20) for details.  Powered Powered H H Output is high, refresh is disabled.  Powered Powered H L Output is low, refresh is disabled. X Powered Unpowered X Z Output unpowered. Output pins are in high impedance state. See the pin function descriptions (Table 19 and Table 20) for details. 1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). 2 VDDI refers to the power supply on the input side of a given channel (A, B, C, or D). 3 VDDO refers to the power supply on the output side of a given channel (A, B, C, or D).

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 35. 8-Lead Standard Small Outline Package [SOIC_N]

0.05 MIN

0.65 BSC

2.00 MAX

Figure 36. 20-Lead Shrink Small Outline Package [SSOP]

Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B | Page 21 of 24 ORDERING GUIDE Model1, 2 No. of Inputs, VDD1 Side No. of Inputs, VDD2 Side Maximum Data Rate (Mbps) Maximum Propagation Delay, 3.3 V Output Default State Temperature Range Package

Description

ADuM1240ARZ 2 0 2 180 High −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1240ARZ-RL7 2 0 2 180 High −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1240ARSZ 2 0 2 180 High −40°C to +125°C 20-Lead SSOP RS-20 ADuM1240ARSZ-RL7 2 0 2 180 High −40°C to +125°C 20-Lead SSOP RS-20 ADuM1241ARZ 1 1 2 180 High −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1241ARZ-RL7 1 1 2 180 High −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1241ARSZ 1 1 2 180 High −40°C to +125°C 20-Lead SSOP RS-20 ADuM1241ARSZ-RL7 1 1 2 180 High −40°C to +125°C 20-Lead SSOP RS-20 ADuM1245ARZ 2 0 2 180 Low −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1245ARZ-RL7 2 0 2 180 Low −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1245ARSZ 2 0 2 180 Low −40°C to +125°C 20-Lead SSOP RS-20 ADuM1245ARSZ-RL7 2 0 2 180 Low −40°C to +125°C 20-Lead SSOP RS-20 ADuM1246ARZ 1 1 2 180 Low −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1246ARZ-RL7 1 1 2 180 Low −40°C to +125°C 8-Lead SOIC_N R-8 ADuM1246ARSZ 1 1 2 180 Low −40°C to +125°C 20-Lead SSOP RS-20 ADuM1246ARSZ-RL7 1 1 2 180 Low −40°C to +125°C 20-Lead SSOP RS-20 1 Z = RoHS Compliant Part. 2 Tape and reel is available. The addition of the -RL7 suffix indicates that the product is shipped on 7” tape and reel.

ADuM1240/ADuM1241/ADuM1245/ADuM1246 Data Sheet Rev. B | Page 22 of 24 NOTES

Data Sheet ADuM1240/ADuM1241/ADuM1245/ADuM1246 Rev. B | Page 23 of 24 NOTES

ADuM1240/ADuM1241/ADuM1245/ADuM1246 Data Sheet Rev. B | Page 24 of 24 NOTES ©2013–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11925-0-9/16(B)