ADT7460 AD | Alldatasheet

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REV. 0 a Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 ADT7460* dBCOOL™ Remote Thermal Controller and Fan Controller

FEATURES

Controls and Monitors up to 4 Fan Speeds

1 On-Chip and 2 Remote Temperature Sensors

MIN Control Mode Optimizes System Acoustics Intelligently Automatic Fan Speed Control Mode Controls System Cooling Based on Measured Temperature Enhanced Acoustic Mode Dramatically Reduces User Perception of Changing Fan Speeds Thermal Protection Feature via THERM Output Monitors Performance Impact of Intel ® Pentium® 4 Processor Thermal Control Circuit via THERM Input 2-Wire and 3-Wire Fan Speed Measurement Limit Comparison of All Monitored Values Meets SMBus 2.0 Electrical Specifications (Fully SMBus 1.1 Compliant)

APPLICATIONS

Networking and Telecommunications Equipment FUNCTIONAL BLOCK DIAGRAM BAND GAP REFERENCE 10-BIT ADC INPUT SIGNAL CONDITIONING AND ANALOG MULTIPLEXER GND SERIAL BUS INTERFACE SCL SDA ADDRESS POINTER REGISTER ADT7460 VALUE AND LIMIT REGISTERS LIMIT COMPARATORS PWM CONFIGURATION REGISTERS INTERRUPT STATUS REGISTERS BAND GAP TEMP. SENSOR VCC TO ADT7460 INTERRUPT MASKING SMBALERT VCC D1+ D1– D2+ D2– +2.5VIN SMBUS ADDRESS SELECTION ADDR EN ADDR SELECT THERMAL PROTECTION PERFORMANCE MONITORING THERM PWM REGISTERS AND CONTROLLERS PWM1 PWM2 PWM3 ACOUSTIC ENHANCEMENT CONTROL AUTOMATIC FAN SPEED CONTROL DYNAMIC TMIN CONTROL FAN SPEED COUNTER TACH1 TACH2 TACH3 TACH4 GENERAL DESCRIPTION The ADT7460 dBCOOL controller is a thermal monitor and multiple PWM fan controller for noise-sensitive applications requiring active system cooling. It can monitor the temperature of up to two remote sensor diodes, plus its own internal tem- perature. It can measure and control the speed of up to four fans so that they operate at the lowest possible speed for mini- mum acoustic noise. The Automatic Fan Speed Control Loop optimizes fan speed for a given temperature. A unique Dynamic T MIN Control Mode enables the system thermals/acoustics to be intelligently managed. The effectiveness of the system’s thermal solution can be monitored using the THERM input. The ADT7460 also provides critical Thermal Protection to the system using the bidirectional THERM pin as an output to prevent system or component overheating. dBCOOL is a trademark of Analog Devices, Inc. Intel and Pentium are registered trademarks of Intel Corp.

REV. 0–2– ADT7460–SPECIFICATIONS1, 2, 3, 4 Parameter Min Typ Max Unit Test Conditions/Comments POWER SUPPLY Supply Voltage 3.0 5.0 5.5 V Supply Current, ICC 3m A Interface Inactive, ADC Active 20 µA Standby Mode TEMPERATURE-TO-DIGITAL CONVERTER Local Sensor Accuracy ±1.5 /H11034C0 /H11034C /H11349 TA /H11349 70/H11034C ± 3 /H11034C –40/H11034C /H11349 TA /H11349 +120/H11034C Resolution 0.25 /H11034C Remote Diode Sensor Accuracy ±1.5 /H11034C 0/H11034C /H11349 TA /H11349 70/H11034C; 0/H11034C /H11349 TD /H11349 120/H11034C ±2.5 /H11034C 0/H11034C /H11349 TA /H11349 105/H11034C; 0/H11034C /H11349 TD /H11349 120/H11034C ± 3 /H11034C 0/H11034C /H11349 TA /H11349 120/H11034C; 0/H11034C /H11349 TD /H11349 120/H11034C Resolution 0.25 /H11034C Remote Sensor Source Current 180 µAH igh Level 11 µAL ow Level ANALOG-TO-DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS) Total Unadjusted Error, TUE ± 1.5 % Differential Nonlinearity, DNL ± 1 LSB 8 Bits Power Supply Sensitivity ± 0.1 %/V Conversion Time (Voltage Input) 11.38 13 ms Averaging Enabled Conversion Time (Local Temperature) 12.09 13.5 ms Averaging Enabled Conversion Time (Remote Temperature) 25.59 28 ms Averaging Enabled Total Monitoring Cycle Time 120.17 134.5 ms Averaging Enabled (incl. delay Total Monitoring Cycle Time 13.51 15 ms Averaging Disabled Input Resistance 80 140 200 k Ω FAN RPM-TO-DIGITAL CONVERTER Accuracy ± 7%0 /H11034C /H11349 TA /H11349 70/H11034C ±11 % 0 /H11034C /H11349 TA /H11349 105/H11034C ±13 % –40 /H11034C /H11349 TA /H11349 +120/H11034C Full-Scale Count 65,535 Nominal Input RPM 109 RPM Fan Count = 0xBFFF

329 RPM Fan Count = 0x3FFF

5000 RPM Fan Count = 0x0438

10000 RPM Fan Count = 0x021C

Internal Clock Frequency 82.8 90 97.2 kHz OPEN-DRAIN DIGITAL OUTPUTS, PWM1–PWM3, XTO Current Sink, IOL 8.0 mA Output Low Voltage, V OL 0.4 V I OUT = –8.0 mA, VCC = 3.3 V High Level Output Current, I OH 0.1 1 µAV OUT = VCC OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA) Output Low Voltage, V OL 0.4 V I OUT = –4.0 mA, VCC = 3.3 V High Level Output Current, I OH 0.1 1 µAV OUT = VCC SMBUS DIGITAL INPUTS (SCL, SDA) Input High Voltage, V IH 2.0 V Input Low Voltage, V IL 0.4 V Hysteresis 500 mV DIGITAL INPUT LOGIC LEVELS (TACH INPUTS) Input High Voltage, V IH 2.0 V

5.5 V Maximum Input Voltage

Input Low Voltage, V IL +0.8 V –0.3 V Minimum Input Voltage Hysteresis 0.5 V p-p (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.)

1All voltages are measured with respect to GND, unless otherwise specified. 2Typicals are at T A = 25°C and represent the most likely parametric norm. 3Logic inputs will accept input high voltages up to V MAX even when the device is operating down to V MIN. 4Timing specifications are tested at logic levels of V IL = 0.8 V for a falling edge and V IH = 2.0 V for a rising edge. 5The delay is the time between the round robin finishing one set of measurements and starting the next. Specifications subject to change without notice. Figure 1. Diagram for Serial Bus Timing

REV. 0–4– ADT7460 ABSOLUTE MAXIMUM RATINGS * Lead Temperature, Soldering *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS 16-Lead QSOP Package: θJA = 150°C/W, θJC = 39°C/W ORDERING GUIDE Temperature Package Package Model Range Description Option ADT7460ARQ –40/H11034C to 120/H11034C 16-Lead QSOP RQ-16 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADT7460 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. 0 ADT7460 –5– PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description 1 SCL Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pull-up. 2 GND Ground Pin for the ADT7460. 3V CC Power Supply. Can be powered by 3.3 V standby if monitoring in low power states is required. V CC is also monitored through this pin. The ADT7460 can also be powered from a 5 V supply. Setting Bit 7 of Configuration Register 1 (Reg. 0x40) rescales the V CC input attenuators to correctly measure a 5 V supply. 4 TACH3 Digital Input (Open Drain). Fan tachometer input to measure speed of FAN 3. Can be reconfigured as an analog input (AIN3) to measure the speed of 2-wire fans. 5 PWM2 Digital Output ( Open Drain). Requires 10 kΩ typical pull-up. Pulsewidth modulated output to control FAN 2 speed. SMBALERT Digital Output (Open Drain). This pin may be reconfigured as an SMBALERT interrupt output to signal out-of-limit conditions. 6 TACH1 Digital I nput (Open Drain). Fan tachometer input to measure speed of FAN 1. Can be reconfigured as an analog input (AIN1) to measure the speed of 2-wire fans. 7 TACH2 Digital I nput (Open Drain). Fan tachometer input to measure speed of FAN 2. Can be reconfigured as an analog input (AIN2) to measure the speed of 2-wire fans. 8 PWM3 Digital I/O ( Open Drain). Pulsewidth modulated output to control FAN 3/4 speed. Requires 10 kΩ typical pull-up. ADDRESS If pulled low on power-up, this places the ADT7460 into Address Select mode, and the state of Pin 9 will ENABLE determine the ADT7460’s slave address. 9 TACH4 Digital I nput (Open Drain). Fan tachometer input to measure speed of FAN 4. Can be reconfigured as an analog input (AIN4) to measure the speed of 2-wire fans. ADDRESS If in Address Select mode, this pin determines the SMBus device address. SELECT THERM Alternatively, the pin may be reconfigured as a bidirectional THERM pin. Can be used to time and monitor assertions on the THERM input. For example, can be connected to the PROCHOT output of Intel’s Pentium 4 processor or to the output of a trip point temperature sensor. Can be used as an output to signal overtemperature conditions.

10 D2– Cathode Connection to Second Thermal Diode

11 D2+ Anode Connection to Second Thermal Diode

12 D1– Cathode Connection to First Thermal Diode

13 D1+ Anode Connection to First Thermal Diode

14 +2.5V IN Analog Input. Monitors +2.5 V supply, typically a chipset voltage. SMBALERT Digital Output (Open Drain). This pin may be reconfigured as an SMBALERT interrupt output to signal out-of-limit conditions. 15 PWM1/XTO Digital Output (Open Drain). Pulsewidth modulated output to control FAN 1 speed. Requires 10 kΩ typical pull-up. 16 SDA Digital I/O (Open Drain). SMBus bidirectional serial data. Requires SMBus pull up. PIN CONFIGURATION TOP VIEW (Not to Scale) ADT7460 TACH2 TACH1 PWM2/SMBALERT TACH3 SDASCL GND VCC PWM3/ADDRESS ENABLE TACH4/ADDRESS SELECT/THERM D2– D2+ D1– PWM1/XTO 2.5V/SMBALERT D1+

REV. 0–6– ADT7460 FUNCTIONAL DESCRIPTION General Description The ADT7460 is a thermal monitor and multiple fan controller for any system requiring monitoring and cooling. The device communicates with the system via a serial System Management Bus. The serial bus controller has an optional address line for device selection (Pin 9), a serial data line for reading and writing addresses and data (Pin 16), and an input line for the serial clock (Pin 1). All control and programming functions of the ADT7460 are performed over the serial bus. In addition, two of the pins can be reconfigured as an SMBALERT output to indicate out-of-limit conditions. Measurement Inputs The device has three measurement inputs, one for voltage and two for temperature. It can also measure its own supply voltage and can measure ambient temperature with its on-chip tem- perature sensor. Pin 14 is an analog input with an on-chip attenuator and is configured to monitor 2.5 V. Power is supplied to the chip via Pin 3, and the system also monitors V CC through this pin. In PCs, this pin is normally connected to a 3.3 V standby supply. This pin can, however, be connected to a 5 V supply and monitor it without overranging. Remote temperature sensing is provided by the D1 /H11006 and D2/H11006 inputs, to which diode-connected, external temperature-sensing transistors such as a 2N3904 or CPU thermal diode may be connected. The ADC also accepts input from an on-chip band gap tem- perature sensor that monitors system ambient temperature. Sequential Measurement When the ADT7460 monitoring sequence is started, it cycles sequentially through the measurement of 2.5 V input and the temperature sensors. Measured values from these inputs are stored in Value registers. These can be read out over the serial bus, or can be compared with programmed limits stored in the Limit registers. The results of out-of-limit comparisons are stored in the Status registers, which can be read over the serial bus to flag out-of-limit conditions. ADT7460 Address Selection Pin 8 is the dual function PWM3/ ADDRESS ENABLE pin. If Pin 8 is pulled low on power-up, the ADT7460 will read the state of Pin 9 (TACH4/ADDRESS SELECT/THERM pin) to determine the ADT7460’s slave address. If Pin 8 is high on power-up, then the ADT7460 will default to SMBus slave address 0x2E. This function is described in more detail later. INTERNAL REGISTERS OF THE ADT7460 A brief description of the ADT7460’s principal internal regis- ters is given below. More detailed information on the function of each register is given in Tables IV to XLI. Configuration Registers The Configuration registers provide control and configuration of the ADT7460, including alternate pinout functionality. Address Pointer Register This register contains the address that selects one of the other internal registers. When writing to the ADT7460, the first byte of data is always a register address, which is written to the Address Pointer Register. Status Registers These registers provide the status of each limit comparison and are used to signal out-of-limit conditions on the temperature, voltage, or fan speed channels. If Pin 14 is configured as SMBALERT, then this pin will assert low whenever an unmasked status bit gets set. Interrupt Mask Registers These registers allow each interrupt status event to be masked when Pin 14 is configured as an SMBALERT output. Value and Limit Registers The results of analog voltage input, temperature, and fan speed measurements are stored in these registers, along with their limit values. Offset Registers These registers allow each temperature channel reading to be offset by a twos complement value written to these registers. TMIN Registers These registers program the starting temperature for each fan under Automatic Fan Speed Control. TRANGE Registers These registers program the temperature-to-fan speed control slope in Automatic Fan Speed Control mode for each PWM output. Operating Point Registers These registers define the target operating temperatures for each thermal zone when running under dynamic T MIN control. This function allows the cooling solution to adjust dynamically in response to measured temperature and system performance. Enhance Acoustics Registers These registers allow each PWM output controlling fan to be tweaked to enhance the system’s acoustics.

REV. 0 Typical Performance Characteristics–ADT7460 –7– LEAKAGE RESIST ANCE – M/H9024 REMOTE TEMPERA TURE ERROR – /H11543C –20 1 3.3 100 10 30 –10 –15 DXP TO GND DXP TO VCC (3.3V) TPC 1. Temperature Error vs. Leakage Resistance TEMPERA TURE – C TEMPERA TURE ERROR – C –40 10 110 60 LOW LIMIT HIGH LIMIT –3 SIGMA +3 SIGMA TPC 4. Local Temperature Error vs. Actual Temperature 1.9 1.8 1.8 1.7 1.7 1.6 1.6 1.5 1.5 1.4 1.4 2.5 5.5 SUPPL Y VOL T AGE – V SUPPL Y CURRENT – mA TPC 7. Supply Current vs. Supply Voltage DXP–DXN CAP ACIT ANCE – nF REMOTE TEMPERA TURE ERROR – /H11543C –12 –15 –18 –21 –24 –27 2.2 3.3 4.7 10 22 47 –30 –33 –36 REMOTE TEMPERA TURE ERROR (/H11543C) TPC 2. Temperature Error vs. Capacitance between D+ and D– FREQUENCY – Hz REMOTE TEMPERA TURE – /H11543C –2.0 100k 550k 50M 5M 100mV 250mV TPC 5. Remote Temperature Error vs. Power Supply Noise Frequency FREQUENCY – Hz REMOTE TEMPERA TURE ERROR – /H11543C 60k –2.0 110k 1M 10M 50M 10mV 20mV TPC 8. Remote Temperature Error vs. Differential Mode Noise Frequency TEMPERA TURE – C TEMPERA TURE ERROR – C –40 10 60 110 –3 SIGMA +3 SIGMA LOW LIMIT HIGH LIMIT TPC 3. Remote Temperature Error vs. Actual Temperature FREQUENCY – Hz LOCAL TEMPERA TURE ERROR – /H11543C 12.5 10.0 –5.0 100k 550k 50M 5M 5.0 2.5 –2.5 7.5 100mV 250mV TPC 6. Local Temperature Error vs. Power Supply Noise Frequency FREQUENCY – Hz REMOTE TEMPERA TURE ERROR – /H11543C 10k –10 100k 1M 10M 20mV 40mV 100mV TPC 9. Remote Temperature Error vs. Common-Mode Noise Frequency

Figure 2. Recommended Implementation

  • Two PWM outputs for fan control of up to three fans (the front and rear chassis fans are connected in parallel)
  • Three TACH fan speed measurement inputs
  • VCC measured internally through Pin 3
  • CPU temperature measured using Remote 1 temperature channel
  • Ambient temperature measured through Remote 2 tempera- ture channel
  • Bidirectional THERM Pin. Allows Intel P4 PROCHOT Monitoring and can function as an overtemperature THERM output.
  • SMBALERT system interrupt output

The ADT7460 has one external voltage measurement channel. It can also measure its own supply voltage, V CC. has adequate headroom to deal with overvoltages. Figure 13. The input circuit consists of an input protection diode, filter that gives the input immunity to high frequency noise.

2.5 V LIMIT REGISTERS

limit can also generate SMBALERT interrupts. Figure 13. Structure of Analog Inputs measurement takes nominally 11.38 ms.

REV. 0 ADT7460 –13– Table II. 10-Bit A/D Output Code vs. V IN Input Voltage A/D Output +5VIN VCC (3.3VIN)* +2.5VIN Decimal Binary (10 Bits) <0.0065 <0.0042 <0.0032 0 00000000 00 >6.6634 >4.3957 >3.3267 1023 11111111 11 *The VCC output codes listed assume that V CC is 3.3 V. If V CC input is reconfigured for 5 V operation (by setting Bit 7 of Configuration Register 1), then the V CC output codes are the same as for the 5 V IN column.

either limit can also generate SMBALERT interrupts. being updated while its two LSBs are being read, and vice versa. and the local temperature measurement takes 1.4 ms. to Bits <7:5> of TACH1 Minimum High Byte Register (0x55).

101 Remote 1 Temp

110 Local Temp

111 Remote 2 Temp

0x6E (Hysteresis registers). The default hysteresis value is 4 °C. Figure 16. THERM Limit Operation

microcontroller of out-of-limit conditions. sured, exceeding the limit indicates a slow or stalled fan. Figure 17. Temperature > Low Limit: No INT

REV. 0–26– ADT7460 Fan TACH Limit Registers The Fan TACH Limit Registers are 16-bit values consisting of two bytes. Reg. 0x54 TACH1 Minimum Low Byte = 0xFF default Reg. 0x55 TACH1 Minimum High Byte = 0xFF default Reg. 0x56 TACH2 Minimum Low Byte = 0xFF default Reg. 0x57 TACH2 Minimum High Byte = 0xFF default Reg. 0x58 TACH3 Minimum Low Byte = 0xFF default Reg. 0x59 TACH3 Minimum High Byte = 0xFF default Reg. 0x5A TACH4 Minimum Low Byte = 0xFF default Reg. 0x5B TACH4 Minimum High Byte = 0xFF default Fan Speed Measurement Rate The Fan TACH readings are normally updated once every second. The FAST bit (Bit 3) of Configuration Register 3 (Reg. 0x78), when set, updates the Fan TACH readings every 250 ms. If any of the fans are not being driven by a PWM channel but are powered directly from 5 V or 12 V, its associated dc bit in Configuration Register 3 should be set. This allows TACH readings to be taken on a continuous basis for fans connected directly to a dc source. Calculating Fan Speed Assuming a fan with a two pulses/revolution (and two pulses/rev being measured) fan speed is calculated by: Fan Speed (RPM) = (90,000 /H11547 60)/Fan Tach Reading where: Fan Tach Reading = 16-bit Fan Tachometer Reading Example: TACH1 High Byte (Reg 0x29) = 0x17 TACH1 Low Byte (Reg 0x28) = 0xFF What is Fan 1 speed in RPM? Fan 1 TACH reading = 0x17FF = 6143 decimal RPM = (f /H11003 60)/Fan 1 TACH reading RPM = (90000 /H11003 60)/6143 Fan Speed = 879 RPM Fan Pulses Per Revolution Different fan models can output either 1, 2, 3, or 4 TACH pulses per revolution. Once the number of fan TACH pulses has been determined, it can be programmed into the Fan Pulses Per Revolution Register (Reg. 0x7B) for each fan. Alternatively, this register can be used to determine the number or pulses/revolution output by a given fan. By plotting fan speed measurements at 100% speed with different pulses/rev setting, the smoothest graph with the lowest ripple determines the correct pulses/rev value. Fan Pulses Per Revolution Register <1:0> FAN1 default = 2 pulses per rev. <3:2> FAN2 default = 2 pulses per rev. <5:4> FAN3 default = 2 pulses per rev. <7:6> FAN4 default = 2 pulses per rev. 00 = 1 pulse per rev. 01 = 2 pulses per rev. 10 = 3 pulses per rev. 11 = 4 pulses per rev. 2-Wire Fan Speed Measurements The ADT7460 is capable of measuring the speed of 2-wire fans, i.e., fans without TACH outputs. To do this, the fan must be interfaced as shown in the Fan Drive Circuitry section of the data sheet. In this case, the TACH inputs need to be repro- grammed as analog inputs, AIN. CONFIGURATION REGISTER 2 (REG. 0x73) Bit 3 (AIN4) = 1, Pin 9 is reconfigured to measure the speed of a 2-wire fan using an external sensing resistor and coupling capacitor. Bit 2 (AIN3) = 1, Pin 4 is reconfigured to measure the speed of a 2-wire fan using an external sensing resistor and coupling capacitor. Bit 1 (AIN2) = 1, Pin 7 is reconfigured to measure the speed of a 2-wire fan using an external sensing resistor and coupling capacitor. Bit 0 (AIN1) = 1, Pin 6 is reconfigured to measure the speed of a 2-wire fan using an external sensing resistor and coupling capacitor. AIN Switching Threshold Having configured the TACH inputs as AIN inputs for 2-wire measurements, you can select the sensing threshold for the AIN signal. CONFIGURATION REGISTER 4 (REG. 0x7D) <3:2> AINL These two bits define the input threshold for 2-wire fan speed measurements. 00 = /H1155020 mV 01 = /H1155040 mV 10 = /H1155080 mV 11 = /H11550130 mV Fan Spin-Up The ADT7460 has a unique fan spin-up function. It will spin the fan at 100% PWM duty cycle until two TACH pulses are detected on the TACH input. Once two pulses have been detected, the PWM duty cycle will go to the expected running value, e.g., 33%. The advantage of this is that fans have dif- ferent spin-up characteristics and will take different times to overcome inertia. The ADT7460 just runs the fans fast enough to overcome inertia and will be quieter on spin-up than fans programmed to spin-up for a given spin-up time. Fan Start-Up Timeout To prevent false interrupts being generated as a fan spins up (since it is below running speed), the ADT7460 includes a Fan Start-Up Timeout function. This is the time limit allowed for two TACH pulses to be detected on spin-up. For example, if 2 seconds Fan Start-Up Timeout is chosen and no TACH pulses occur within 2 seconds of the start of spin-up, a fan fault is detected and flagged in the Interrupt Status Registers.

REV. 0 ADT7460 –27– PWM1 CONFIGURATION (REG. 0x5C) <2:0> SPIN These bits control the Start-Up timeout for PWM1. 000 = No startup timeout 001 = 100 ms 010 = 250 ms (default) 011 = 400 ms 100 = 667 ms 101 = 1 s 110 = 2 s 111 = 4 s PWM2 CONFIGURATION (REG. 0x5D) <2:0> SPIN These bits control the Start-Up timeout for PWM2. 000 = No startup timeout 001 = 100 ms 010 = 250 ms (default) 011 = 400 ms 100 = 667 ms 101 = 1 s 110 = 2 s 111 = 4 s PWM3 CONFIGURATION (REG. 0x5E) <2:0> SPIN These bits control the Start-Up timeout for PWM3. 000 = No startup timeout 001 = 100 ms 010 = 250 ms (default) 011 = 400 ms 100 = 667 ms 101 = 1 s 110 = 2 s 111 = 4 s Disabling Fan Start-Up Timeout Although Fan Start-Up makes fan spin-ups much quieter than fixed-time spin-ups, the option exists to use fixed spin-up times. Bit 5 (FSPDIS) = 1 in Configuration Register 1 (Reg. 0x40) disables the spin-up for two TACH pulses. Instead, the fan will spin up for the fixed time as selected in Registers 0x5C–0x5E. PWM Logic State The PWM outputs can be programmed high for 100% duty cycle (noninverted) or low for 100% duty cycle (inverted). PWM1 Configuration (Reg. 0x5C) <4> INV 0 = logic high for 100% PWM duty cycle 1 = logic low for 100% PWM duty cycle PWM2 Configuration (Reg. 0x5D) <4> INV 0 = logic high for 100% PWM duty cycle 1 = logic low for 100% PWM duty cycle PWM3 Configuration (Reg. 0x5E) <4> INV 0 = logic high for 100% PWM duty cycle 1 = logic low for 100% PWM duty cycle PWM Drive Frequency The PWM drive frequency can be adjusted for the applica- tion. R egisters 0x5F–0x61 configure the PWM frequency for PWM1–PWM3, respectively. PWM1 FREQUENCY REGISTERS (REG. 0x5F–0x61) <2:0> FREQ 000 = 11.0 Hz 001 = 14.7 Hz 010 = 22.1 Hz 011 = 29.4 Hz 100 = 35.3 Hz (default) 101 = 44.1 Hz 110 = 58.8 Hz 111 = 88.2 Hz Fan Speed Control The ADT7460 can control fan speed using two different modes. The first is Automatic Fan Speed Control Mode. In this mode fan speed is automatically varied with temperature and without CPU intervention, once initial parameters are set up. The advantage of this is in the case of the system hanging, the user is guaranteed that the system is protected from overheating. The Automatic Fan Speed Control incorporates a feature called Dynamic T_min calibration. This feature reduces the design effort required to program the Automatic Fan Speed Control Loop. For more information and how to program the Automatic Fan Speed Control Loop and Dynamic T_min calibration; see the Automatic Fan Speed Control Loop application note. The second fan speed control method is Manual Fan Speed Control which is described in the next paragraph. Manual Fan Speed Control The ADT7460 allows the Duty Cycle of any PWM output to be manually adjusted. This can be useful if you wish to change fan speed in software or want to adjust PWM duty cycle output for test purposes. Bits <7:5> of Registers 0x5C–0x5E (PWM Con- figuration) control the behavior of each PWM output. PWM CONFIGURATION (REG. 0x5C–0x5E) <7:5> BHVR 111 = Manual Mode Once under Manual Control, each PWM output may be manually updated by writing to registers 0x30–0x32 (PWMx Current Duty Cycle Registers). Programming the PWM Current Duty Cycle Registers The PWM Current Duty Cycle Registers are 8-bit registers that allow the PWM duty cycle for each output to be set anywhere from 0% (0x00) to 100% (0xFF) in steps of 0.39% (256 steps). The value to be programmed into the PWM MIN register is given by: Value decimal PWM MIN() / . = 03 9 Example 1: For a PWM duty cycle of 50%, Value (decimal) = 50/0.39 = 128 decimal Value = 128 decimal or 0x80. Example 2: For a PWM duty cycle of 33%, Value (decimal) = 33/0.39 = 85 decimal Value = 85 decimal or 0x54.

REV. 0 ADT7460 –29– Table IV. ADT7460 Registers Address R/W Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Lockable? 0x20 R 2.5 V Reading 9 8 7 6 5 4 3 2 0x00 0x22 R V CC Reading 9 8 7 6 5 43 2 0x00 0x25 R Remote 1 Temperature 9 8 7 6 5 43 2 0x80 0x26 R Local Temperature 9 8 7 6 5 43 2 0x80 0x27 R Remote 2 Temperature 9 8 7 6 5 43 2 0x80 0x28 R TACH1 Low Byte 7 6 54 32 10 0x00 0x29 R TACH1 High Byte 15 14 13 12 11 10 9 8 0x00 0x2A R TACH2 Low Byte 7 6 5 4 3 2 1 0 0x00 0x2B R TACH2 High Byte 15 14 13 12 11 10 9 8 0x00 0x2C R TACH3 Low Byte 7 6 5 4 3 2 1 0 0x00 0x2D R TACH3 High Byte 15 14 13 12 11 10 9 8 0x00 0x2E R TACH4 Low Byte 7 6 5 4 3 2 1 0 0x00 0x2F R TACH4 High Byte 15 14 13 12 11 10 9 8 0x00 0x30 R/W PWM1 Current Duty Cycle 7 6 5 4 3 2 1 0 0xFF 0x31 R/W PWM2 Current Duty Cycle 7 6 5 4 3 2 1 0 0xFF 0x32 R/W PWM3 Current Duty Cycle 7 6 5 4 3 2 1 0 0xFF 0x33 R/W Remote 1 Operating Point 7 6 5 4 3 2 1 0 0x64 YES 0x34 R/W Local Temp Operating Point 7 6 5 4 3 2 1 0 0x64 YES 0x35 R/W Remote 2 Operating Point 7 6 5 4 3 2 1 0 0x64 YES 0x36 R/W Dynamic T MIN Control Reg 1 R2T LT R1T PHTR2 PHTL PHTR1 V CCPLO CYR2 0x00 YES 0x37 R/W Dynamic T MIN Control Reg 2 CYR2 CYR2 CYL CYL CYL CYR1 CYR1 CYR1 0x00 YES 0x3D R Device ID Register 7 6 5 4 3 2 1 0 0x27 0x3E R Company ID Number 7 6 5 4 3 2 1 0 0x41 0x3F R Revision Number VER VER VER VER STP STP STP STP 0x62 0x40 R/W Configuration Register 1 V CC TODIS FSPDIS V /H11003 I FSPD RDY LOCK STRT 0x00 YES 0x41 R Interrupt Status Register 1 OOL R2T LT R1T 3 V CC 1 2.5V 0x00 0x42 R Interrupt Status Register 2 D2 D1 5 FAN3 FAN2 FAN1 OVT 0 0x00 0x43 R/W VID Register VIDSEL THLD 5 VID4 VID3 VID2 VID1 VID0 0xFF 0x44 R/W 2.5 V Low Limit 7 6 5 4 3 2 1 0 0x00 0x45 R/W 2.5 V High Limit 7 6 5 4 3 2 1 0 0xFF 0x48 R/W V CC Low Limit 7 6 5 4 32 10 0x00 0x49 R/W V CC High Limit 7 6 5 4 3 2 1 0 0xFF 0x4E R/W Remote 1 Temp Low Limit 76 54 32 10 0x81 0x4F R/W Remote 1 Temp High Limit 7 6 5 4 3 2 1 0 0x7F 0x50 R/W Local Temp Low Limit 7 6 5 4 3 2 1 0 0x81 0x51 R/W Local Temp High Limit 7 6 5 4 3 2 1 0 0x7F 0x52 R/W Remote 2 Temp Low Limit 7 6 5 4 3 2 1 0 0x81 0x53 R/W Remote 2 Temp High Limit 7 6 5 4 3 2 1 0 0x7F 0x54 R/W TACH1 Minimum Low Byte 7 6 5 4 3 2 1 0 0xFF 0x55 R/W TACH1 Minimum High Byte 15 14 13 12 11 10 9 8 0xFF 0x56 R/W TACH2 Minimum Low Byte 7 6 5 4 3 2 1 0 0xFF 0x57 R/W TACH2 Minimum High Byte 15 14 13 12 11 10 9 8 0xFF 0x58 R/W TACH3 Minimum Low Byte 7 6 5 4 3 2 1 0 0xFF 0x59 R/W TACH3 Minimum High Byte 15 14 13 12 11 10 9 8 0xFF 0x5A R/W TACH4 Minimum Low Byte 7 6 5 4 3 2 1 0 0xFF 0x5B R/W TACH4 Minimum High Byte 15 14 13 12 11 10 9 8 0xFF

REV. 0–30– ADT7460 Table IV. ADT7460 Registers (continued) Address R/W Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Lockable? 0x5C R/W PWM1 Configuration Register BHVR BHVR BHVR INV SLOW SPIN SPIN SPIN 0x62 YES 0x5D R/W PWM2 Configuration Register BHVR BHVR BHVR INV SLOW SPIN SPIN SPIN 0x62 YES 0x5E R/W PWM3 Configuration Register BHVR BHVR BHVR INV SLOW SPIN SPIN SPIN 0x62 YES 0x5F R/W Remote 1 T RANGE/PWM 1 Freq RANGE RANGE RANGE RANGE THRM FREQ FREQ FREQ 0xC4 YES 0x60 R/W Local T RANGE/PWM 2 Freq RANGE RANGE RANGE RANGE THRM FREQ FREQ FREQ 0xC4 YES 0x61 R/W Remote 2 T RANGE/PWM 3 Freq RANGE RANGE RANGE RANGE THRM FREQ FREQ FREQ 0xC4 YES 0x62 R/W Enhance Acoustics Reg 1 MIN3 MIN2 MIN1 SYNC EN1 ACOU ACOU ACOU 0x00 YES 0x63 R/W Enhance Acoustics Reg 2 EN2 ACOU2 ACOU2 ACOU2 EN3 ACOU3 ACOU3 ACOU3 0x00 YES 0x64 R/W PWM1 Min Duty Cycle 7 6 5 4 3 2 1 0 0x80 YES 0x65 R/W PWM2 Min Duty Cycle 7 6 5 4 3 2 1 0 0x80 YES 0x66 R/W PWM3 Min Duty Cycle 7 6 5 4 3 2 1 0 0x80 YES 0x67 R/W Remote 1 Temp T MIN 76 5 432 10 0x5A YES 0x68 R/W Local Temp T MIN 76 5 432 10 0x5A YES 0x69 R/W Remote 2 Temp T MIN 76 5 432 10 0x5A YES 0x6A R/W Remote 1 THERM Limit 7 6 5 4 3 2 1 0 0x64 YES 0x6B R/W Local THERM Limit 7 6 5 4 3 2 1 0 0x64 YES 0x6C R/W Remote 2 THERM Limit 7 6 5 4 3 2 1 0 0x64 YES 0x6D R/W Remote 1 Local Hysteresis HYSR1 HYSR1 HYSR1 HYSR1 HYSL HYSL HYSL HYSL 0x44 YES 0x6E R/W Remote 2 Temp Hysteresis HYSR2 HYSR2 HYSR2 HYSR2 RES RES RES RES 0x40 YES 0x6F R/W XOR Tree Test Enable RES RES RES RES RES RES RES XEN 0x00 YES 0x70 R/W Remote 1 Temperature Offset 7 6 5 4 3 2 1 0 0x00 YES 0x71 R/W Local Temperature Offset 7 6 5 4 3 2 1 0 0x00 YES 0x72 R/W Remote 2 Temperature Offset 7 6 5 4 3 2 1 0 0x00 YES 0x73 R/W Configuration Register 2 SHDN CONV ATTN AVG AIN4 AIN3 AIN2 AIN1 0x00 YES 0x74 R/W Interrupt Mask 1 Register OOL R2T LT R1T 3 V CC 1 2.5V 0x00 0x75 R/W Interrupt Mask 2 Register D2 D1 5 FAN3 FAN2 FAN1 OVT 0 0x00 0x76 R/W Extended Resolution 1 7 6 V CC VCC 32 2.5V 2.5V 0x00 0x77 R/W Extended Resolution 2 TDM2 TDM2 LTMP LTMP TDM1 TDM1 1 0 0x00 0x78 R/W Configuration Register 3 DC4 DC3 DC2 DC1 FAST BOOST PHOT ALERT 0x00 YES 0x7B R/W Fan Pulses per Revolution FAN4 FAN4 FAN3 FAN3 FAN2 FAN2 FAN1 FAN1 0x55 0x7D R/W Configuration Register 4 RES RES RES RES AINL AINL TH5V AL2.5V 0x00 YES 0x7E R Test Register 1 DO NOT WRITE TO THESE REGISTERS 0x00 YES 0x7F R Test Register 2 DO NOT WRITE TO THESE REGISTERS 0x00 YES

REV. 0 ADT7460 –31– Table V. Voltage Reading Registers (Power-On Default = 0x00) Register Address R/W Description 0x20 Read Only 2.5 V Reading (8 MSBs of reading) 0x22 Read Only V CC Reading: measures VCC through the VCC pin (8 MSBs of reading) These voltage readings are in twos complement format. If the extended resolution bits of these readings are also being read, the Extended Resolution registers (Reg. 0x76, 0x77) shou ld be read first. Once the Extended Resolution registers get read, the associated MSB reading registers get frozen until read. Both the Extended Resolution Registe rs and the MSB registers get frozen. Table VI. Temperature Reading Registers (Power-On Default = 0x80) Register Address R/W Description 0x25 Read Only Remote 1 Temperature Reading * (8 MSBs of reading) 0x26 Read Only Local Temperature Reading (8 MSBs of reading) 0x27 Read Only Remote 2 Temperature Reading * (8 MSBs of reading) These temperature readings are in twos complement format. *Note that a reading of 0x80 in a temperature reading register indicates a diode fault (open or short) on that channel. If the extended resolution bits of these readings are also being read, the Extended Resolution registers (Reg. 0x76, 0x77) should be read first. Once the Extended Resolution registe rs get read, all associated MSB reading registers get frozen until read. Both the Extended Resolution Registers and the MSB registers get frozen. Table VII. Fan Tachometer Reading Registers (Power-On Default = 0x00) Register Address R/W Description 0x28 Read Only TACH1 Low Byte 0x29 Read Only TACH1 High Byte 0x2A Read Only TACH2 Low Byte 0x2B Read Only TACH2 High Byte 0x2C Read Only TACH3 Low Byte 0x2D Read Only TACH3 High Byte 0x2E Read Only TACH4 Low Byte 0x2F Read Only TACH4 High Byte These registers count the number of 11.11 µs periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan TACH pulses (default = 2). The number of TACH pulses used to count can be changed using the Fan Pulses Per Revolution Register (Reg. 0x7B). This allows th e fan speed to be accurately measured. Since a valid Fan Tachometer reading requires that two bytes are read, the low byte MUST be read first. Both the low and high bytes are then frozen until read. At power-on, these registers contain 0x0000 until such time as the first valid fan TACH measurement is read in to these r egisters. This prevents false interrupts from occurring while the fans are spinning up. A count of 0xFFFF indicates that a fan is: 1. Stalled or Blocked (object jamming the fan) 2. Failed (internal circuitry destroyed) 3. Not Populated (The ADT7460 expects to see a fan connected to each TACH. If a fan is not connected to that TACH, its TACH minimum high and low byte should be set to 0xFFFF.) 4. Alternate Function , e.g., TACH4 reconfigured as THERM pin 5. 2-Wire Instead of 3-Wire Fan

REV. 0–32– ADT7460 Table VIII. Current PWM Duty Cycle Registers (Power-On Default = 0xFF) Register Address R/W Description 0x30 Read/Write PWM1 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF) 0x31 Read/Write PWM2 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF) 0x32 Read/Write PWM3 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF) These registers reflect the PWM duty cycle driving each fan at any given time. When in Automatic Fan Speed Control Mode, the AD T7460 reports the PWM duty cycles back through these registers. The PWM duty cycle values will vary according to temperature in Automatic Fan Speed Contro l Mode. During fan startup, these registers report back 0x00. In Software Mode, the PWM duty cycle outputs can be set to any duty cycle value by writing to these registers. Table IX. Operating Point Registers (Power-On Default = 0x64) Register Address R/W * Description 0x33 Read/Write Remote 1 Operating Point Register (default = 100 /H11034C) 0x34 Read/Write Local Temp Operating Point Register (default = 100 /H11034C) 0x35 Read/Write Remote 2 Operating Point Register (default = 100 /H11034C) These registers set the target Operating Point for each temperature channel when the Dynamic T MIN Control feature is enabled. The fans being controlled will be adjusted to maintain temperature about an Operating Point. *These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to th ese registers will fail.

REV. 0 ADT7460 –33– Table X. Register 0x36 – Dynamic TMIN Control Register 1 (Power-On Default = 0x00) Bit Name R/W Description <0> CYR2 Read/Write MSB of 3-Bit Remote 2 Cycle Value. The other two bits of the code reside in Dynamic TMIN Control Register 2 (Reg. 0x37). These three bits define the delay time between making sub- sequent TMIN adjustments in the control loop, in terms of number of monitoring cycles. The system will have associated thermal time constants that need to be found to optimize the response of fans and the control loop. <1> Reserved Read Only and Reserved for Future Use <2> PHTR1 Read/Write PHTR1 = 1 copies the Remote 1 current temperature to the Remote 1 Operating Point Register if THERM gets asserted. The operating point will contain the temperature at which THERM is asserted. This allows the system to run as quietly as possible without system performance being affected. PHTR1 = 0 ignores any THERM assertions on the THERM pin. The Remote 1 Operating Point Register will reflect its programmed value. <3> PHTL Read/Write PHTL = 1 copies the local channel’s current temperature to the Local Operating Point Register if THERM gets asserted. The operating point will contain the temperature at which THERM is asserted. This allows the system to run as quietly as possible without system performance being affected. PHTL = 0 ignores any THERM assertions on the THERM pin. The Local Temp Operating Point Register will reflect its programmed value . <4> PHTR2 Read/Write PHTR2 = 1 copies the Remote 2 current temperature to the Remote 2 Operating Point Register if THERM gets asserted. The operating point will contain the temperature at which THERM is asserted. This allows the system to run as quietly as possible without system performance being affected. PHTR2 = 0 ignores any THERM assertions on the THERM pin. The Remote 2 Operating Point Register will reflect its programmed value. <5> R1T Read/Write R1T = 1 enables dynamic TMIN control on the Remote 1 Temperature channel. The chosen TMIN value will be dynamically adjusted based on the current temperature, oper- ating point, and high and low limits for this zone. R1T = 0 disables dynamic T MIN con- trol. The TMIN value chosen will not be adjusted and the channel will behave as described in the Automatic Fan Control section. <6> LT Read/Write LT = 1 enables dynamic T MIN control on the Local Temperature channel. The chosen TMIN value will be dynamically adjusted based on the current temperature, operating point, and high and low limits for this zone. LT = 0 disables dynamic T MIN control. The TMIN value chosen will not be adjusted and the channel will behave as described in the Automatic Fan Control section. <7> R2T Read/Write R2T = 1 enables dynamic T MIN control on the Remote 2 Temperature channel. The chosen TMIN value will be dynamically adjusted based on the current temperature, operating point, and high and low limits for this zone. R2T = 0 disables dynamic T MIN control. The TMIN value chosen will not be adjusted and the channel will behave as described in the Automatic Fan Control section. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to thi s register will fail.

REV. 0–34– ADT7460 Table XI. Register 0x37 – Dynamic TMIN Control Register 2 (Power-On Default = 0x00) Bit Name R/W * Description <2:0> CYR1 Read/Write 3-bit Remote 1 Cycle Value. These three bits define the delay time between making subse- quent TMIN adjustments in the control loop for Remote 1 channel, in terms of number of monitoring cycles. The system will have associated thermal time constants that need to be found to optimize the response of fans and the control loop. BITS DECREASE CYCLE INCREASE CYCLE 000 4 cycles (0.5 s) 8 cycles (1 s) 001 8 cycles (1 s) 16 cycles (2 s) 010 16 cycles (2 s) 32 cycles (4 s) 011 32 cycles (4 s) 64 cycles (8 s) 100 64 cycles (8 s) 128 cycles (16 s) 101 128 cycles (16 s) 256 cycles (32 s) 110 256 cycles (32 s) 512 cycles (64 s) 111 512 cycles (64 s) 1024 cycles (128 s) <5:3> CYL Read/Write 3-bit Local Temp Cycle Value. These three bits define the delay time between making subse- quent TMIN adjustments in the control loop for Local Temp channel, in terms of number of monitoring cycles. The system will have associated thermal time constants that need to be found to optimize the response of fans and the control loop. BITS DECREASE CYCLE INCREASE CYCLE 000 4 cycles (0.5 s) 8 cycles (1 s) 001 8 cycles (1 s) 16 cycles (2 s) 010 16 cycles (2 s) 32 cycles (4 s) 011 32 cycles (4 s) 64 cycles (8 s) 100 64 cycles (8 s) 128 cycles (16 s) 101 128 cycles (16 s) 256 cycles (32 s) 110 256 cycles (32 s) 512 cycles (64 s) 111 512 cycles (64 s) 1024 cycles (128 s) <7:6> CYR2 Read/Write 2 LSBs of 3-bit Remote 2 Cycle Value. The MSB of the 3-bit code resides in Dynamic TMIN Control Register 1 (Reg. 0x36). These three bits define the delay time between making subsequent TMIN adjustments in the control loop for Remote 2 channel, in terms of num- ber of monitoring cycles. The system will have associated thermal time constants that need to be found to optimize the response of fans and the control loop. BITS DECREASE CYCLE INCREASE CYCLE 000 4 cycles (0.5 s) 8 cycles (1 s) 001 8 cycles (1 s) 16 cycles (2 s) 010 16 cycles (2 s) 32 cycles (4 s) 011 32 cycles (4 s) 64 cycles (8 s) 100 64 cycles (8 s) 128 cycles (16 s) 101 128 cycles (16 s) 256 cycles (32 s) 110 256 cycles (32 s) 512 cycles (64 s) 111 512 cycles (64 s) 1024 cycles (128 s) *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to thi s register will fail.

REV. 0 ADT7460 –35– Table XII. Register 0x40 – Configuration Register 1 (Power-On Default = 0x00) Bit Name R/W Description <0> STRT Read/Write Logic 1 enables monitoring and PWM control outputs based on the limit settings pro- grammed. Logic 0 disables monitoring and PWM control based on the default power-up limit settings. Note that the limit values programmed are preserved even if a logic 0 is written to this bit and the default settings are enabled. This bit becomes read-only and cannot be changed once Bit 1 (LOCK bit) has been written. All limit registers should be programmed by BIOS before setting this bit to 1. (Lockable.) <1> LOCK Write Once Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable registers become read-only and cannot be modified until the ADT7460 is powered down and powered up again. This prevents rogue programs such as viruses from modifying critical system limit settings. (Lockable.) <2> RDY Read Only This bit gets set to 1 by the ADT7460 to indicate that the device is fully powered-up and ready to begin systems monitoring. <3> FSPD Read/Write When set to 1, this runs all fans at full speed. Power-on default = 0. This bit does not get locked at any time. <4> Reserved Read Only and Reserved for Future Use <5> FSPDIS Read/Write Logic 1 disables fan spin-up for two TACH pulses. Instead, the PWM outputs will go high for the entire fan spin-up timeout selected. <6> TODIS Read/Write When this bit is set to 1, the SMBus timeout feature is disabled. This allows the ADT7460 to be used with SMBus controllers that cannot handle SMBus timeouts. (Lockable.) <7> VCC Read/Write When this bit is set to 1, the ADT7460 rescales its V CC pin to measure a 5 V supply. If this bit is 0, the ADT7460 measures V CC as a 3.3 V supply. (Lockable.) Table XIII. Register 0x41 – Interrupt Status Register 1 (Power-On Default = 0x00) Bit Name R/W Description <0> 2.5V Read Only A one indicates the 2.5 V High or Low limit has been exceeded. This bit gets cleared on a read of the Status Register only if the error condition has subsided. <1> Unused Read Only Reserved for future use <2> V CC Read Only A one indicates the V CC High or Low limit has been exceeded. This bit gets cleared on a read of the Status Register only if the error condition has subsided. <3> Unused Read Only Reserved for future use <4> R1TR ead Only A one indicates the Remote 1 Low or High Temp limit has been exceeded. This bit gets cleared on a read of the Status Register only if the error condition has subsided. <5> LT Read Only A one indicates the Local Low or High Temp limit has been exceeded. This bit gets cleared on a read of the Status Register only if the error condition has subsided. <6> R2T Read Only A one indicates the Remote 2 Low or High Temp limit has been exceeded. This bit gets cleared on a read of the Status Register only if the error condition has subsided. <7> OOL Read Only A one indicates that an Out-of-Limit event has been latched in Status Register 2. This bit is a logical OR of all status bits in Status Register 2. Software can test this bit in isolation to determine whether any of the voltage, temperature, or fan speed readings represented by Status Register 2 are out-of-limit. This saves the need to read Status Register 2 every interrupt or polling cycle. ADOPT is a trademark of Analog Devices, Inc.

REV. 0–36– ADT7460 Table XIV. Register 0x42 – Interrupt Status Register 2 (Power-On Default = 0x00) Bit Name R/W Description <0> Unused Read Only Reserved for future use <1> OVT Read Only A one indicates that one of the THERM overtemperature limits has been exceeded. This bit gets cleared on a read of the Status Register when the temperature drops below THERM – THYST. <2> FAN1 Read Only A one indicates that Fan 1 has dropped below minimum speed or has stalled. This bit does NOT get set when the PWM 1 output is off. <3> FAN2 Read Only A one indicates that Fan 2 has dropped below minimum speed or has stalled. This bit does NOT get set when the PWM 2 output is off. <4> FAN3 Read Only A one indicates that Fan 3 has dropped below minimum speed or has stalled. This bit does NOT get set when the PWM 3 output is off. <5> F4P Read Only A one indicates that Fan 4 has dropped below minimum speed or has stalled. This bit does NOT get set when the PWM 3 output is off. Read Only If Pin 9 is configured as the THERM timer input for THERM monitoring, then this bit gets set when the THERM assertion time exceeds the limit programmed in the THERM Limit Register (Reg. 0x7A). <6> D1 Read Only A one indicates either an open or short circuit on the Thermal Diode 1 inputs. <7> D2 Read Only A one indicates either an open or short circuit on the Thermal Diode 2 inputs. Table XV. Voltage Limit Registers Register Address R/W Description Power-On Default 0x44 Read/Write 2.5 V Low Limit 0x00 0x45 Read/Write 2.5 V High Limit 0xFF 0x48 Read/Write V CC Low Limit 0x00 0x49 Read/Write V CC High Limit 0xFF Setting the Configuration Register 1 Lock bit has no effect on these registers. High Limits: An interrupt is generated when a value exceeds its high limit (> comparison). Low Limits: An interrupt is generated when a value is equal to or below its low limit ( ≤ comparison). Table XVI. Temperature Limit Registers Register Address R/W Description Power-On Default 0x4E Read/Write Remote 1 Temp Low Limit 0x81 0x4F Read/Write Remote 1 Temp High Limit 0x7F 0x50 Read/Write L ocal Temp Low Limit 0x81 0x51 Read/Write L ocal Temp High Limit 0x7F 0x52 Read/Write Rem ote 2 Temp Low Limit 0x81 0x53 Read/Write Remote 2 Temp High Limit 0x7F Exceeding any of these temperature limits by 1 /H11034C will cause the appropriate status bit to be set in the Interrupt Status Register. Setting the Configuration Register 1 Lock bit has no effect on these registers. High Limits: An interrupt is generated when a value exceeds its high limit (> comparison). Low Limits: An interrupt is generated when a value is equal to or below its low limit ( ≤ comparison).

REV. 0 ADT7460 –37– Table XVII. Fan Tachometer Limit Registers Register Address R/W Description Power-On Default 0x54 Read/Write TACH 1 Minimum Low Byte 0xFF 0x55 Read/Write TACH 1 Minimum High Byte 0xFF 0x56 Read/Write TACH 2 Minimum Low Byte 0xFF 0x57 Read/Write TACH 2 Minimum High Byte 0xFF 0x58 Read/Write TACH 3 Minimum Low Byte 0xFF 0x59 Read/Write TACH 3 Minimum High Byte 0xFF 0x5A Read/Write TACH 4 Minimum Low Byte 0xFF 0x5B Read/Write TACH 4 Minimum High Byte 0xFF Exceeding any of the TACH limit registers by 1 indicates that the fan is running too slowly or has stalled. The appropriate sta tus bit will be set in Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 Lock bit has no effect on these registers. Table XVIII. PWM Configuration Registers Register Address R/W * Description Power-On Default 0x5C Read/Write PWM1 Configuration 0x62 0x5D Read/Write PWM2 Configuration 0x62 0x5E Read/Write PWM3 Configuration 0x62 Bit Name R/W Description <2:0> SPIN Read/Write These bits control the startup timeout for PWMx. The PWM output stays high until two valid TACH rising edges are seen from the fan. If there is not a valid TACH signal during the fan TACH measurement directly after the Fan Startup Timeout period, then the TACH measurement will read 0xFFFF and Status Register 2 reflects the Fan Fault. If the TACH Minimum High and Low Byte contains 0xFFFF or 0x0000, then the Status Register 2 bit will not get set, even if the fan has not started. 000 = No startup timeout 001 = 100 ms 010 = 250 ms (default) 011 = 400 ms 100 = 667 ms 101 = 1 s 110 = 2 s 111 = 4 s <3> SLOW Read/Write SLOW = 1 makes the Ramp Rates for Acoustic Enhancement four times longer <4> INV Read/Write This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for 100% duty cycle. Setting this bit to 1 inverts the PWM output, so 100% duty cycle corresponds to a logic low output. <7:5> BHVR Read/Write These bits assign each fan to a particular temperature sensor for localized cooling. 000 = Remote 1 Temp controls PWMx (Automatic Fan Control Mode) 001 = Local Temp controls PWMx (Automatic Fan Control Mode) 010 = Remote 2 Temp controls PWMx (Automatic Fan Control Mode) 011 = PWMx runs full speed (default) 100 = PWMx disabled 111 = Manual Mode. PWM Duty cycle Registers (Reg 0x30–0x32) become writable. *These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to th ese registers will fail.

REV. 0–38– ADT7460 Table XIX. TEMP TRANGE/PWM Frequency Registers Register Address R/W * Description Power-On Default 0x5F Read/Write Remote 1 T RANGE/PWM 1 Frequency 0xC4 0x60 Read/Write Local Temp T RANGE/PWM 2 Frequency 0xC4 0x61 Read/Write Remote 2 T RANGE/PWM 3 Frequency 0xC4 Bit Name Read/Write Description <2:0> FREQ Read/Write These bits control the PWMx frequency. 000 = 11.0 Hz 001 = 14.7 Hz 010 = 22.1 Hz 011 = 29.4 Hz 100 = 35.3 Hz (default) 101 = 44.1 Hz 110 = 58.8 Hz 111 = 88.2 Hz <3> THRM Read/Write THRM = 1 causes the THERM pin (Pin 9) to assert low as an output when this temperature channel’s THERM limit has been exceeded by 0.25 /H11034C. The THERM pin will remain asserted until the temperature is equal to or below the THERM limit. The minimum time that THERM asserts for is one monitoring cycle. This allows clock modulation of devices that incorporate this feature. THRM = 0 makes the THERM pin act as an input only, e.g., for Pentium 4 PROCHOT monitoring, when Pin 9 is configured as THERM. <7:4> RANGE Read/Write These bits determine the PWM Duty Cycle versus Temperature Slope for Automatic Fan Control. 0000 = 2/H11034C 0001 = 2.5/H11034C 0010 = 3.33/H11034C 0011 = 4/H11034C 0100 = 5/H11034C 0101 = 6.67/H11034C 0110 = 8/H11034C 0111 = 10/H11034C 1000 = 13.33/H11034C 1001 = 16/H11034C 1010 = 20/H11034C 1011 = 26.67/H11034C 1100 = 32/H11034C (default) 1101 = 40/H11034C 1110 = 53.33/H11034C 1111 = 80/H11034C *These registers become read-only when the Configuration Register 1 Lock bit is set. Any further attempts to write to these reg isters shall have no effect.

REV. 0 ADT7460 –39– Table XX. Register 0x62 – Enhance Acoustics Register 1 (Power-On Default = 0x00) Bit Name R/W * Description <2:0> ACOU Read/Write These bits select the Ramp Rate applied to the PWM1 output. Instead of PWM1 jumping instantaneously to its newly calculated speed, PWM1 will ramp gracefully at the rate determined by these bits. This feature enhances the acoustics of the fan being driven by the PWM1 output. Time Slot Increase Time for 33% to 100% 000 = 1 35 s 001 = 2 17.6 s 010 = 3 1.8 s 011 = 5 7 s 100 = 8 4.4 s 101 = 12 3 s 110 = 24 1.6 s 111 = 48 0.8 s <3> EN1 Read/Write When this bit is 1, Acoustic Enhancement is enabled on PWM1 output. <4> SYNC Read/Write SYNC = 1 synchronizes fan speed measurements on TACH2, TACH3, and TACH4 to PWM3. This allows up to three fans to be driven from PWM3 output and their speeds to be measured. SYNC = 0, only TACH3 and TACH4 are synchronized to PWM3 output. <5> MIN1 Read/Write When the ADT7460 is in Automatic Fan Control Mode, this bit defines whether PWM1 is off (0% duty cycle) or at PWM 1 Minimum Duty Cycle when the controlling temperature is below its TMIN – Hysteresis value. 0 = 0% duty cycle below T MIN – Hysteresis 1 = PWM 1 Minimum Duty Cycle below T MIN – Hysteresis <6> MIN2 Read/Write When the ADT7460 is in Automatic Fan Speed Control Mode, this bit defines whether PWM 2 is off (0% duty cycle) or at PWM 2 Minimum Duty Cycle when the controlling temperature is below its T MIN – Hysteresis value. 0 = 0% duty cycle below T MIN – Hysteresis 1 = PWM 2 Minimum Duty Cycle below T MIN – Hysteresis <7> MIN3 Read/Write When the ADT7460 is in Automatic Fan Speed Control Mode, this bit defines whether PWM 3 is off (0% duty cycle) or at PWM 3 Minimum Duty Cycle when the controlling temperature is below its T MIN – Hysteresis value. 0 = 0% duty cycle below T MIN – Hysteresis 1 = PWM 3 Minimum Duty Cycle below T MIN – Hysteresis *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.

REV. 0–40– ADT7460 Table XXI. Register 0x63 – Enhance Acoustics Register 2 (Power-On Default = 0x00) Bit Name R/W * Description <2:0> ACOU3 Read/Write These bits select the Ramp Rate applied to the PWM3 output. Instead of PWM3 jumping instantaneously to its newly calculated speed, PWM3 will ramp gracefully at the rate determined by these bits. This effect enhances the acoustics of the fan being driven by the PWM3 output. Time Slot Increase Time for 33% to 100% 000 = 1 35 s 001 = 2 17.6 s 010 = 3 11.8 s 011 = 5 7 s 100 = 8 4.4 s 101 = 12 3 s 110 = 24 1.6 s 111 = 48 0.8 s <3> EN3 Read/Write When this bit is 1, Acoustic Enhancement is enabled on PWM3 output. <6:4> ACOU2 Read/Write These bits select the Ramp Rate applied to the PWM2 output. Instead of PWM2 jumping instantaneously to its newly calculated speed, PWM2 will ramp gracefully at the rate determined by these bits. This effect enhances the acoustics of the fans being driven by the PWM2 output. Time Slot Increase Time for 33% to 100% 000 = 1 35 s 001 = 2 17.6 s 010 = 3 11.8 s 011 = 5 7 s 100 = 8 4.4 s 101 = 12 3 s 110 = 24 1.6 s 111 = 48 0.8 s <7> EN2 Read/Write When this bit is 1, Acoustic Enhancement is enabled on PWM2 output. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect.

REV. 0 ADT7460 –41– Table XXII. PWM Min Duty Cycle Registers Register Address R/W * Description Power-On Default 0x64 Read/Write PWM1 Min Duty Cycle 0x80 (50% duty cycle) 0x65 Read/Write PWM2 Min Duty Cycle 0x80 (50% duty cycle) 0x66 Read/Write PWM3 Min Duty Cycle 0x80 (50% duty cycle) Bit Name Read/Write Description <7:0> PWM Duty Read/Write These bits define the PWM MIN duty cycle for PWMx. Cycle 0x00 = 0% duty cycle (Fan off) 0x40 = 25% duty cycle 0x80 = 50% duty cycle 0xFF = 100% duty cycle (Fan full speed) *These registers become read-only when the ADT7460 is in Automatic Fan Control Mode. Table XXIII. TMIN Registers Register Address R/W * Description Power-On Default 0x67 Read/Write Remote 1 Temp T MIN 0x5A (90/H11034C) 0x68 Read/Write Local Temp T MIN 0x5A (90/H11034C) 0x69 Read/Write Remote 2 Temp T MIN 0x5A (90/H11034C) These are the T MIN registers for each temperature channel. When the temperature measured exceeds T MIN, the appropriate fan will run at minimum speed and increase with temperature according to T RANGE. *These registers become read-only when the Configuration Register 1 Lock bit is set. Any further attempts to write to these regi sters shall have no effect. Table XXIV. THERM Limit Registers Register Address R/W * Description Power-On Default 0x6A Read/Write Remote 1 THERM Limit 0x64 (100 /H11034C) 0x6B Read/Write Local THERM Limit 0x64 (100 /H11034C) 0x6C Read/Write Remote 2 THERM Limit 0x64 (100 /H11034C) If any temperature measured exceeds its THERM limit, all PWM outputs will drive their fans at 100% duty cycle. This is a fail-safe mechanism incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that software or hard ware locks up. If set to 0x80, this feature is disabled. The PWM output will remain at 100% until the temperature drops below THERM limit – Hysteresis. If the THERM pin is programmed as an output, then exceeding these limits by 0.25 /H11034C can cause the THERM pin to assert low as an output. *These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to these registers will have no effect. Table XXV. Temperature Hysteresis Registers Register Address R/W * Description Power-On Default 0x6D Read/Write Remote 1, Local Temp Hysteresis 0x44 0x6E Read/Write Remote 2 Temp Hysteresis 0x40 Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperatur e for that channel falls below its T MIN value, the fan will remain running at PWM MIN duty cycle until the temperature = T MIN – Hysteresis. Up to 15 /H11034C of hysteresis may be assigned to any temperature channel. The hysteresis value chosen will also apply to that temperature channel if its THERM limit is exceeded. The PWM output being controlled will go to 100% if the THERM limit is exceeded and will remain at 100% until the temperature drops below THERM – Hysteresis. For acoustic reasons, it is recommended that the hysteresis value not be programmed less than 4 /H11034C. Setting the hysteresis value lower than 4 /H11034C will cause the fan to switch on and off regularly when the temperature is close to T MIN. *These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to these registers will have no effect.

REV. 0–42– ADT7460 Table XXVI. XOR Tree Test Enable Register Address R/W * Description Power-On Default 0x6F Read/Write XOR Tree Test Enable Register 0x00 <0> XEN If the XEN bit is set to 1, the device enters the XOR Tree Test Mode. Clearing the bit removes the device from the XOR Test Mode. <7:1> Reserved Unused. Do not write to these bits. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect. Table XXVII. Remote 1 Temperature Offset Register Address R/W * Description Power-On Default 0x70 Read/Write Remote 1 Temperature Offset 0x00 <7:0> Read/Write Allows a twos complement offset value to be automatically added to or subtracted from the Remote 1 Temperature reading. This is to compensate for any inherent system offsets such as PCB trace resistance. LSB value = 0.25 oC. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect. Table XXVIII. Local Temperature Offset Register Address R/W * Description Power-On Default 0x71 Read/Write Local Temperature Offset 0x00 <7:0> Read/Write Allows a twos complement offset value to be automatically added to or subtracted from the local temperature reading. LSB value = 0.25 oC. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect. Table XXIX. Remote 2 Temperature Offset Register Address R/W * Description Power-On Default 0x72 Read/Write Remote 2 Temperature Offset 0x00 <7:0> Read/Write Allows a twos complement offset value to be automatically added to or subtracted from the Remote 2 Temperature reading. This is to compensate for any inherent system offsets such as PCB trace resistance. LSB value = 0.25 oC. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect.

REV. 0 ADT7460 –43– Table XXX. Register 0x73 – Configuration Register 2 (Power-On Default = 0x00) Bit Name R/W * Description 0 AIN1 Read/Write AIN1 = 0, Speed of 3-wire fans measured using the TACH output from the fan. AIN1 = 1, Pin 6 is reconfigured to measure the speed of 2-wire fans using an external sensing resistor and coupling capacitor. AIN voltage threshold is set via Configuration Register 4 (Reg. 0x7D). 1 AIN2 Read/Write AIN2 = 0, Speed of 3-wire fans measured using the TACH output from the fan. AIN2 = 1, Pin 7 is reconfigured to measure the speed of 2-wire fans using an external sensing resistor and coupling capacitor. AIN voltage threshold is set via Configuration Register 4 (Reg. 0x7D). 2 AIN3 Read/Write AIN3 = 0, Speed of 3-wire fans measured using the TACH output from the fan. AIN3 = 1, Pin 4 is reconfigured to measure the speed of 2-wire fans using an external sensing resistor and coupling capacitor. AIN voltage threshold is set via Configuration Register 4 (Reg. 0x7D). 3 AIN4 Read/Write AIN4 = 0, Speed of 3-wire fans measured using the TACH output from the fan. AIN4 = 1, Pin 9 is reconfigured to measure the speed of 2-wire fans using an external sensing resistor and coupling capacitor. AIN voltage threshold is set via Configuration Register 4 (Reg. 0x7D). 4 AVG Read/Write AVG = 1, Averaging on the temperature and voltage measurements is turned off. This allows measurements on each channel to be made much faster. 5 ATTN Read/Write ATTN = 1, the ADT7460 removes the attenuators from the 2.5 V input. The input can be used for other functions such as connecting up external sensors. 6 CONV Read/Write CONV = 1, the ADT7460 is put into a single-channel ADC Conversion Mode. In this mode, the ADT7460 can be made to read continuously from one input only, e.g., Remote 1 Temperature. It is also possible to start ADC conversions using an external clock on Pin 6 by setting Bit 2 of Test Register 2 (Reg. 0x7F). This mode could be useful if, for example, you wanted to characterize/profile CPU temperature quickly. The appropriate ADC channel is selected by writing to Bits <7:5> of TACH1 Min High Byte Register (0x55). Bits <7:5> Reg 0x55 Channel Selected 000 2.5 V 010 V CC (3.3 V) 7 SHDN Read/Write SHDN = 1, ADT7460 goes into Shutdown Mode. All PWM outputs assert low (or high depending on state of INV bit) to switch off all fans. The PWM Current Duty Cycle registers read 0x00 to indicate that the fans are not being driven. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect.

REV. 0–44– ADT7460 Table XXXI. Register 0x74 – Interrupt Mask Register 1 (Power On Default <7:0> = 0x00) Bit Name R/W Description 0 2.5 V Read/Write A one masks SMBALERT for out-of-limit conditions on the 2.5 V channel.

1 Unused Read/Write Reserved for future use

2V CC Read/Write A one masks SMBALERT for out-of-limit conditions on the VCC channel. 3U nused Read/Write R eserved for future use 4R 1T Read/Write A one masks SMBALERT for out-of-limit conditions on the Remote 1 Temperature channel. 5L T Read/Write A one masks SMBALERT for out-of-limit conditions on the Local Temperature channel. 6R 2T Read/Write A one masks SMBALERT for out-of-limit conditions on the Remote 2 Temperature channel. 7 OOL Read/Write A one masks SMBALERT for any out-of-limit condition in Status Register 2. Table XXXII. Register 0x75 – Interrupt Mask Register 2 (Power On Default <7:0> = 0x00) Bit Name R/W Description

0 Unused Read/Write Reserved for future use

1 OVT Read Only A one masks SMBALERT for overtemperature THERM conditions. 2 FAN1 Read/Write A one masks SMBALERT for a Fan 1 Fault. 3 FAN2 Read/Write A one masks SMBALERT for a Fan 2 Fault. 4 FAN3 Read/Write A one masks SMBALERT for a Fan 3 Fault. 5 F4P Read/Write A one masks SMBALERT for a Fan 4 Fault. If the TACH4 pin is being used as the THERM input, this bit masks SMBALERT for a THERM timer event. 6D 1 Read/Write A one masks SMBALERT for a diode open or short on Remote 1 channel. 7D 2 Read/Write A one masks SMBALERT for a diode open or short on Remote 2 channel. Table XXXIII. Register 0x76 – Extended Resolution Register 1 Bit Name R/W Description <3:2> Unused Read/Write Reserved for future use <5:4> V CC Read Only V CC LSBs. Holds the 2 LSBs of the 10-bit V CC measurement. <7:6> Unused Read/Write Reserved for future use If this register is read, this register and the registers holding the MSB of each reading are frozen until read. Table XXXIV. Register 0x77 – Extended Resolution Register 2 Bit Name R/W Description <1:0> Unused Read/Write Reserved for future use <3:2> TDM1 Read Only Remote 1 Temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 Temperature measurement. <5:4> LTMP Read Only Local Temperature LSBs. Holds the 2 LSBs of the 10-bit Local Temperature measurement. <7:6> TDM2 Read Only Re mote 2 Temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 Temperature measurement. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.

REV. 0 ADT7460 –45– Table XXXV. Register 0x78 – Configuration Register 3 (Power-On Default = 0x00) Bit Name R/W * Description <0> ALERT Read/Write ALERT = 1, Pin 5 (PWM2/ SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-limit error conditions. <1> THERM Read/Write THERM Timer = 1 enables THERM monitoring functionality on Pin 9 when it is configured as THERM. When THERM is asserted, fans can be run at full speed (if the BOOST bit is set) or a timer can be triggered to time how long THERM has been asserted for. <2> BOOST Read/Write BOOST = 1, assertion of THERM will cause all fans to run at 100% duty cycle for fail-safe cooling. <3> FAST Read/Write FAST = 1 enables fast TACH measurements on all channels. This increases the TACH measurement rate from once per second, to once every 250 ms (4 /H11547). <4> DC1 Read/Write DC1 = 1 enables TACH measurements to be continuously made on TACH1. <5> DC2 Read/Write DC2 = 2 enables TACH measurements to be continuously made on TACH2. <6> DC3 Read/Write DC3 = 1 enables TACH measurements to be continuously made on TACH3. <7> DC4 Read/Write DC4 = 1 enables TACH measurements to be continuously made on TACH4. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect. Table XXXVI. Register 0x79 – THERM Status Register (Power-On Default = 0x00) Bit Name R/W Description <7:1> TMR Read Only Times how long THERM input is asserted. These seven bits will read zero until the THERM assertion time exceeds 45.52 ms. <0> ASRT/TMR0 Read Only Gets set high on the assertion of the THERM input. Cleared on read. If the THERM assertion time exceeds 45.52 ms, this bit gets set and becomes the LSB of the 8-bit TMR reading. This allows THERM assertion times from 45.52 ms to 5.82 s to be reported back with a resolution of 22.76 ms. Table XXXVII. Register 0x7A – THERM Limit Register (Power-On Default = 0x00) Bit Name R/W Description <7:0> LIMT Read/Write Sets maximum THERM assertion length allowed before an interrupt is generated. This is an 8-bit limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms to 5.82 s to be programmed. If the THERM assertion time exceeds this limit, Bit 5 (F4P) of Interrupt Status Register 2 (Reg.0x42) will be set. If the limit value is 0x00, then an interrupt will be generated immediately on the assertion of the THERM input.

REV. 0–46– ADT7460 Table XXXVIII. Register 0x7B – Fan Pulses Per Revolution Register (Power On Default = 0x55) Bit Name R/W Description <1:0> FAN1 Read/Write Sets number of pulses to be counted when measuring FAN1 speed. Can be used to determine fan’s pulses per revolution for unknown fan type. Pulses Counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 <3:2> FAN2 Read/Write Sets number of pulses to be counted when measuring FAN2 speed. Can be used to determine fan’s pulses per revolution for unknown fan type. Pulses Counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 <5:4> FAN3 Read/Write Sets number of pulses to be counted when measuring FAN3 speed. Can be used to determine fan’s pulses per revolution for unknown fan type. Pulses Counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 <7:6> FAN4 Read/Write Sets number of pulses to be counted when measuring FAN4 speed. Can be used to determine fan’s pulses per revolution for unknown fan type. Pulses Counted 00 = 1 01 = 2 (default) 10 = 3 11 = 4 Table XXXIX. REGISTER 0x7D – Configuration Register 4 (Power-On Default = 0x00) Bit Name R/W Description <0> AL2.5V Read/Write AL2.5V = 1, Pin 14 (2.5V/ SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-limit error conditions. AL2.5V = 0, Pin 14 (2.5V/ SMBALERT) is configured as a 2.5 V measurement input. <1> Unused Read Only Reserved for future use <3:2> AINL Read/Write These two bits define the input threshold for 2-wire fan speed measurements: 00 = /H1100620 mV 01 = /H1100640 mV 10 = /H1100680 mV 11 = /H11006130 mV <7:4> RES Unused. *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this r egister will have no effect. Table XL. Register 0x7E – Manufacturer’s Test Register 1 (Power On-Default = 0x00) Bit Name Read/Write Description <7:0> Reserved Read Only Manufacturer’s Test Register. These bits are reserved for manufacturer’s test purposes and should NOT be written to under normal operation. Table XLI. Register 0x7F – Manufacturer’s Test Register 2 (Power-On Default = 0x00) Bit Name Read/Write Description <7:0> Reserved Read Only Manufacturer’s Test Register. These bits are reserved for manufacturer’s test purposes and should NOT be written to under normal operation.

REV. 0 ADT7460 –47– OUTLINE DIMENSIONS 16-Lead SOIC, 0.025 Lead Pitch [QSOP] (RQ-16) Dimensions shown in millimeters 16 9 0.197 0.189 0.236 BSC PIN 1 0.154 BSC SEATING PLANE 0.010 0.004 0.012 0.008 0.025 BSC 0.010 0.006 0.050 0.016 8/H11543 0/H11543 COPLANARITY 0.004 0.065 0.049 0.069 0.053 COMPLIANT TO JEDEC STANDARDS MO-137AB

C03228–0–11/02(0) PRINTED IN U.S.A. –48–