ADT7310TRZ

ADT7310 AD | Alldatasheet

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±0.5°C Accurate, 16-Bit Digital SPI Temperature Sensor ADT7310 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.

FEATURES

13- or 16-bit user selectable temperature-to-digital converter Temperature accuracy ±0.5°C from −40°C to +105°C No temperature calibration/correction required by user Power saving 1 sample per second (SPS) mode Fast first conversion on power-up of 6 ms SPI-compatible interface Operating temperature from −55°C to +150°C Operating voltage: 2.7 V to 5.5 V Critical overtemperature indicator Programmable overtemperature/undertemperature interrupt Low power consumption: 700 μW typical at 3.3 V Shutdown mode for lower power: 7μW typical at 3.3 V 8-lead narrow SOIC RoHS-compliant package

APPLICATIONS

Environmental control systems Computer thermal monitoring Thermal protection Industrial process control Power system monitors Hand-held applications GENERAL DESCRIPTION The ADT7310 is a high accuracy digital temperature sensor in a narrow SOIC package. It contains a band gap temperature reference and a 13-bit ADC to monitor and digitize the temperature to a 0.0625°C resolution. The ADC resolution, by default, is set to 13 bits (0.0625 °C). This can be changed to 16 bits (0.0078 °C) by setting Bit 7 in the configuration register (Register Address 0x01). The ADT7310 is guaranteed to operate over supply voltages from 2.7 V to 5.5 V . Operating at 3.3 V , the average supply current is typically 210 μA. The ADT7310 has a shutdown mode that powers down the device and offers a shutdown current of typically 2 μA. The ADT7310 is rated for operation over the −55°C to +150°C temperature range. The CT pin is an open-drain output that becomes active when the temperature exceeds a programmable critical temperature limit. The default critical temperature limit is 147°C. The INT pin is also an open-drain output that becomes active when the temperature exceeds a programmable limit. The INT and CT pins can operate in either comparator or interrupt mode. FUNCTIONAL BLOCK DIAGRAM INTERNAL REFERENCE TEMPERATURE SENSOR THIGH TCRIT TLOW INTERNAL OSCILLATOR FILTER LOGIC Σ-Δ MODULATOR VDD GND CT INT ADT7310 CS SPI INTERFACE TEMPERATURE VALUE REGISTER CONFIGURATION AND STATUS REGISTERS TLOW REGISTER TCRIT REGISTER THYST REGISTER THIGH REGISTER SCLK DOUT DIN 07789-001 Figure 1.

Rev. 0 | Page 2 of 24 TABLE OF CONTENTS

REVISION HISTORY

4/09—Revision 0: Initial Version

Rev. 0 | Page 3 of 24 SPECIFICATIONS TA = −55°C to +150°C; VDD = 2.7 V to 5.5 V; unless otherwise noted. Table 1. Parameter Min Typ Max Unit Test Conditions/Comments TEMPERATURE SENSOR AND ADC Accuracy1 ±0.5 °C TA = −40°C to +105°C, VDD = 2.7 V to 3.6 V ±0.7 °C TA = −55°C to +150°C, VDD = 2.7 V to 3.6 V ±0.8 °C TA = −40°C to +105°C, VDD = 4.5 V to 5.5 V ±1.0 °C TA = −55°C to +150°C, VDD = 2.7 V to 5.5 V ADC Resolution 13 Bits Twos complement temperature value of sign bit plus 12 ADC bits (power-up default resolution)

16 Bits Twos complement temperature value of sign bit plus 15 ADC bits

(Bit 7 = 1 in the configuration register) Temperature Resolution 13 Bit 0.0625 °C 13-bit resolution (sign + 12-bit) 16 Bit 0.0078 °C 16-bit resolution (sign + 15-bit) Temperature Conversion Time 240 ms Continuous conversion and one-shot conversion mode Fast Temperature Conversion Time 6 ms First conversion on power-up only

1 SPS Conversion Time 60 ms Conversion time for 1 SPS mode

Temperature Hysteresis 0.02 °C Temperature cycle = 25°C to 125°C, and back to 25°C Repeatability 0.01 °C TA = 25°C DC PSRR 0.1 °C/V TA = 25°C DIGITAL OUTPUTS (OPEN DRAIN) High Output Leakage Current, IOH 0.1 5 μA CT and INT pins pulled up to 5.5 V Output High Current 1 mA VOH = 5 .5V Output Low Voltage, VOL 0.4 V IOL = 2 mA @ 5.5 V, IOL = 1 mA @ 3.3 V Output High Voltage, VOH 0.7 × VDD V Output Capacitance, COUT 3 pF DIGITAL INPUTS Input Current ±1 μA VIN = 0 V to VDD Input Low Voltage, VIL 0.4 V Input High Voltage, VIH 0.7 × VDD V Pin Capacitance 5 10 pF DIGITAL OUTPUT (DOUT) Output High Voltage, VOH V OH − 0.3 V ISOURCE = ISINK = 200 μA Output Low Voltage, VOL 0.4 V IOL = 200 μA Output Capacitance, COUT 50 pF POWER REQUIREMENTS Supply Voltage 2.7 5.5 V Supply Current At 3.3 V 210 250 μA Peak current while converting, SPI interface inactive At 5.5 V 230 300 μA Peak current while converting, SPI interface inactive

1 SPS Current

At 3.3V 46 μA VDD = 3.3 V, 1 SPS mode, TA = 25°C At 5.5V 65 μA VDD = 5.5 V, 1 SPS mode, TA = 25°C Shutdown Current At 3.3 V 2.0 15 μA Supply current in shutdown mode At 5.5 V 4.4 25 μA Supply current in shutdown mode Power Dissipation Normal Mode 700 μW VDD = 3.3 V, normal mode at 25°C Power Dissipation 1 SPS 150 μW Power dissipated for VDD = 3.3 V, TA = 25°C 1 Accuracy includes lifetime drift.

vs. ambient temperature (TA).

3 Junction-to-case resistance is applicable to components featuring a

Figure 4. SOIC_N Maximum Power Dissipation vs. Temperature

Figure 5. Pin Configuration Table 4. Pin Function Descriptions 1 SCLK Serial Clock Input. The serial clock is used to clock in and clock out data to and from any register of the ADT7310. 2 DOUT Serial Data Output. Data is clocked out on the SCLK falling edge and is valid on the SCLK rising edge. into the registers on the rising edge of SCLK. 4 CS Chip Select Input. The device is selected when this input is low. The device is disabled when this pin is high. comparator interrupt. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ. configuration. A pull-up resistor is required, typically 10 kΩ. 7 GND Analog and Digital Ground.

and input to a precision digital modulator. needing correction or calibration by the user. 16-bits of resolution in an extremely compact circuit.

• Switching between 13-bit and 16-bit resolution
• Switching between normal operation and full power-down
• Switching between comparator and interrupt event modes on the INT and CT pins
• Setting the active polarity of the CT and INT pins
• Setting the number of faults that activate CT and INT
• Enabling the standard one-shot mode and 1 SPS mode CONVERTER DETAILS The Σ-Δ modulator consists of an input sampler, a summing network, an integrator, a comparator, and a 1-bit DAC. This architecture creates a negative feedback loop and minimizes the integrator output by changing the duty cycle of the comparator output in response to input voltage changes. The comparator samples the output of the integrator at a much higher rate than the input sampling frequency. This oversampling spreads the quantization noise over a much wider band than that of the input signal, improving overall noise performance and increasing accuracy. The modulated output of the comparator is encoded using a circuit technique that results in SPI temperature data. Σ-Δ MODULATOR INTEGRATOR COMPARATOR TEMPERATURE VALUE REGISTER CLOCK GENERATOR LPF DIGITAL FILTER 1-BIT DAC VOLTAGE REF AND VPTAT 1-BIT 13-BIT 07789-012

Figure 13. Σ-∆ Modulator low. Fast conversion temperature accuracy is typically within ±5°C. The conversion clock for the part is generated internally. mode via the configuration register.

Figure 14. Typical SPI One-Shot Write to Configuration Register Followed by a Read from the Temperature Value Register conversion and then goes into shutdown mode. power up and complete a conversion. priorities is to reduce power consumption.

1 SPS MODE

In this mode, the part performs one measurement per second.

any register resets the INT and CT pins. configuration register, Register Address 0x01) resets the INT pin. Address 0x01) resets the CT pin; see Figure 15. rate is appropriate to the application being used. CONVERSION TIME. THE DELAY IS 60ms IN THE CASE OF AONE-SHOT CONVERSION. Figure 15. One-Shot CT Pin

value register are output onto the DOUT pin. 01010000 (0x50) must be written to the ADT7310. third conversion does not, the fault count is reset to zero. Figure 16. Continuous Read Mode

One LSB of the ADC corresponds to 0.0625°C in 13-bit mode. temperature limit stored in the TLOW setpoint register. onversion result and are flag bits for TCRIT, THIGH, and TLOW. Table 5. 13-Bit Temperature Data Format where the MSB is removed from the ADC code. where the MSB is removed from the ADC code. where the MSB is removed from the ADC code. where the MSB is removed from the ADC code.

• A status register
• A configuration register
• Five temperature registers
• An ID register The status register, temperature value register, and the ID register are read-only.

Table 6. ADT7310 Registers modes, the RDY bit is reset after a write to the one-shot bits. Table 7. Status Register (Register Address 0x00) [0:3] 0000 R Unused Reads back 0. set in the TLOW + THYST setpoint registers. set in the THIGH − THYST setpoint registers. set in the TCRIT − THYST setpoint registers. this bit is reset after a write to the one-shot bits.

interrupt pins polarity, and overtemperature fault queues. Table 8. Configuration Register (Register Address 0x01) [2] 0 R/W CT pin polarity This bit selects the output polarity of the CT pin. [3] 0 R/W INT pin polarity This bit selects the output polarity of the INT pin. [4] 0 R/W INT/CT mode This bit selects between comparator mode and interrupt mode. [5:6] 00 R/W Operation mode These two bits set the operational mode for the ADT7310. 01 = one shot. Conversion time is typically 240 ms. average current consumption. 11 = shutdown. All circuitry except interface circuitry is powered down. [7] 0 R/W Resolution This bit sets up the resolution of the ADC when converting. 0 = 13-bit resolution. Sign bit + 12 bits gives a temperature resolution of 0.0625°C. 1 = 16-bit resolution. Sign bit + 15 bits gives a temperature resolution of 0.0078125°C.

to Bit 3 and the silicon revision in Bit 2 to Bit 0. Table 9. Temperature Value Register (Register Address 0x02) (13-bit resolution). When the temperature value is below TLOW,, this bit it set to 1. configuration register, Register Address 0x01[7] = 1 (16-bit resolution). (13-bit resolution). When the temperature value is above THIGH, this bit it set to 1. configuration register, Register Address 0x01[7] = 1 (16-bit resolution). (13-bit resolution). When the temperature value exceeds TCRIT, this bit it set to 1. configuration register, Register Address 0x01[7] = 1 (16-bit resolution). [3:7] 00000 R Temp Temperature value in twos complement format. [8:14] 0000000 R Temp Temperature value in twos complement format. [15] 0 R Sign Sign bit, indicates if the temperature value is negative or positive. Table 10. ID Register (Register Address 0x03) [2:0] XXX R Revision ID Contains the silicon revision identification number. [7:3] 11000 R Manufacture ID Contains the manufacturer identification number. Table 11. TCRIT Setpoint Register (Register Address 0x04) [15:0] 0x4980 R/W TCRIT 16-bit critical overtemperature limit, stored in twos complement format.

TLOW value to implement hysteresis. The default setting for the THYST setpoint is 5°C. being the temperature sign bit. being the temperature sign bit. Table 12. THYST Setpoint Register (Register Address 0x05) [0:3] 0101 R/W THYST Hysteresis value, from 0°C to 15°C. Stored in st raight binary format. The default setting is 5°C. Table 13. THIGH Setpoint Register (Register Address 0x06) [0:15] 0x2000 R/W THIGH 16-bit overtemperature limit, stored in twos complement format. Table 14. TLOW Setpoint Register (Register Address 0x07) [0:15] 0x0500 R/W TLOW 16-bit undertemperature limit, stored in twos complement format.

Figure 17. Typical SPI Interface Connection Table 15. Command Byte

0 R/W Register address Continuous

correctly if a 1 is written into this bit. be read from or written to per bus transaction. contents of the temperature value register onto the DOUT pin.

Figure 21. Read from a 16-Bit Register falling edge of SCLK following the command byte. The read transaction finishes when the master takes CS high. every register read. Only one register is read per bus transaction. the temperature value register can be read from continuously. value is clocked out on DOUT. chronization signal. This scheme is useful for DSP interfaces. provided that the timing numbers are obeyed. used to communicate with the ADT7310 in this mode. idle high between data transfers. tion resets the contents of all registers to their power-on values. before addressing the serial interface.

Figure 23. INT Output Temperature Response Diagram for TLOW Undertemperature Events

the settling time is best determined empirically. when the ADT7310 is mounted remotely from the power supply. seem convenient to tap into the digital logic power supply. in amplitude due to wiring resistance and inductance. isolates the analog section from the logic-switching transients. Figure 24. Use of Separate Traces to Reduce Power Supply Noise of the heat source can be inferred from the ADT7310 output. GND of the heat source be reduced as much as possible.

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 25. 8-Lead Standard Small Outline Package [SOIC_N] 1 Maximum accuracy over the −40°C to +105°C temperature range. registered trademarks are the prop erty of their respective owners.