ADSD-1420S MURATA-PS | Alldatasheet
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Page 1 of 5www.cd4power.com £{Óä- GENERAL DESCRIPTION The ADSD-1420S is a functionally complete, dual 14-bit, 20MSPS, sampling A/D converter. Its standard, 40-pin, triple-wide SMT DIP contains two fast-settling sample/hold amplifiers, two 14-bit A/D converters, multiplexed output buffers, a precision reference, and all the timing and control logic necessary to operate from either two or a single start convert pulse. The ADSD-1420S is optimized for wideband frequency-domain applications and is fully FFT tested. The ADSD-1420S requires only ±5V supplies and typically consumes 1.6 Watts. The digital output power supply is capable of directly driving 5V or 3V logic systems. Models are available in either commercial 0 to +70°C or military -55 to +125°C operating temperature ranges. INPUT/OUTPUT CONNECTIONS Figure 1. ADSD-1420S Functional Block Diagram
1 INPUT A 40 INPUT B
3 ANALOG GROUND 38 ANALOG GROUND
5 OFFSET A 36 OFFSET B
8 ANALOG GROUND 33 ANALOG GROUND
10 ENABLE A 31 ENABLE B
11 START A 30 START B
12 VDD 29 EOC B
13 BIT 14 (LSB) 28 BIT 1 (MSB)
14 BIT 13 27 BIT 2
15 BIT 12 26 BIT 3
16 BIT 11 25 BIT 4
17 BIT 10 24 BIT 5
18 BIT 9 23 BIT 6
19 BIT 8 22 BIT 7
20 DGND 21 DGND
FEATURES
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£{Óä- Page 2 of 5www.cd4power.com ANALOG INPUTS MIN. TYP . MAX. UNITS Input Voltage Range — ±2.5V — Volts Input Impedence 610 620 630 7 Input Capacitance — 7 15 pF DIGITAL INPUTS Logic Levels Logic "1" +2.4 — — Volts Logic "0" — — +0.8 Volts Logic Loading "1" — — +10 μA Logic Loading "0" — — –10 μA PERFORMANCE Integral Non-Linearity +25°C (fin=10kHz) — ±1 — LSB 0 to +70°C — ±1 — LSB –55 to +125°C — ±2 — LSB Differential Non-Linearity in = 10kHz) Offset Error +25°C (see Figure 3) — ±0.25 ±0.5 %FSR Gain Error +25°C (see Figure 3) — ±0.3 ±0.6 %FSR No Missing Codes
14 Bits –55 to +125°C
Output Coding Offset Bin. Logic Level Logic "1" V DD = +5V +3.8 — — Volts V DD = +3.3V +2.48 — — Volts Logic "0" V DD = +5V — — +0.5 Volts V DD = +3.3V — — +0.5 Volts Logic Loading "1" V DD = +5V — — –8 mA VDD = +3.3V — — –4 mA Logic Loading "0" V DD = +5V — — +8 mA V DD = +3.3V — — +4 mA Internal Reference Voltage, +25°C +1.5 +1.55 +1.6 Volts 0 to +70°C +1.5 +1.55 +1.6 Volts External Current — — 5 mA DYNAMIC PERFORMANCE MIN. TYP . MAX. UNITS Total Harm. Distort. (–0.5dB) dc to 500kHz — –81 –77 dB 500kHz to 10MHz — –80 –74 dB Signal-to-Noise Ratio (w/o distortion, –0.5dB dc to 500kHz 73 75 — dB 500kHz to 10MHz 73 75 — dB Signal-to-Noise Ratio (and distortion, –0.5dB) dc to 500kHz 71 74 — dB 500kHz to 10MHz 71 74 — dB Spurious Free Dyn. Range~ dc to 500kHz — –83 –80 dB 500kHz to 10MHz — –82 –76 dB T wo-tone IMD Distortion (f in = 9.68MHz, fs = 20MHz, –0.5dB) — –78 — dB Input Bandwidth (–3dB) Small Signal (–20dB input) — 25 — MHz Large Signal (–0.5dB input) — 25 — MHz Aperture Delay Time — — ±10 ns Aperature Uncertainty — — 5 ps S/H Acq. Time, (to ±0.003%FSR) Step input — — 25 ns Feedthrough Rejection in = 10MHz) — 85 — dB Noise — 250 — μVrms TIMING SPECIFICATIONS Conversion Rate 1 — 20 MHz Start Convert High 20 25 500 ns Start Convert Low 20 25 500 ns Start Convert to EOC Delay 2 6 10 ns EOC to Data Valid Delay 0 7 12 ns Output Enable Delay 1 6 13 ns Output Disable Delay 1 6 13 ns POWER REQUIREMENTS Power Supply Ranges –5V EE Supply –5.25 –5.0 –4.75 Volts +5V CC Supply +4.75 +5.0 +5.25 Volts V DD Supply +3.0 +5.0 V CC Volts Power Supply Currents –5V EE Supply –100 –89 — mA +5V CC Supply — +230 +245 mA V DD Supply — +2.0 +5.0 mA Power Dissipation — 1.6 1.7 Watts Power Supply Rejection — — ±0.01 %FSR%V PHYSICAL/ENVIRONMENTAL Oper. Temp. Range, Ambient ADSD-1420S 0 — +70 °C ADSD-1420S-EX –55 — +125 °C Storage Temperature Range –65 — +150 °C Package T ype 40-pin, SMT TDIP ABSOLUTE MAXIMUM RATINGS PARAMETERS LIMITS UNITS +5VCC Supply (Pins 2, 39) 0 to +6 Volts –5VEE Supply (Pins 9, 32) 0 to –6 Volts VDD Supply (Pin 12) –0.3 to (V CC +0.3) Volts Digital Inputs (Pins 10, 11, 30, 31) –0.3 to (V DD +0.3) Volts Analog Input (Pins 1, 40) ±7 Volts Lead Temp. (10 seconds) +300 °C Footnote: ~ Same specification as In-Band Harmonics and Peak Harmonics. FUNCTIONAL SPECIFICATIONS (TA = +25°C, VCC = +5V , VDD = +5V , VEE = –5V , 20MSPS sampling rate,Vin = ±2.5V and a minimum 7 minute warmup unless otherwise specified.)
- Rated performance requires using good high-frequency cir-
and digital ground separately to the power supplies. Figure 2. ADSD-1420S Timing Diagram
- Connect the converter per Figure 3. Apply a pulse of 50
used on the outputs for calibration purposes.
- Zero (Offset) Adjustments
- Repeat above step for Analog Input B (Pin 40). Use trimpot
R2 for the zero (Offset) adjustment .
- T o confirm proper operation of the device, vary the precision
each device are listed in their respective specification tables. greatly help reduce the package temperature. Figure 3. ADSD-1420S Connection Diagram ENABLE B (Pin 31) low for respective analog inputs A or B. See timing diagram for details.
£{Óä- Page 5 of 5 C&D T echnologies (DATEL), Inc.
11 Cabot Boulevard, Mansfield, MA 02048-1151
www.cd4power.com E-mail: sales@cdtechno.com DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses TEL logo is a registered DATEL, Inc. trademark. C&D T echnologies (NCL), Ltd. Milton Keynes, England T el: +44 (0) 1908.615232 E-mail: mk@cdtechno.com C&D T echnologies (DATEL) S.a.r.l. Montigny Le Bretonneux, France C&D T echnologies (DATEL) GmbH München, Germany T el: +49 (0) 89.544334.0 E-mail: munich@cdtechno.com C&D T echnologies KK T okyo and Osaka, Japan C&D T echnologies (DATEL) China Shanghai, People’s Republic of China T el: +86.50273678 E-mail: shanghai@cdtechno.comISO 9001:2000 REGISTERED www.cd4power.com DS-0567 011/06 MODEL NUMBER OPERATING TEMP . RANGE ADSD-1420S 0 to +70°C ADSD-1420S-EX –55 to +125°C
ORDERING INFORMATION
MECHANICAL DIMENSIONS INCHES (mm) Contact C&D T echnologies (Datel) for high-reliability versions