ADS803 TI | Alldatasheet
Document overview
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Technical content
12-Bit, 5MHz Sampling ANALOG-TO-DIGITAL CONVERTER
FEATURES
G HIGH SFDR: 82dB at NYQUIST G HIGH SNR: 69dB G LOW POWER: 115mW G LOW DLE: 0.25LSB G FLEXIBLE INPUT RANGE G OVER-RANGE INDICATOR
APPLICATIONS
G IF AND BASEBAND DIGITIZATION G CCD IMAGING SCANNERS G TEST INSTRUMENTATION
DESCRIPTION
The ADS803 is a high-speed, high dynamic range, 12-bit pipelined Analog-to-Digital (A/D) converter. This converter includes a high-bandwidth track-and-hold that gives excel- lent spurious performance up to and beyond the Nyquist rate. This high-bandwidth, linear track-and-hold minimizes har- monics and has low jitter, leading to excellent SNR perfor- mance. The ADS803 is also pin-compatible with the 10MHz ADS804 and the 20MHz ADS805. The ADS803 provides an internal reference and can be programmed for a 2Vp-p input range for the best spurious performance and ease of driving. Alternatively, the 5Vp-p input range can be used for the lowest input referred noise of 0.09LSBs rms giving superior imaging performance. There is also a capability to set the input range in between the 2Vp-p and 5Vp-p input ranges or to use an external reference. The ADS803 also provides an over-range indicator flag to indicate an input range that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of the front- end gain-ranging circuitry. The ADS803 employs digital error-correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for communications, medical imaging, video, and test instrumentation applications. The ADS803 is avail- able in an SSOP-28 package. 12-Bit Pipelined ADC Reference and Mode Select Reference Ladder and Driver Timing Circuitry Error Correction Logic 3-State OutputsT & H D11
- •• CLK+VS ADS803 VDRV OESEL REFBVREFREFT INVIN IN CM OVR ADS803 SBAS074B – JANUARY 1997 – REVISED SEPTEMBER 2002 www.ti.com Copyright © 1997, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. ADS803E
SBAS074Bwww.ti.com ABSOLUTE MAXIMUM RATINGS (1)
ELECTRICAL CHARACTERISTICS
At TA = full specified temperature range, VS = +5V, specified input range = 1.5V to 3.5V, single-ended input and sampling rate = 5MHz, unless otherwise specified. ADS803E PARAMETER CONDITIONS MIN TYP MAX UNITS RESOLUTION 12 Tested Bits SPECIFIED TEMPERATURE RANGE –40 +85 °C CONVERSION CHARACTERISTICS Sample Rate 10k 5M Samples/s Data Latency 6 Clk Cycles ANALOG INPUT Single-Ended Input Range 1.5 3.5 V Standard Optional Single-Ended Input Range 0 5 V Common-Mode Voltage 2.5 V Standard Optional Common-Mode Voltage 1V Input Capacitance 20 pF Track-Mode Input Bandwidth –3dBFS Input 270 MHz DYNAMIC CHARACTERISTICS Differential Linearity Error (Largest Code Error) f = 500kHz ±0.25 ±0.75 LSB No Missing Codes Tested Spurious-Free Dynamic Range(1) f = 2.48MHz (–1dB input) 74 82 dBFS (2) 2-Tone Intermodulation Distortion(3) 74 dBc f = 1.8M and 1.9M (–7dBFS each tone) Signal-to-Noise Ratio (SNR) f = 2.48MHz (–1dB input) 66.5 69 dB Signal-to-(Noise + Distortion) (SINAD) f = 2.48MHz (–1dB input) 65 68 dB Effective Number of Bits at 2.48MHz(4) 11 Bits Input Referred Noise 0V to 5V Input 0.09 LSBs rms 1.5V to 3.5V Input 0.23 LSBs rms Integral Nonlinearity Error f = 500kHz ±1 ±2 LSB Aperture Delay Time 1n s Aperture Jitter 4 ps rms Over-Voltage Recovery Time 1.5 • FS Input 2 ns Full-Scale Step Acquisition Time 50 ns SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR (1) RANGE MARKING NUMBER MEDIA, QUANTITY ADS803E SSOP-28 DB –40 °C to +85°C ADS803E ADS803E Rails, 48 " """ " ADS803E/1K Tape and Reel, 1000 NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. PACKAGE/ORDERING INFORMATION ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degrada- tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
SBAS074B www.ti.com ELECTRICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, VS = +5V, specified input range = 1.5V to 3.5V, single-ended input and sampling rate = 5MHz, unless otherwise specified. ADS803E PARAMETER CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS Logic Family CMOS Compatible Convert Command Start Conversion Rising Edge of Convert Clock High Level Input Current (V IN = 5V)(5) 100 µA Low Level Input Current (VIN = 0V) ±10 µA High Level Input Voltage +3.5 V Low Level Input Voltage +1.0 V Input Capacitance 5p F DIGITAL OUTPUTS Logic Family CMOS/TTL Compatible V Logic Coding Straight Offset Binary Low Output Voltage (I OL = 50µA) 0.1 V Low Output Voltage (I OL = 1.6mA) 0.4 V High Output Voltage (I OH = 50µA) +4.5 V High Output Voltage (I OH = 0.5mA) +2.4 V 3-State Enable Time OE = L 20 40 ns 3-State Disable Time OE = H 2 10 ns Output Capacitance 5p F ACCURACY (5Vp-p Input Range) fS = 2.5MHz Zero Error (Referred to –FS) At 25 °C 0.2 ±1.5 %FS Zero Error Drift (Referred to –FS) ±5 ppm/ °C Gain Error(6) At 25°C ±2.0 %FS Gain Error Drift(6) ±15 ppm/ °C Gain Error(7) At 25°C ±1.5 %FS Gain Error Drift(7) ±15 ppm/ °C Power-Supply Rejection of Gain ∆VS = ±5% 60 82 dB Reference Input Resistance 1.6 k Ω Internal Voltage Reference Tolerance (VREF = 2.5V) At 25°C ±35 mV Internal Voltage Reference Tolerance (VREF = 1.0V) At 25°C ±14 mV POWER-SUPPLY REQUIREMENTS Supply Voltage: +VS Operating +4.7 +5.0 5.3 V Supply Current: +IS Operating 23 27 mA Power Dissipation Operating 115 135 mW Thermal Resistance, θJA SSOP-28 50 °C/W NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to full-scale. (3) 2-tone intermodulation distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the 2-tone fundamental envelope. (4) Effective
SBAS074Bwww.ti.com PIN CONFIGURATION PIN DESIGNATOR DESCRIPTION
1 OVR Over-Range Indicator
2 B1 Data Bit 1 (MSB)
3 B2 Data Bit 2
4 B3 Data Bit 3
5 B4 Data Bit 4
6 B5 Data Bit 5
7 B6 Data Bit 6
8 B7 Data Bit 7
9 B8 Data Bit 8
10 B9 Data Bit 9
11 B10 Data Bit 10
12 B11 Data Bit 11
13 B12 Data Bit 12 (LSB)
14 CLK Convert Clock Input
15 OE Output Enable
17 GND Ground
18 SEL Input Range Select
REF Reference Voltage Select
20 REFB Bottom Reference
21 CM Common-Mode Voltage
22 REFT Top Reference
23 IN Complementary Analog Input
24 GND Analog Ground
25 IN Analog Input (+)
26 GND Analog Ground
28 VDRV Output Driver Voltage
6 Clock Cycles
N – 6N – 5N – 4N – 3N – 2N – 1 N N + 1Data Out Clock Analog In N N + 1 N + 2 N + 3 N + 4 N + 5 N + 6 N + 7 TIMING DIAGRAM SYMBOL DESCRIPTION MIN TYP MAX UNITS tCONV Convert Clock Period 200 1 • 105(ns) ns tL Clock Pulse LOW 96 99 ns tH Clock Pulse HIGH 96 99 ns tD Aperture Delay 3 ns t1 Data Hold Time, CL = 0pF 3.9 ns t2 New Data Delay Time, CL = 15pF max 12 ns OVR B10 B11 B12 CLK VDRV S GND IN GND IN REFT CM REFB VREF SEL GND S OE ADS803
SBAS074B www.ti.com TYPICAL CHARACTERISTICS At TA = full specified temperature range, VS = +5V, specified input range = 1.5V to 3.5V, and single-ended input and sampling rate = 5MHz, unless otherwise specified. SPECTRAL PERFORMANCE Frequency (MHz) Amplitude (dB) –20 –40 –60 –80 –100 –120 fIN = 500kHz SPECTRAL PERFORMANCE Frequency (MHz) Amplitude (dB) –20 –40 –60 –80 –100 –120 fIN = 2.48MHz FREQUENCY SPECTRUM Frequency (MHz) Magnitude (dBFSR) –20 –40 –60 –80 –100 –120 f1 = 1.8MHz at –7dB f2 = 1.9MHz at –7dB IMD (3) = –74dBc DIFFERENTIAL LINEARITY ERROR Output Code DLE (LSB) 0 1024 2048 3072 4096 1.0 0.5 –0.5 –1.0 fIN = 500kHz INTEGRAL LINEARITY ERROR Output Code ILE (LSB) 0 1024 2048 3072 4096 4.0 2.0 –2.0 –4.0 fIN = 500kHz 100 SWEPT POWER SFDR SFDR (dBFS, dBc) Input Amplitude (dBFS) dBFS dBc fIN = 2.48MHz
SBAS074Bwww.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, VS = +5V, specified input range = 1.5V to 3.5V, and single-ended input and sampling rate = 5MHz, unless otherwise specified. DYNAMIC PERFORMANCE vs INPUT FREQUENCY SFDR, SNR (dBFS) 0.1 1 Frequency (MHz) SFDR SNR DYNAMIC PERFORMANCE vs INPUT FREQUENCY (Differential Input, VIN = 5Vp-p) SFDR, SNR (dBFS) 0.1 1 Frequency (MHz) SFDR SNR 0.40 0.30 0.20 0.10 DIFFERENTIAL LINEARITY ERROR vs TEMPERATURE DLE (LSB) –50 –25 0 25 50 75 100 Temperature (°C) fIN = 500kHz fIN = 2.48MHz SPURIOUS-FREE DYNAMIC RANGE vs TEMPERATURE SFDR (dBFS) –50 –25 0 25 50 100 75 Temperature (°C) fIN = 500kHz fIN = 2.48MHz SIGNAL-TO-NOISE RATIO AND SIGNAL-TO-(NOISE + DISTORTION) vs TEMPERATURE SINAD, SNR (dBFS) –50 –25 0 25 50 75 100 Temperature (°C) fIN = 2.48MHz fIN = 2.48MHz fIN = 500kHz fIN = 500kHz SNR SINAD 117 116 115 114 POWER DISSIPATION vs TEMPERATURE Power (mW) –50 –25 0 25 50 100 75 Temperature (°C)
SBAS074B www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = full specified temperature range, VS = +5V, specified input range = 1.5V to 3.5V, and single-ended input and sampling rate = 5MHz, unless otherwise specified. 800k 600k 400k 200k OUTPUT NOISE HISTOGRAM (DC Input, V IN = 2Vp-p) Counts N – 2N – 1 N N + 1 N + 2 Code 800k 600k 400k 200k OUTPUT NOISE HISTOGRAM (DC Input, V IN = 5Vp-p Range) Counts N – 2N – 1 N N + 1 N + 2 Code
APPLICATION INFORMATION
The ADS803 allows its analog inputs to be driven either single-ended or differentially. The focus of the following discussion is on the single-ended configuration. Typically, its implementation is easier to achieve and the rated specifica- tions for the ADS803 are characterized using the single- ended mode of operation. AC-COUPLED INPUT CONFIGURATION Given in Figure 1 is the circuit example of the most common interface configuration for the ADS803. With the V REF pin connected to the SEL pin, the full-scale input range is defined to be 2Vp-p. This signal is ac-coupled in single-ended form to the ADS803 using the low-distortion voltage-feedback amplifier OPA642. As is generally necessary for single- supply components, operating the ADS803 with a full-scale input signal swing requires a level-shift of the amplifier’s zero-centered analog signal to comply with the A/D converter’s input range requirements. Using a DC blocking capacitor between the output of the driving amplifier and the converter’s input, a simple level-shifting scheme can be implemented. In this configuration, the top and bottom references (REFT and REFB) provide an output voltage of +3V and +2V, respec- tively. Here, two resistor pairs (2 • 2kΩ ) are used to create a common-mode voltage of approximately +2.5V to bias the inputs of the ADS803 (IN, IN) to the required DC voltage. FIGURE 1. AC-Coupled Input Configuration for 2Vp-p Input Swing and Common-Mode Voltage at +2.5V Derived from Internal
FIGURE 2. DC-Coupled, Single-Ended Input Configuration with DC-Level Shift. noise thus help improving the SNR performance. the ground centered input signal with a required DC offset. +1.25V, resulting in a DC output voltage of +2.5V. corrected for by adjusting the values of resistors R1 and R2. impedance match (e.g., RT = n2 • RG ).
FIGURE 12. Recommended Bypassing for Analog Supply Pins.
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) ADS803E Active Production SSOP (DB) | 28 50 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 ADS803E ADS803E.B Active Production SSOP (DB) | 28 50 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 ADS803E ADS803E/1K Active Production SSOP (DB) | 28 1000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 ADS803E ADS803E/1K.B Active Production SSOP (DB) | 28 1000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 ADS803E ADS803E/1K1G4.B Active Production SSOP (DB) | 28 1000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 ADS803E (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS803E/1K SSOP DB 28 1000 350.0 350.0 43.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) ADS803E DB SSOP 28 50 530 10.5 4000 4.1 ADS803E.B DB SSOP 28 50 530 10.5 4000 4.1 Pack Materials-Page 3
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