ADS8028_V01 TI | Alldatasheet
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PD□RST/ TM_BUSY ADCSH DVDDAVDD ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 12-Bit,1-MSPS,8-Channel,SARADC withInternalReferenceandInternalTemperatureSensor Check forSamples: ADS8028 1FEATURES DESCRIPTION The ADS8028 isa 12-bitanalog-to-digitalconverter 23• OutstandingPerformance: (ADC),capableofoperatingatsamplingspeeds up to– Throughput:Up to1 MSPS 1 MSPS. The device is based on a successive – No MissingCodes: 12 Bits approximationregister(SAR) core and providesan inherentsample-and-hold(SH)front-end.– INL:±0.5LSB – SNR: 72 dB Inadditiontohavingeightanaloginputchannels,the ADS8028 offersan internaltemperaturesensorwith• HighlyIntegrated: 0.25°C resolutionand an internalvoltagereference.A– EightAnalog Inputs nine-channelinternalmultiplexerenables multiple – High-ResolutionInternalTemperature channels to be selected (includingthe internal Sensor temperaturesensor)thatareindefinitelyscanned ina sequentialmanner. A simple SPI-compatibleserial– Nine-ChannelMultiplexerwithChannel interfaceprovideseasy communicationand controlSequencer between the deviceand host controller.The digital– Low-DriftInternalVoltageReference supplycan operatefrom 1.65 V to 5.25 V, enabling
- Wide Supply Range: directinterfacewitha wide range of processorsand controllers.– Analog Supply (AVDD): 2.7V to5.25V At fullspeed of 1 MSPS, the ADS8028 dissipates– DigitalSupply (DVDD): 1.65V to5.25V only17 mW. The deviceoffersflexiblepower-down• Low Power: modes to save power when conversionsare not– 17 mW at1 MSPS being performed. The ADS8028 performance is – FlexiblePower-Down Modes specifiedover the extended industrialtemperature rangeof–40°C to+125°C.• SPI™ -CompatibleSerialInterface:20 MHz The ADS8028 isidealfordemanding measurement• Small Footprint:4-mm × 4-mm, Thin QFN-20 applications,such as sensor output monitoring, power-supplymonitoring,and printedcircuitboardAPPLICATIONS (PCB) hot-spotanalysis,and isavailableina small• Programmable Logic Controls(PLCs) form-factorQFN-20 package.
- IndustrialProcess Controls(IPCs)
- Telecommunications
- Power-Supply Monitoring
- PCB Hot-SpotAnalysis
- Battery-PoweredApplications Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2SPI isa trademarkofMotorola. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2011–2012,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications.
ORDERING INFORMATION
PRODUCT PACKAGE-LEAD DESIGNATOR PACKAGE MARKING TRANSPORT MEDIA Tape and Reel ADS8028 QFN-20 RTJ ADS8028IRTJ Tape and Reel ABSOLUTE MAXIMUM RATINGS (1) Over operatingfree-airtemperaturerange,unlessotherwisenoted. VALUE UNIT AVDD toDGND, AGND –0.3to+7 V DVDD toDGND, AGND –0.3toAVDD + 0.3 V DGND toAGND –0.3to+0.3 V Analoginput(AIN0toAIN7)toAGND –0.3toAVDD + 0.3 V Digitalinput(CS, DIN,SCLK, PD/RST) toDGND –0.3toDVDD + 0.3 V Digitaloutput(DOUT, TM_BUSY) toDGND –0.3toDVDD + 0.3 V REF toAGND AVDD + 0.3 V Inputcurrenttoany pin(exceptsupply),continuous ±10 mA Operatingtemperaturerange –40 to+125 °C Storagetemperaturerange –65 to+150 °C Maximum junctiontemperature +150 °C Human body model (HBM) ±2000 VElectrostaticdischarge (ESD) ratings: Charge devicemodel (CDM) ±500 V (1) Stressesabove theseratingsmay cause permanentdamage. Exposuretoabsolutemaximum conditionsforextendedperiodsmay degradedevicereliability.These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thosespecifiedisnotimplied.
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www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012
ELECTRICAL CHARACTERISTICS
Minimum and maximum specificationsapplyfromTA = –40°C to+125°C. TypicalspecificationsareatTA = +25°C. internal,unlessotherwisenoted. ADS8028 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUTS AINx Analoginputvoltage 0 VREF V Insample mode 40 pF Inputcapacitance Inholdmode 8 pF Inputbiascurrent ±0.01 µA SAMPLING DYNAMICS SCLK = 20 MHz 660 700 ns Conversiontime TSENSE temperaturesensorchannel 100 µs Acquisitiontime Full-scalestepinput 100 ns SCLK = 20 MHz, AINx channel 1 MSPS Throughputrate SCLK = 20 MHz, temperature 10 kSPSmeasurement channel Aperturedelay 14 ns At3 dB 30 MHz Full-powerbandwidth At0.1dB 10 MHz Stepresponse 100 ns Overloadrecovery 100 ns DC ACCURACY Resolution 12 Bits No missingcodes 12 Bits INL Integralnonlinearity ±0.5 ±1 LSB DNL Differentialnonlinearity ±0.5 ±0.99 LSB Offseterror ±2 ±4.5 LSB Offseterrormatching ±2.5 ±4.5 LSB Offsettemperaturedrift 4 ppm/°C Gain error ±1 ±4 LSB Gain errormatching ±1 ±2.5 LSB Gain temperaturedrift 0.5 ppm/°C DYNAMIC PERFORMANCE SNR Signal-to-noiseratio 50-kHzinput,–0.5dBFS 70 72 dB SINAD Signal-to-noiseand distortionratio 50-kHzinput,–0.5dBFS 70 71 dB THD Totalharmonicdistortion 50-kHzinput,–0.5dBFS –82 –77 dB SFDR Spurious-freedynamicrange 50-kHzinput,–0.5dBFS 77.5 84 dB fA = 40.1kHz,fB = 41.5kHz IMD Intermodulationdistortion Second-orderterms –84 dB Third-orderterms –93 dB Channel-to-channelisolation fIN = 50 kHz,fNOISE = 60 kHz –100 dB INTERNAL REFERENCE OUTPUT Referenceoutputvoltage ±0.3% maximum at+25°C 2.4925 2.5 2.5075 V Long-termstability 150 ppm Outputvoltagehysteresis 50 ppm Internalreferenceoutputimpedance 1 Ω Internalreferencetemperaturecoefficient 12 35(1) ppm/°C Internalreferencenoise 10-MHz bandwidth 60 µVRMS (1) Sample testedduringinitialreleasetoensurecompliance. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):ADS8028
SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Minimum and maximum specificationsapplyfromTA = –40°C to+125°C. TypicalspecificationsareatTA = +25°C. internal,unlessotherwisenoted. ADS8028 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT EXTERNAL REFERENCE INPUT Externalreferenceinputvoltagerange 1 AVDD V DC leakagecurrent ±0.01 ±1 µA TEMPERATURE SENSOR Operatingrange –40 +125 °C Accuracy TA = –40°C to+125°C ±1 ±3 °C Resolution LSB size 0.25 °C DIGITAL INPUT AND OUTPUT VIH 0.7DVDD V VIL 0.3DVDD V Logiclevel VOH SDO load= 20 pF,ISOURCE = 500 µA 0.8DVDD V VOL SDO load= 20 pF,ISINK = 500 µA 0.2DVDD V Inputcapacitance 5 pF IIN Inputcurrent 0 V < VDigitalInput< DVDD ±0.01 ±1 µA POWER-SUPPLY REQUIREMENTS Internalreferencemode 2.7 3.0 5.25 Externalreferencemode with 2.7 3.0 5.25AVDD Analogsupply VEXT_REF ≤ 2.7V V Externalreferencemode with VEXT_REF 5.25VEXT_REF > 2.7V DVDD Digitalsupply 1.65 3.0 5.25 V SUPPLY CURRENT ITOTAL Totalcurrent(2) AVDD = 3.6V,DVDD = 3.6V 5.8 6.3 mA Operational AVDD = 5.25V,DVDD = 5.25V 7 7.5 mA Normal mode AVDD = 3.6V,DVDD = 3.6V 4.1 4.6 mA Static AVDD = 5.25V,DVDD = 5.25V 4.5 5 mA STANDBY mode AVDD = 3.6V,DVDD = 3.6V 1.5 2.5 mA Power-down mode AVDD = 3.6V,DVDD = 3.6V 1 10 µA (2) ITOTAL isthetotalcurrentflowinginAVDD and DVDD.
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www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 ELECTRICAL CHARACTERISTICS (continued) Minimum and maximum specificationsapplyfromTA = –40°C to+125°C. TypicalspecificationsareatTA = +25°C. internal,unlessotherwisenoted. ADS8028 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER CONSUMPTION Power consumption AVDD = DVDD = 3.0V 17 18.9 mW Operational AVDD = DVDD = 3.6V 20.9 22.7 mW Normal mode AVDD = DVDD = 5.25V 36.8 39.4 mW AVDD = DVDD = 3.6V 14.8 16.6 mW Static AVDD = DVDD = 5.25V 23.6 26.2 mW STANDBY mode AVDD = DVDD = 3.6V 5.4 9 mW Power-down mode AVDD = DVDD = 3.6V 3.6 36 µW TEMPERATURE Operatingtemperaturerange –40 +125 °C THERMAL INFORMATION ADS8028 THERMAL METRIC (1) RTJ (QFN) UNITS
20 PINS
θJA Junction-to-ambientthermalresistance 32.8 θJCtop Junction-to-case(top)thermalresistance 27.8 θJB Junction-to-boardthermalresistance 9.3 °C/W ψJT Junction-to-topcharacterizationparameter 0.3 ψJB Junction-to-boardcharacterizationparameter 9.3 θJCbot Junction-to-case(bottom)thermalresistance 1.9 (1) Formore informationabouttraditionaland new thermalmetrics,see theIC Package ThermalMetricsapplicationreport,SPRA953 . Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):ADS8028
tSU_CSCK SCLK ADD3 WRITE REPEAT AIN0 AIN1 AIN2 AIN3 EXT_REF STANDBY TMP_AVG ADD2 ADD1 ADD0 DB11 DB10 DB2 DB1 DB0 tPH_CSZ tCONV tDV_CSDO 3-State 54321 13 tPH_SCLKtSCLK tD_CKDO tHT_CKDO tHT_CKDItSU_CKDI 14 15 16 3-State tPL_SCLK tDZ_CKDO tACQ ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com PARAMETER MEASUREMENT INFORMATION TIMING CHARACTERISTICS Figure1. SerialInterfaceTiming Diagram Timing Requirements forFigure1(1) ADS8028 PARAMETER DESCRIPTION TEST CONDITIONS MIN TYP MAX UNIT fSCLK Externalserialclockfrequency 20 MHz tSCLK Externalinterfaceclocktimeperiod 50 ns tPH_SCLK SCLK highpulsewidth 0.4tSCLK 0.6tSCLK ns tPL_SCLK SCLK lowpulsewidth 0.4tSCLK 0.6tSCLK ns Conversiontime: tSU_CSCK + 13 tSCLK ns tCONV ForchannelsAIN0 toAIN7 fSCLK = 20 MHz 700 ns Forinternaltemperaturesensormeasurement 100 µs tPH_CSZ CS highpulsewidth 6 ns tACQ Acquisitiontime(forchannelAINx) fSCLK = 20 MHz 100 ns tSU_CSCK Setuptime:CS toSCLK fallingedge 10 ns tDV_CSDO Delaytimebetween CS fallingedge toDOUT enabled 17 ns DVDD = 1.65V to3 V 32 ns Delaytimebetween SCLK fallingedge to(new)datatD_CKDO DVDD = 3 V to3.6V 29 nsavailableon DOUT DVDD = 3.6V to5.25V 28 ns Holdtime:SCLK fallingedge to(previous)datavalidontHT_CKDO 10 nsDOUT Delaytimebetween 16thSCLK fallingedge toDOUTtDZ_CKDO 12 27 nsgoingtohigh-impedance Delaytimebetween CS goinghightoDOUT goingtohigh-tDZ_CSDO 26 nsimpedance tSU_CKDI DIN setuptimebeforeSCLK fallingedge 5 ns tHT_CKDI DIN holdtimeafterSCLK fallingedge 4 ns tACQ_TMP TM_BUSY fallingedge toCS fallingedge 100 ns tPU_STANDBY Power-uptimeaftercoming outofSTANDBY mode 1 µs Internalreferencemode,tPOWER_UP Power-uptimeaftercoming outofpower-down mode 6 ms10-µF capacitoron REF pin DOUT = 15 pF ||100 kΩ,and tR = tF = 5 ns (10% to90% ofDVDD) and timedfroma voltagelevelof0.5DVDD, unlessotherwise noted.
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TM_BUSY CS Thermal□Pad AIN2 AGND AIN1 REF AIN0 NC PD□RST / DGND DVDD AVDD ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 PIN CONFIGURATIONS RTJ PACKAGE (1) QFN-20 (TOP VIEW) (1)The exposed thermalpad on the bottom of the package must be solderedto the printedcircuitboard (PCB) ground forproper functionalityand heatdissipation. NOTE: NC = no connection. PIN ASSIGNMENTS NAME PIN FUNCTION DESCRIPTION AGND 6 Supply Analogground AIN0 18 Analoginput Analoginputchannel0 AIN1 19 Analoginput Analoginputchannel1 AIN2 20 Analoginput Analoginputchannel2 AIN3 1 Analoginput Analoginputchannel3 AIN4 2 Analoginput Analoginputchannel4 AIN5 3 Analoginput Analoginputchannel5 AIN6 4 Analoginput Analoginputchannel6 AIN7 5 Analoginput Analoginputchannel7 AVDD 10 Supply ADC operationsupplyvoltage CS 11 Digitalinput Chipselect;activelowlogicinput DGND 9 Supply Digitalground DIN 13 Digitalinput SPI datainput DOUT 14 Digitaloutput SPI dataoutput DVDD 16 Supply ADC interfacesupplyvoltage Thispinhas no internalconnection.Any passivecomponent connectedtothisNC 8 — pindoes notaffectdevicefunctionality. PD/RST 17 Digitalinput Dualfunctionpinforpower-down and resetoperation;activelowlogicinput REF 7 Analoginput/output ADC internalreferenceoutputorADC externalreferenceinput SCLK 15 Digitalinput SPI clock Exposed thermalpad;thispinshouldbe solderedtothePCB groundforproperThermalpad — Thermalpad functionalityand heatdissipation Busy output;thispintransitionshighand remainshighduringconversionforTM_BUSY 12 Digitalinput temperaturesensorinput Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):ADS8028
−140 −120 −100 −80 −60 −40 −20 0 50 100 150 200 250 300 350 400 450 500 Input Frequency (kHz) Amplitude (dB) fSAMPLE = 1.176 MHz fIN = 41.68 kHz fSCLK = 20 MHz SNR = 72.7 dB THD = −93.6 dB G000 −0.6 −0.4 −0.2 0.2 0.4 0.6 1 1.5 2 2.5 3 3.5 4 4.5 5 Maximum INL Minimum INL Reference Voltage (V) Intergral Nonlinearity (LSB) AVDD = 5 V DVDD = 5 V External Reference Mode G001 −0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 0 512 1024 1536 2048 2560 3072 3584 4096 ADC Output Code (LSB) Intergral Nonlinearity (LSB) G002 −0.6 −0.4 −0.2 0.2 0.4 0.6 1 1.5 2 2.5 3 3.5 4 4.5 5 Maximum DNL Minimum DNL Reference Voltage (V) Differential Nonlinearity (LSB) AVDD = 5 V DVDD = 5 V External Reference Mode G003 −0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 0 512 1024 1536 2048 2560 3072 3584 4096 ADC Output Code (LSB) Differential Nonlinearity (LSB) G004 1 2 3 4 5 Reference Voltage (V) Effective Number Of Bits (ENOB) AVDD = 5 V DVDD = 5 V External Reference Mode G006 ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS AllplotsatTA = +25°C, AVDD = 3.0V,DVDD = 3.0V, fSAMPLE = 1 MHz, fSCLK = 20 MHz, and VREF = 2.5V internal,unlessotherwisenoted. TYPICAL FFT INL vs VREF Figure2. Figure3. TYPICAL ADC INL DNL vs VREF Figure4. Figure5. TYPICAL ADC DNL ENOB vs VREF Figure6. Figure7.
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0.5 1.5 2.5 −11 −9 −7 −5 −3 −1 1 3 5 7 9 11 Current Load (mA) Reference Voltage (V) G007 1 1.5 2 2.5 3 3.5 4 4.5 5 Reference Voltage (V) Signal to Noise and Distortion (dB) AVDD = 5 V DVDD = 5 V External Reference Mode G011 1k 10k 100k 500k Input Frequency (dB) Signal to Noise and Distortion (dB) R IN = 200Ω R IN = 100Ω R IN = 50Ω R IN = 33Ω R IN = 0Ω G012 −90 −85 −80 −75 −70 1k 10k 100k 500k Input Frequency (dB) Total Harmonic Distortion (dB) R IN = 200Ω R IN = 100Ω R IN = 50Ω R IN = 33Ω R IN = 0Ω G013 −140 −120 −100 −80 1k 10k 100k 1M 10M 100M Supply Ripple Frequency (Hz) Power −Supply Rejection Ratio (dB) G014 100 110 120 0 50 100 150 200 250 300 350 400 450 500 Input Frequency (dB) Channel−to−Channel Isolation Crosstalk (dB) G015 ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 TYPICAL CHARACTERISTICS (continued) AllplotsatTA = +25°C, AVDD = 3.0V,DVDD = 3.0V, fSAMPLE = 1 MHz, fSCLK = 20 MHz, and VREF = 2.5V internal,unlessotherwisenoted. VREF vs CURRENT LOAD SINAD vs VREF Figure8. Figure9. SINAD vs INPUT FREQUENCY FOR VARIOUS SOURCE THD vs INPUT FREQUENCY FOR VARIOUS SOURCE IMPEDANCES IMPEDANCES Figure10. Figure11. PSRR vs POWER-SUPPLY RIPPLE FREQUENCY CROSSTALK vs INPUT REQUENCY Figure12. Figure13. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):ADS8028
Throughput (kSPS) AVDD Power − Normal Operation Mode (mW) AVDD = 3 V DVDD = 3 V G016 0 200 400 600 800 1000 Throughput (kSPS) AVDD Power − Normal Operation Mode (mW) AVDD = 5 V DVDD = 5 V G017 AVDD, Analog Supply Voltage (V) AVDD Supply Current − Power Down Mode (uA) 125°C 85°C 25°C −40°C G018 0 200 400 600 800 1000 Throughput (kSPS) AVDD Supply Current − Normal Operation Mode (mA) AVDD = 3 V DVDD = 3 V G019 0 200 400 600 800 1000 Throughput (kSPS) AVDD Supply Current − Normal Operation Mode (mA) AVDD = 5 V DVDD = 5 V G020 −0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 −40 −15 10 35 60 85 110 125 Maximum DNL Minimum DNL Free−Air Temperature (°C) Differential Nonlinearity (LSB) G021 ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) AllplotsatTA = +25°C, AVDD = 3.0V,DVDD = 3.0V, fSAMPLE = 1 MHz, fSCLK = 20 MHz, and VREF = 2.5V internal,unlessotherwisenoted. AVDD POWER vs THROUGHPUT AVDD POWER vs THROUGHPUT (AVDD = 3 V) (AVDD = 5 V) Figure14. Figure15. AVDD CURRENT vs THROUGHPUTPOWER-DOWN CURRENT vs AVDD AT VARIOUS TEMPERATURES (AVDD = 3 V) Figure16. Figure17. AVDD CURRENT vs THROUGHPUT (AVDD = 5 V) DNL vs TEMPERATURE Figure18. Figure19.
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−0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 −40 −15 10 35 60 85 110 125 Maximum INL Minimum INL Free− Air Temperature (dB) Integral Nonlinearity (LSB) G022 −40 −15 10 35 60 85 110 125 Free−Air Temperature (°C) Offset Error (LSB) G024 −40 −15 10 35 60 85 110 125 Free−Air Temperature (°C) Gain Error (LSB) G025 AVDD, Analog Supply Voltage (V) Signal to Noise and Distortion (dB)DVDD = 1.8 V G026 −0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 Maximum DNL Minimum DNL AVDD, Analog Supply Voltage (V) Differential Nonlinearity (LSB) G027 −0.8 −0.6 −0.4 −0.2 0.2 0.4 0.6 0.8 Maximum INL Minimum INL AVDD, Analog Supply Voltage (V) Integral Nonlinearity (LSB) DVDD = 1.8 V G028 ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 TYPICAL CHARACTERISTICS (continued) AllplotsatTA = +25°C, AVDD = 3.0V,DVDD = 3.0V, fSAMPLE = 1 MHz, fSCLK = 20 MHz, and VREF = 2.5V internal,unlessotherwisenoted. INL vs TEMPERATURE OFFSET ERROR vs TEMPERATURE Figure20. Figure21. GAIN ERROR vs TEMPERATURE SINAD vs AVDD Figure22. Figure23. DNL vs AVDD INL vs AVDD Figure24. Figure25. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):ADS8028
AVDD, Analog Supply Voltage (V) Offset Error (LSB) DVDD = 1.8 V G030 AVDD, Analog Supply Voltage (V) Gain Error (LSB) DVDD = 1.8 V G031 100 105 110 0 100 200 300 400 500 Input Frequency (kHz) Memory Cross Talk (dB) G032 −40 −25 −10 5 20 35 50 65 80 95 110 125 −1.5 −0.5 0.5 1.5 Temperature (°C) Error in Temperature Measurement (°C) G034 0 20 40 60 80 100 Time (Seconds) Temperature Reading (°C) G034 ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) AllplotsatTA = +25°C, AVDD = 3.0V,DVDD = 3.0V, fSAMPLE = 1 MHz, fSCLK = 20 MHz, and VREF = 2.5V internal,unlessotherwisenoted. OFFSET ERROR vs AVDD GAIN ERROR vs AVDD Figure26. Figure27. CROSSTALK vs INPUT FREQUENCY TEMPERATURE SENSOR ACCURACY Figure28. Figure29. TEMPERATURE SENSOR RESPONSE TO THERMAL SHOCK – FROM ROOM TEMPERATURE INTO 50°C STIRRED OIL Figure30.
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S is□closed□during□sampling. S is□open□during□conversion. W W ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 OVERVIEW The ADS8028 isa 12-bitsuccessive-approximationregister(SAR) analog-to-digitalconverter(ADC) thatcan supportthroughputratesup to 1 MSPS. The devicefeaturesa 2.5-Vinternalreference,but can alsofunction withan externalreferencesource.The analoginputrangeis0 V toVREF .The devicesupportseightsingle-ended analoginputsand integratesan internaltemperaturesensor.A nine-channel(eightanaloginputsplustheinternal temperaturesensor)internalmultiplexerallowsselectionof multiplechannels to be scanned sequentially. Additionally,thisscan sequence can be repeatedindefinitelywithminimalintervention. The internaltemperaturesensorhas a resolutionof 0.25°C and measures the ADS8028 dietemperature.To measure thetemperatureofan externalheatsource,thermalresistanceshouldbe minimizedbetween theheat sourceand theADS8028 thermalpad (refertotheApplicationInformationsectionformore details). The ADS8028 consumes only17 mW of power at 1 MSPS and alsoprovideshardware (PD) and software (STANDBY) selectablelow-powermodes foroptimalpower usage. The deviceprovidesan SPI-compatibleserialinterfacethatcan operateup to20 MHz overa wide supplyrange (DVDD = 1.65V to5.25V).The ADS8028 operateswithone cyclelatency,thustheconversionresultperformed inone cyclecan be readoutinthesubsequentcycle. ANALOG INPUTS AND MULTIPLEXER The ADS8028 has eightsingle-endedanaloginputchannels(AIN0 to AIN7).Figure31 shows an equivalent circuitforeach analoginputpin.The two diodes,D 1 and D 2,provideelectrostaticdischarge(ESD) protectionfor theindividualanalogpins.These diodescan conductapproximately10 mA ofcurrentwithoutcausingirreversible damage tothedevice.Diode D 1 turnson when AINx isgreaterthanAVDD + 0.3V and diodeD 2 turnson when AINx islessthanAGND – 0.3V.Therefore,caremust be takentoalwaysensurethatEquation1 ismet. AGND – 0.3V < AINx < AVDD + 0.3V (1) Figure31. EquivalentAnalog InputCircuit CapacitorC PIN isapproximately8 pF. ResistorR S representsthesamplingswitchon-stateresistanceplusthe inputmultiplexeron-stateresistance.The totalresistanceisapproximately130 Ω.C SAMPLE istheADC sampling capacitor,typically40 pF. The ADS8028 containsa nine-channelinputmultiplexerthateitherallowsone oftheeightanaloginputchannels or the internaltemperaturesensor to be converted.Multiplechannelscan be convertedin a predetermined sequence;thissequence can be repeatedindefinitelywithappropriateControlRegistersettings(referto the Modes of Operationsectionformore details).On power-up,no channelisselectedforconversionand SDO returnsall'1's.One writecyclemust be executedtoselectthechannelsand starttheconversionprocess. In order to achieve specifiedsignal-to-noiseratio(SNR) and total-harmonic-distortion(THD) performance, especiallyathigherinputfrequencies,itisrecommended todriveeach analoginputpinwitha low impedance source.An externalamplifiercan alsobe used todrivetheinputpins.A simpleRC low-passfiltercan be used on the analog inputpins to reduce the inputsignalbandwidth and remove the noise components at higher frequencies(refertotheApplicationInformationsectionformore details). Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):ADS8028
New_Average_Result□= 7 (Previous_Average_Result)□+ 1 (Current_Result) ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com TEMPERATURE SENSOR The internaltemperaturesensor measures the ADS8028 die temperature.The temperaturesensor can be selectedforconversionby settingtheTSENSE bitintheControlRegisterto'1'.The TM_BUSY pingoes highas soon as thetemperaturesensorisselectedforconversionand remainshighuntiltheconversioniscompleted (100µs,max). The operatingtemperaturerange forthisinternaltemperaturesensorislimitedby the operatingtemperature rangeoftheADS8028 (–40°C to+125°C). Modes ofOperation The ADS8028 temperaturesensorcan operateintwo modes: normalmode and averagingmode. Normal Mode To operateinnormalmode (withouttheaveragingfeature),theTMP_AVG bitintheControlRegistershouldbe setto'0'and theTSENSE bitintheControlRegistershouldbe setto'1'.Outputdataare theresultofa single conversionperformedon thetemperaturesensor.Thismode isthedefaultmode ofoperationforthetemperature sensor.A singleconversionon thetemperaturesensortakes100 µs,max. Averaging Mode Inthismode, theADS8028 providesrollingaveragefilteringtoincreasetheaccuracyofthetemperaturesensor measurement.To activatethisfilter,theTMP_AVG bitintheControlRegistershouldbe setto'1'.Thisbitmust be setto'1'insubsequentwriteoperationsforthedurationofthefilteroperation.ResettingtheTMP_AVG bitto '0'resetsand deactivatesthefilterand placestheADS8028 ina normalmode ofoperation. When theTMP_AVG and TSENSE bitsarebothsetto'1',thetemperaturesensorisselectedand theconversion resultissenttothefilterblock.The filterblockoutputisgivenby Equation2: (2) Thisoutputcan be readduringthenextconversioncycle.Afterenablingtheaveragingfeature,thefirstADS8028 outputdataare thesame as thetemperaturesensorconversionresult.Averagingstartstakingeffectfrom the subsequentconversionperformedon thetemperaturesensor. Temperature Sensor Data Format The temperaturesensor,alongwiththeADC, gives0.25°C resolutionovertheoperatingtemperaturerange.The temperaturereadingfromtheADC isin12-bittwoscomplement format,as shown inTable1. Table1.Temperature Data Format TEMPERATURE (°C) DIGITAL OUTPUT –40 1111 0110 0000 –25 1111 1001 1100 –10 1111 1101 1000 –0.25 1111 1111 1111 0 0000 0000 0000 +0.25 0000 0000 0001 +10 0000 0010 1000 +25 0000 0110 0100 +50 0000 1100 1000 +75 0001 0010 1100 +100 0001 1001 0000 +105 0001 1010 0100 +125 0001 1111 0100
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T emperature□=□VEXT_REF ADC_Code 10 +□109.3 /c45273.15 Temperature = VEXT_REF ADC_Code 4096/c45 10 + 109.3 /c45273.15 Positive Temperature = ADC_Code Negative Temperature =
4096 ADC_Code/c45
www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 IftheoutputdataMSB is‘0’,thetemperaturecan be calculatedwithEquation3: where: VEXT_REF isthevalueoftheexternalreferencevoltage (3) IftheoutputdataMSB is‘1’,thetemperaturecan be calculatedwithEquation4: where: VEXT_REF isthevalueoftheexternalreferencevoltage (4) For a 2.5-Vreference(internalor external),Equation3 and Equation4 simplifytoEquation5 and Equation6, respectively. (5) (6) REFERENCE The ADS8028 can operatewitheitheran internalvoltagereferenceoran optionalexternalreference.The typeof referenceused issetby theEXT_REF bitintheControlRegister. The internalreferenceisselectedwhen theEXT_REF bitissetto'0'.A 2.5-Voutputoftheinternalreferenceis availableon theREF pin.A 10-µF decouplingcapacitorisrecommended between theREF and AGND pins.The referencecircuitrequires5.5 ms to charge the decouplingcapacitor.The internalreferenceis capable of sourcingup to2 mA ofcurrentand isdesignedtodrivetheADS8028. Itisrecommended tobufferthisoutputfor use elsewhereinthesystem. The ADS8028 can operatewithan externalreferencewhen theEXT_REF bitissetto'1'.An externalreference can be suppliedthroughtheREF pin.By default,theADS8028 powers up ininternalreferencemode and must be programmed tofunctionwithan externalreference.Untilsuch a time,theADS8028 draws additionalcurrent from the externalreferencesource.Thiscurrentislimitedto 20 mA, usinginternalprotectioncircuitry.Texas Instruments'REF5025 can be used as externalreferencesourcefortheADS8028. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):ADS8028
FSR 1□LSB/c45FSR/21□LSB Single-Ended□Analog□Input ADC□Code□(Hex) VIN ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com ADC TRANSFER FUNCTION The ADS8028 outputisinstraightbinaryformatforallanaloginputchannels(AIN0 to AIN7) and isintwos complement formatforthetemperaturesensorconversionresult.The transitioninoutputcode occursatevery LSB step.For theADS8028, LSB stepsizeisVREF /4096.The idealADS8028 transfercharacteristicforstraight binarycodingisshown inFigure32. Figure32. StraightBinaryTransferCharacteristic
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WRITE REPEAT CH0 CH1 CH2 CH3 EXT_REF STANDBY TMP_AVG ADD2 ADD1 ADD0 DB11 DB10 DB2 DB1 DB0 3-State 54321 13 14 15 16 3-State Start of Sampling ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 SERIAL INTERFACE Figure33 shows a detailedADS8028 serialinterfacetimingdiagram.The deviceuses theserialclock(SCLK) for internalconversionand fordatatransferintoand outofthedevice. The CS signaldefinesone frame ofconversionand serialtransfer.The ADS8028 samples theanaloginputon theCS fallingedge.The sample-and-holdcircuitentersintoholdmode and theserialdatabus comes outof3- state.The subsequent16 SCLK cyclesare used forconversionand datatransfer.As shown inFigure33,the MUX selectstheprogrammed channeland thesample-and-holdcircuitentersintoholdmode on the14thSCLK fallingedge. The DOUT pin goes back to 3-stateon the 16th SCLK fallingedge or on the CS risingedge (whicheveroccursfirst).For a validreadorwriteoperationtotheADS8028, 16 clocksmust be providedon the SCLK pinbetween theCS fallingedge tothesubsequentCS risingedge.IftheCS risingedge occursbefore16 SCLKs have elapsed,the conversionisterminated,the DOUT linegoes back into3-state,and the Control Registerisnotupdated. Figure33. SerialInterfaceTiming Diagram RefertoTable3 fortheADS8028 outputdataformat.BitsADD[3:0]specifythechannelselectedforconversion and bitsDB[11:0]aretheconversionresultfortheselectedchannel. A CS fallingedge bringstheDOUT pinoutof3-stateand alsooutputstheADD3 biton theDOUT pin.The next 15 bitsofdata(ADD2 toDB0) areclockedouton thesubsequentSCLK fallingedges.Therefore,thefirstSCLK fallingedge outputsthe ADD2 biton DOUT and can also be used by the microcontrolleror digitalsignal processor(DSP) toreadthefirstbit(ADD3).Similarly,bitDB0 isclockedouton the15thSCLK fallingedge and can be readby themicrocontrollerorDSP on the16thSCLK fallingedge.The 16thSCLK fallingedge alsoputs theDOUT pininto3-state. When usinga slowerSCLK, itmay be possibleforthemicrocontrolleror DSP toread thedataon each SCLK risingedge.The firstSCLK risingedge (aftertheCS fallingedge) readsADD3 and the15thSCLK risingedge readsDB0. Data providedon the DIN pinare clockedintothe ADS8028 on the first16 SCLK fallingedges (aftertheCS fallingedge).However, iftheWRITE bitisnotsetto'1',theADS8028 ignoresthesubsequent15 bitsofdata (refertotheData WriteOperationsectionformore details). Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLink(s):ADS8028
SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com DATA WRITE OPERATION ControlRegisterSettings The ADS8028 operationiscontrolledby thestatusoftheinternalControlRegister.Data writtenintotheControl RegisterdecidetheconfigurationoftheADS8028 forthenextconversioncycle.The ControlRegisteris16 bits wide,and onlysupportswriteoperation.The ControlRegistercan be writtentowiththeserialinterface.Data on theDIN pinareloadedintotheControlRegisteron thefirst16 SCLK fallingedges (aftera CS fallingedge).The bitfunctionsareoutlinedinTable2.On power-up,thedefaultControlRegistercontentisall'0's. Table2.ControlRegisterBitFunctions MSB 15 14 13 12 11 10 9 8 WRITE REPEAT AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 LSB 7 6 5 4 3 2 1 0 AIN6 AIN7 TSENSE X X EXT_REF TMP_AVG STANDBY Bit15 WRITE: WritetoControlRegister Enablewriteoperation. 0 = Writedisabled;ControlRegisterisnotupdatedand thenext15 bitsareignored(default) 1 = Writeenabled;thenext15 bitsupdatetheControlRegister Bit14 REPEAT: Repeat conversionmode Enableconversionrepeatmode (refertotheModes ofOperationsection). 0 = Disablerepeatconversionmode (default) 1 = Enablerepeatconversionmode Bits[13:6] AIN[0:7]:Analog inputchannel selection Each AINx bitcorrespondstotheassociatedanaloginputchannel,AIN0 toAIN7. 0 = AINx channelisnotselectedforconversion(default) 1 = AINx channelisselectedforconversion Bit5 TSENSE :Internaltemperaturesensor selection Internaltemperaturesensorselectionforconversioninsubsequentcycles. 0 = Internaltemperaturesensoroutputisnotselectedforconversion(default) 1 = Internaltemperaturesensoroutputisselectedforconversion Bits[4:3] X: Don ’tcare Bit2 EXT_REF: Referencesource selection Thisbitselectsthereferencesourceforthenextconversion. 0 = Internalreferenceisused forthenextconversion(default) 1 = Externalreferenceisused forthenextconversion Bit1 TMP_AVG: Temperature sensor averagingselection Thisbitselectsthemode ofoperationforthetemperaturesensorchannel;thisbitisignored ifbit5 issetto'0'. 0 = Averagingisdisabledon thetemperaturesensorresult(default) 1 = Averagingisenabledon thetemperaturesensorresult Bit0 STANDBY: STANDBY mode selection Thisbitsetsthemode (normalorstandby)fortheADS8028. 0 = The ADS8028 operatesinnormalmode (default) 1 = The ADS8028 goes tostandbymode inthenextcycle
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www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 DATA READ OPERATION Table3 shows theADS8028 outputdataformat.BitsADD[3:0]specifythechannelselectedforconversionand bitsDB[11:0]aretheconversionresultfortheselectedchannel. Table3.Channel Address Bits ADD3 ADD2 ADD1 ADD0 ANALOG INPUT CHANNEL 0 0 0 0 AIN0 0 0 0 1 AIN1 0 0 1 0 AIN2 0 0 1 1 AIN3 0 1 0 0 AIN4 0 1 0 1 AIN5 0 1 1 0 AIN6 0 1 1 1 AIN7 1 0 0 0 TSENSE withoutaveraging 1 0 0 1 TSENSE withaveraging Analog InputChannel A CS fallingedge bringstheDOUT pinoutof3-stateand alsooutputstheADD3 biton theDOUT pin.The next 15 bitsofdata(ADD2 toDB0) areclockedouton thesubsequentSCLK fallingedges.Therefore,thefirstSCLK fallingedge outputstheADD2 biton DOUT and can alsobe used by themicrocontrollerorDSP toreadthefirst bit(ADD3). Similarly,bitDB0 is clocked out on the 15th SCLK fallingedge and can be read by the microcontrollerorDSP on the16thSCLK fallingedge.The 16thSCLK fallingedge alsoputstheDOUT pininto 3-state. When usinga slowerSCLK, itmay be possibleforthemicrocontrolleror DSP toread thedataon each SCLK risingedge.The firstSCLK risingedge (aftertheCS fallingedge) readsADD3 and the15thSCLK risingedge readsDB0. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLink(s):ADS8028
TM_BUSY 1 16 1 16 Invalid□Data Command: Select□Channel□TSENSE Invalid□Data Command: Select□Channel□AIN0 No□Write□to□the Control□Register Conversion□Result□for T emperature□Measurement Waiting□for□Configuration Integrating□and□Converting for□TSENSE Converting□for□Channel□AIN0tACQ CS SCLK DOUT DIN 1 16 Invalid□Data Invalid□Data Command: Select□Channel□AIN3 Command: Select□Channel□AIN5 Conversion□Result□for Channel□AIN3 Command: Select□Channel□AIN1 Command: Select□Channel□AINx Conversion□Result□for Channel□AIN5 Converting□for□Channel□AIN3Waiting□for□Configuration Converting□for□Channel□AIN5 Converting□for□Channel□AIN1 1 16 1 16 1 16 ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com InternalTemperature Sensor Channel The internaltemperaturesensorcan be selectedforconversionby writinga '1'totheTSENSE bitintheControl Register.On thenextCS fallingedge,theTM_BUSY pingoes highand remainshighthroughoutthetemperature sensorconversionprocess.When theTM_BUSY pingoes high,16 clocksarerequiredtoexecuteone validread orwritecycle:toreadthepreviousconversionresultand toprogram thenextconversionsettings.However,any subsequentreadorwriteoperationsareignoreduntilTM_BUSY goes low;CS isignored,theControlRegisteris notupdated,and DOUT returnsall'1's. The ADS8028 takes100 μs (max)tomeasure and convertthetemperaturechannel.A TM_BUSY signalfalling edge can be used toinitiatea readoperationinordertoreadthetemperatureconversionresult.However,tACQ must be allowedtoelapsebetween theTM_BUSY fallingedge and thesubsequentCS fallingedge toensure thatthe subsequent conversionhas sufficientacquisitiontime.Figure34 shows the temperaturesensor conversionsequence. AfterTM_BUSY goes high,thetemperatureconversioncan be abortedby writinga '1'totheSTANDBY bitinthe firstwriteoperation.The deviceabortstheongoingconversionand entersSTANDBY mode on the16thSCLK fallingedge. Figure34. SerialInterfaceTiming Diagram fortheTemperature Sensor Conversion MODES OF OPERATION Channel Scanning The ADS8028 offersdifferentmodes of operationthatcan be selectedby programming the ControlRegister. Channel-scanningmodes enable any of the nine channelsto be selectedforconversionand alsoallowthe selectedchannelstobe repeatedlyconverted.Low-power modes allowpower consumptionand throughputrate ratiotobe optimized. Singleor MultipleChannels:One Conversion The ADS8028 can be configuredtoconvertany oftheninechannelsby writinga '1'totheControlRegisterbit associatedwiththe desiredchannel.Afterpower-up,a validwriteoperationmust be executedon the Control Registertoselectthedesiredchannel.Inthismode, theREPEAT bitintheControlRegistershouldbe setto'0'. The selectedchannelisconvertedinthesecond frameand theconversionresultcan be clockedoutinthethird frame.Duringthesecond frame,theControlRegistercan be writtentoselectthechanneltobe convertedinthe thirdframe.Figure35 shows a diagramofthisconfiguration. Figure35. Configuringa Conversion and Read withtheADS8028 (One Channel SelectedforConversion,REPEAT = 0)
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Invalid□Data CS SCLK DOUT DIN Invalid□Data Command:□Select□Channels AIN2□and□AIN7 No□Write□to□the□Control□Register Command:□Select□Channel□AIN0 Conversion□Result□for□Channel□AIN2 Conversion□Result□for□Channel□AIN7 Conversion□Result□for□Channel□AIN0 No□Write□to□the□Control□Register Waiting□for□Configuration Converting□for□Channel□AIN2 Converting□for□Channel□AIN7 Converting□for□Channel□AIN0 No□Write□to□the□Control□Register Waiting□for□Configuration 1 16 1 16 1 16 1 16 /c188 /c188 /c188 /c188 ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 Ifmultiplechannelsare selectedby writinga '1'to allassociatedbitsinthe ControlRegister,the ADS8028 convertsallselectedchannelssequentially(inascendingorder)in successiveframes as definedby the CS fallingedges.When allselectedchannelsintheControlRegisterareconverted,theADS8028 stopsconversions and waitsfora validwriteoperationto be executedinthe ControlRegisterto selectthe nextchannelto be converted.Thisoperationisshown inFigure36.DOUT returnsall'1'siftheconversionsequence iscompleted or ifno channelisselected.When the ADS8028 beginsto convertthe firstchannelinthe selectedchannel sequence,theWRITE bitintheControlRegistermust be setto'0'inany subsequentframestoavoidinterrupting theselectedsequence. Figure36. Configuringa Conversion and Read withtheADS8028 (Numerous Channels SelectedforConversion,REPEAT = 0) Singleor MultipleChannels:Repeated Conversions The ADS8028 can be programmed to repeatedlyconverteithera singlechannelor a sequence of channels withouthavingtoreprogramtheControlRegister.To operateinthismode, executea validwriteoperationtothe ControlRegister.Duringthiswriteoperation,theREPEAT bitintheControlRegistershouldbe setto'1'and the desiredchannelsshouldbe selectedby writinga '1'totheassociatedbits.Thereafter,theADS8028 continuously cyclesthroughtheselectedchannelsinascendingorder,beginningwiththelowestchanneland convertingall channelsselectedinthe ControlRegister.On completionof the sequence,the ADS8028 returnsto the first selectedchannelintheControlRegisterand repeatsthesequence. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLink(s):ADS8028
Invalid□Data CS SCLK DOUT DIN 1 16 1 16 1 16 1 16 1 16 Invalid□Data No□Write□to□the□Control□Register No□Write□to□the□Control□Register No□Write□to□the□Control□Register No□Write□to□the□Control□Register No□Write□to□the□Control□Register Command:□Select□Channels AIN2,□AIN5,□and□AIN7,□Repeat□=□1 Conversion□Result□for Channel□AIN2 Conversion□Result□for Channel□AIN5 Conversion□Result□for Channel□AIN7 Conversion□Result□for Channel□AIN2 Waiting□for□Configuration Converting□for□Channel□AIN2 Converting□for□Channel□AIN5 Converting□for□Channel□AIN2 Converting□for□Channel□AIN5Converting□for□Channel□AIN7 /c188 /c188 /c188 /c188 ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com The ADS8028 continuesto operateinrepeatmode untila validwriteoperationisexecutedto reprogramthe ControlRegister.When the ControlRegisterisupdated,the ADS8028 comes out of repeatmode and begins operatingas perthenew programmed settings.Therefore,tocontinueinrepeatmode and toavoidaccidentally overwritingtheControlRegister,itisrecommended thattheWRITE bitintheControlRegisterbe setto'0'while operatinginrepeatmode. Figure37 illustratestherepeatmode ofoperation. Figure37. Configuringa Conversion and Read inRepeat Mode Low-Power Modes Innormalmode ofoperation,allinternalADS8028 blocksarealwayspowered up and thedeviceisalwaysready to initiatea new conversion.Thisarchitectureenablesthe ADS8028 to supportthe 1-MSPS ratedthroughput rate.However, the ADS8028 also supportstwo low-powermodes thatcan be used to optimizethe power consumptionand throughputrateratio.Intheselow-powermodes, some internalADS8028 blocksarepowered up ordown as theoperationrequires.Thisflexibilityreducestheoverallpower consumptionatlowerthroughput rates. STANDBY Mode InSTANDBY mode, onlypartoftheADS8028 internalcircuitryispowered down. The internalreferenceisnot powered down and,therefore,theADS8028 can be fullypowered up within1 µs.To enterSTANDBY mode, a validwriteoperationshouldbe executedtotheControlRegisterwiththeSTANDBY bitsetto'1'.The ADS8028 entersSTANDBY mode on theCS risingedge followingthiswriteoperation. The temperaturesensor averagingfunctionisalsoresetwhen the deviceentersSTANDBY mode. While in STANDBY mode, any readoperationon theADS8028 returnsall'1'son theDOUT pin. The ADS8028 remainsinSTANDBY mode untiltheSTANDBY bitintheControlRegisterisresetto'0'usinga validwriteoperation.Then,theADS8028 startspoweringup on theCS risingedge followingthiswriteoperation. One validControlRegisterwritecyclemust completeinorderto update the desiredchannelsforsubsequent conversions.Aftersuccessfulcompletionofthesetwo writecycles,thedeviceentersa normalmode ofoperation and operateswithone cyclelatency.
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Invalid□Data CS SCLK DOUT DIN 1 16 1 16 1 16 1 16 1 16 1111□1111□1111 No□Write□to□the Control□Register Command:□Select□Channel□AIN1, STANDBY□=□0 No□Write□to□the Control□Register Command:□Enter□Standby□Mode, STANDBY□=□1 1111□1111□1111 Invalid□Data Invalid□Data Conversion□Result□for Channel□AIN1 Waiting□for□Configuration In□Standby□Mode Converting□for□Channel□AIN1 Converting□for□Channel□AIN4 In□Standby□Mode Command:□Exit□Standby□Mode, STANDBY□=□0 Waiting□for□Configuration Command: Select□Channel□AIN4 Device□Enters Standby□Mode Device□Exits Standby□Mode Device□Starts□to□Exit Standby□Mode /c188 /c188 /c188 /c188 ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012 IttakesfourserialtransfercyclesfortheADS8028 toexitSTANDBY mode and transmitthefirstvalidconversion data,as shown in Figure38. The firstcycleupdates the STANDBY bitto '0';the second cycleselectsthe channelsand operationmode; thethirdcycleconvertstheselectedchannel;and theresultofthisconversioncan be clockedoutinthefourthcycle. Figure38. STANDBY Mode ofOperation Power-Down Mode Inpower-down mode, allinternalADS8028 circuitry(includingtheinternalreference)ispowered down and the ControlRegisterisresettothedefaultvalues.The temperaturesensoraveragingfeatureisresetand disabled. The ADS8028 can be placedintopower-down mode by pullingthePD/RST pintoa logiclowstateforatleast90 ns.The PD/RST pinisasynchronoustotheclock;thus,itcan be triggeredatany timeregardlessofthestatusof otherADS8028 pins(includingtheanaloginputchannels).When thedeviceisinpower-down mode, any activity on thedigitalinputpins(apartfrom thePD/RST pin)isignoredand thedevicedoes nottakeinput-dependent currentfromtheanaloginputpins. The ADS8028 powers up in defaultconditionwhen the PD/RST pin is pulledback to a logichigh level. Conversionscan beginwhen tPOWER_UP has elapsed. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLink(s):ADS8028
tPL_PDRST PD□RST / ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com RESET The ADS8028 can be RESET by pullingthePD/RST pintoa logiclow stateforno longerthan60 ns.Thisinput is asynchronousto the clock.On RESET, the ControlRegisterbitsare set to the defaultstateand the temperaturesensoraveragingfeatureisresetand disabled.When the PD/RST ispulledback to a logichigh state,the ADS8028 isplacedin normal mode. One validwriteoperationmust be executedon the Control RegisterinordertoconfiguretheADS8028 and toselectthechannelsbeforeinitiatingconversions. Note thatPD/RST isa dual-functionpin.Figure39 shows thetimingofthispinand Table4 explainstheusage of thispin. Figure39. PD/RST Pin Timing Table4.PD/RST Pin Functionality CONDITION DEVICE MODE tPL_PDRST < 60 ns RESET (devicedoes notenterpower-down mode) DeviceRESET. The ADS8028 may ormay notenterpower-down 60 ns < tPL_PDRST < 90 ns mode. Thissettingisnot recommended. tPL_PORST > 90 ns Deviceenterspower-down mode POWER SUPPLY The ADS8028 has two separatepower supplies:AVDD and DVDD. The ADC operateson an AVDD power supply;theDVDD supplyisused fortheinterfacecircuits.AVDD and DVDD can be setindependentlytoany valuewithinthepermissiblerange;however,caremust be takentoensurethatEquation7 isfulfilled. DVDD ≤ AVDD + 0.3V (7) The ADS8028 containsan internalpower-on-reset(POR) circuitthatresetstheControlRegistertothedefault value(allzeros).Therefore,by default,theADS8028 powers up ininternalreferencemode. To continuewiththe internalreference,a 5.5-msdelaymust elapsebeforeinitiatingthefirstconversion. To operatewithan externalreference,thereisno requireddelayforthe internalreferenceto power-up.The ADS8028 digitalinterfaceisfullyfunctional500 µs afterpower-up.Therefore,aftera 500-µs delay,a validwrite operationcan be executedto the ControlRegisterto program the deviceinexternalreferencemode and to selectthechannelsforconversion.
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24.9+ OPA836 VS+ VS+ AC 0V W 2.5V ADC Input Range ADS8028 www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012
APPLICATION INFORMATION
USAGE OF INTERNAL TEMPERATURE SENSOR The ADS8028 accuratelymeasures and convertsthetemperatureofitsown silicondie.Most oftheheattransfer between any externalheatsourceand theADS8028 dieoccursviathethermalpad.Therefore,theADS8028 can be used to measure the temperatureof any externalheat source by minimizingthe thermalresistance between theheatsourceand thedevicethermalpad. APPLICATION CIRCUITS ADC Driver The OPA836 isa low-power,205-MHz bandwidthop amp with560-V/μs slewrate,and isan excellentdriverfor theADS8028 SAR ADC forhighac performanceatmaximum throughput(1MSPS). The highbandwidthofthe OPA836 isableto correctforfastloadtransientscreatedby the SAR ADC switchingbehavior.An RC circuit insertedbetween theOPA836 and ADS8028 isrecommended tofurtheraidtheoverallcircuitperformance.This configurationisshown inFigure40.The RC filtereffectivelylimitsthefull-powerbandwidthoftheADS8028 to reducetheoverallnoisebandwidthand peak-to-peaknoisesampled by theADS8028. The capacitanceissized tobe 10 to20 timeslargerthantheinternalADS8028 samplingcapacitortoprovidequickchargesharingtothe ADC duringswitchingtransients.Furthermore,theresistorprovidessome isolationbetween theOPA836 output and thecapacitiveloadtostabilizetheamplifier.The RC circuit–3-dB cutofffrequencyshouldbe an orderof magnitude or largerthan the highestinputsignalfrequencyto avoidattenuatingthe desiredinputsignal.A collectionofotherADC drivingcircuitscan be foundinapplicationnoteBufferOp Amp toADC CircuitCollection (SLOA098). Figure40. OPA836 Buffer The TINA-TIsimulationfileofthiscircuitcan be downloadedby clickingthefollowinglink:OPA836 Buffer. Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLink(s):ADS8028
−140 −120 −100 −80 −60 −40 −20 0 50 100 150 200 250 300 350 400 450 500 Frequency (kHz) Amplitude (dB) AVDD = 5 V VREF = 2.5 V internal fSAMPLE = 1 MHz fIN = 49.9115 kHz fSCLK = 20 MHz SNR =72.145 dB THD = −87.844 dB G033 ADS8028 430 pF 24.9+ OPA836 VS+ VS+ AC 2N 2N 1N +5V 0.25V W 2.25V-2V W +2V 47 pF ADS8028 SBAS549B –MAY 2011–REVISED MARCH 2012 www.ti.com The ac performanceofthecircuitinFigure40 was testedwitha 2.36-VPP (–0.5dBFS),49.911499023-kHzinput sinewave. The FFT ofthesampled inputsignalwith8192 samples isshown inFigure41.The high-precision inputsignalfrequencyused to achievecoherentsamplingwithouta windowingfunctionisappliedto the data priorto the FourierTransform.Figure41 shows thatthisdrivercircuitallowsthe ADS8028 to operateat full throughputwithintypicalcharacteristicspecifications. Figure41. FFT Showing OPA836 Bufferand ADS8028 AC Performance The ADC drivecircuitrymay alsofunctiontoscaleoutputsignalsfroma sensortothefullinputvoltagerangeof the ADS8028 to takeadvantageof the fullADC dynamic range.Itislikelythatthe inputsignalrange willnot match theADS8028 voltagerange(0V toVREF ).InputsignalstotheADC may need tobe amplified,attenuated, or level-shifted.In Figure42, a resistornetworkisadded in the circuitpriorto the OPA836 bufferthatcan attenuateand level-shiftsignals.The inputsignalinFigure42 isbipolarand isscaledtoa unipolarsignalforuse inthesingle-supplycircuit.The added resistornetworkdoes notsignificantlyincreasepower consumptionorload thesensoriflargeresistorvaluesare chosen.The trade-offtousinglargeresistorvaluesistheadded thermal noiseinjectedintothesignalpath.A shuntcapacitor(47pF shown) isthenadded between theresistornetwork and OPA836 buffersuch thatthe desiredinputsignalisminimallyattenuatedwhilehigherfrequencythermal noiseisremoved. More ADC analoginterfacedesigndetailsand a step-by-stepdesignexample are providedintheApplications Journalarticle,SensortoADC--analoginterfacedesign(SLYT173). Figure42. OPA836 BufferwithVoltageScaling The TINA-TIsimulationfileofthiscircuitcan be downloaded by clickingthefollowinglink:OPA836 Bufferwith VoltageScaling.
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www.ti.com SBAS549B –MAY 2011–REVISED MARCH 2012
REVISION HISTORY
NOTE: Page numbers forpreviousrevisionsmay differfrompage numbers inthecurrentversion. Changes from RevisionA (March 2012)toRevisionB Page Copyright© 2011–2012,Texas InstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLink(s):ADS8028
www.ti.com 7-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) ADS8028IRTJR Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJR.A Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJR.B Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJRG4 Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJRG4.A Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJRG4.B Active Production QFN (RTJ) | 20 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 ADS8028 ADS8028IRTJT Active Production QFN (RTJ) | 20 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS8028 ADS8028IRTJT.A Active Production QFN (RTJ) | 20 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS8028 ADS8028IRTJT.B Active Production QFN (RTJ) | 20 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS8028 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative Addendum-Page 1
www.ti.com 7-Oct-2025 and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8028IRTJR QFN RTJ 20 3000 346.0 346.0 33.0 ADS8028IRTJRG4 QFN RTJ 20 3000 346.0 346.0 33.0 ADS8028IRTJT QFN RTJ 20 250 210.0 185.0 35.0 Pack Materials-Page 2
www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. WQFN - 0.8 mm max heightRTJ 20 PLASTIC QUAD FLATPACK - NO LEAD4 x 4, 0.5 mm pitch 4224842/A
www.ti.com PACKAGE OUTLINE C 4.15 3.85 4.15 3.85 0.8 0.7 0.05 0.00 2X 2 16X 0.5 2X 2 20X 0.5 0.3 20X 0.30 0.18 2.6 0.1 (0.2) TYP WQFN - 0.8 mm max heightRTJ0020F PLASTIC QUAD FLATPACK - NO LEAD 4219126/A 02/2019 0.08 C
0.1 C A B
0.05 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. PIN 1 INDEX AREA SEATING PLANE PIN 1 ID SYMM EXPOSED THERMAL PAD SYMM 6 10 1620 SCALE 3.500 AB
www.ti.com EXAMPLE BOARD LAYOUT 16X (0.5) (1.05) (1.05) (R0.05) TYP
0.07 MAX
0.07 MIN
20X (0.6) 20X (0.24) (3.8) (3.8) ( 2.6) ( 0.2) TYP VIA WQFN - 0.8 mm max heightRTJ0020F PLASTIC QUAD FLATPACK - NO LEAD 4219126/A 02/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X SEE SOLDER MASK DETAIL 6 10 1620 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS
www.ti.com EXAMPLE STENCIL DESIGN 20X (0.6) 20X (0.24) 16X (0.5) (3.8) (3.8) (0.675) TYP (0.675) TYP 4X ( 1.15) (R0.05) TYP WQFN - 0.8 mm max heightRTJ0020F PLASTIC QUAD FLATPACK - NO LEAD 4219126/A 02/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 20X EXPOSED PAD 21 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SYMM SYMM 6 10 1620
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