ADS801E

ADS801 BURR-BROWN | Alldatasheet

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Technical content

© 1995 Burr-Brown Corporation PDS-1287E Printed in U.S.A. September, 1996 TM ADS801 12-Bit, 25MHz Sampling ANALOG-TO-DIGITAL CONVERTER

FEATURES

l LOW POWER: 270mW l INTERNAL REFERENCE l WIDEBAND TRACK/HOLD: 65MHz l SINGLE +5V SUPPLY l PACKAGE: 28-Lead SOIC and 28-Lead SSOP

DESCRIPTION

The ADS801 is a low power, monolithic 12-bit, 25MHz analog-to-digital converter utilizing a small geometry CMOS process. This COMPLETE converter includes a 12-bit quantizer, wideband track/hold, reference, and three-state outputs. It operates from a single +5V power supply and can be configured to accept either single-ended or differential input signals. The ADS801 employs digital error correction to provide excellent Nyquist differential linearity performance for demanding imaging applications. Its low distortion, high SNR and high oversampling capability give it the extra margin needed for telecommunications, instru- mentation and video applications. This high performance A/D converter is specified over temperature for AC and DC performance at a 25MHz sampling rate. The ADS820 is available in 28-lead SOIC and 28-lead SSOP packages. International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ADS801U ADS801E

APPLICATIONS

l IF AND BASEBAND DIGITIZATION l DIGITAL COMMUNICATIONS l TEST INSTRUMENTATION l CCD IMAGING Copiers Scanners Cameras l VIDEO DIGITIZING l GAMMA CAMERAS Pipeline A/D Timing Circuitry Error Correction Logic 3-State OutputsT/H 12-Bit Digital Data CLK +1.25V +3.25V MSBI OE IN IN REFT CM REFB

PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS SPECIFICATIONS At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. TTL/HCT Compatible CMOS Falling Edge TTL/HCT Compatible CMOS Falling Edge Resolution 12 12 Bits Specified Temperature Range T AMBIENT –40 +85 [(1) [ °C ANALOG INPUT Differential Full Scale Input Range Both Inputs, +1.25 +3.25 [[ V 180° Out of Phase Common-Mode Voltage +2.25 [ V Analog Input Bandwidth (–3dB) Small Signal –20dBFS (2) Input +25 °C 400 [ MHz Full Power 0dBFS Input +25 °C6 5 [ MHz Input Impedance 1.25 || 4 [ M Ω || pF DIGITAL INPUT Logic Family Convert Command Start Conversion ACCURACY (3) Gain Error +25 °C ±0.6 ±1.5 [[ % Gain Tempco ±85 [ ppm/°C Power Supply Rejection of Gain Delta +V S = ±5% +25 °C 0.03 0.15 [[ %FSR/% Input Offset Error Full ±2.1 ±3.0 [[ % Power Supply Rejection of Offset Delta +V S = ±5% +25 °C 0.05 0.15 [[ %FSR/% CONVERSION CHARACTERISTICS Sample Rate 10k 25M [[ Sample/s Data Latency 6.5 [ Convert Cycle DYNAMIC CHARACTERISTICS Differential Linearity Error No Missing Codes 0 °C to +85°C Guaranteed Guaranteed LSB Integral Linearity Error at f = 500kHz Full ±1.7 [ LSB Spurious-Free Dynamic Range (SFDR) f = 500kHz (–1dBFS input) +25 °C6 3 7 7 [[ dBFS Full 62 73 [[ dBFS f = 10MHz (–1dBFS input) +25 °C5 7 6 1 [[ dBFS Full 55 61 [[ dBFS Two-Tone Intermodulation Distortion (IMD)(4) f = 4.4MHz and 4.5MHz (–7dBFS each tone) +25 °C –64 [ dBc Full –63 [ dBc Signal-to-Noise Ratio (SNR) f = 500kHz (–1dBFS input) +25 °C6 4 6 6 6 2 6 4 d B Full 61 64 59 [ dB f = 10MHz (–1dBFS input) +25 °C6 2 6 5 [[ dB Full 58 64 [[ dB Signal-to-(Noise + Distortion) (SINAD) f = 500kHz (–1dBFS input) +25 °C6 3 6 6 6 1 6 4 d B Full 60 63 58 [ dB f = 10MHz (–1dBFS input) +25 °C5 6 5 9 [[ dB Full 54 58 [[ dB Differential Gain Error NTSC or PAL +25 °C 0.5 [ % Differential Phase Error NTSC or PAL +25 °C 0.1 [ degrees Aperture Delay Time +25 °C2 [ ns Aperture Jitter +25 °C7 [ ps rms Overvoltage Recovery Time(5) 1.5x Full Scale Input +25 °C2 [ ns NOTE: (1) An asterisk ([ ) indicates same specifications as the ADS801U. (2) dBFS refers to dB below Full Scale. (3) Percentage accuracies are referred to the internal A/D Full Scale Range of 4Vp-p. (4) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal (≈0dB), the intermodulation products will be 7dB lower. (5) No “rollover” of bits.

Logic Coding Logic Selectable Logic Levels Logic “LO”, Full 0 0.4 [[ V C L = 15pF max Logic “HI”, Full +2.5 +V S [[ V C L = 15pF max 3-State Enable Time 20 40 [[ ns 3-State Disable Time Full 2 10 [[ ns POWER SUPPLY REQUIREMENTS Supply Voltage: +VS Operating Full +4.75 +5.0 +5.25 [[[ V Supply Current: +IS Operating +25 °C5 4 6 5 [[ mA Operating Full 54 68 [[ mA Power Consumption Operating +25 °C 270 325 [[ mW Operating Full 270 340 [[ mW Thermal Resistance, θJA 28-Lead SOIC 75 [ °C/W 28-Lead SSOP 50 [ °C/W [ Specifications same as ADS801U. ADS801U ADS801E PARAMETER CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS TTL/HCT Compatible CMOS Falling Edge TTL/HCT Compatible CMOS Falling Edge SPECIFICATIONS (CONT) At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. Electrostatic discharge can cause damage ranging from per- formance degradation to complete device failure. Burr- Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. ABSOLUTE MAXIMUM RATINGS NOTE: Stresses above these ratings may permanently damage the device. PACKAGE DRAWING TEMPERATURE PRODUCT PACKAGE NUMBER (1) RANGE ADS801U 28-Lead SOIC 217 –40 °C to +85°C ADS801E 28-Lead SSOP 324 –40 °C to +85°C NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. PACKAGE/ORDERING INFORMATION

S REFT CM REFB S MSBI OE S CLK S ADS801 PIN CONFIGURATION TOP VIEW SOIC/SSOP TIMING DIAGRAM SYMBOL DESCRIPTION MIN TYP MAX UNITS tCONV Convert Clock Period 40 100 µsn s tL Clock Pulse Low 19 20 ns tH Clock Pulse High 19 20 ns tD Aperture Delay 2 ns t1 Data Hold Time, CL = 0pF 3.9 ns t2 New Data Delay Time, CL = 15pF max 12.5 ns PIN DESIGNATOR DESCRIPTION

1 GND Ground

2 B1 Bit 1, Most Significant Bit

3 B2 Bit 2

4 B3 Bit 3

5 B4 Bit 4

6 B5 Bit 5

7 B6 Bit 6

8 B7 Bit 7

9 B8 Bit 8

10 B9 Bit 9

11 B10 Bit 10

12 B11 Bit 11

13 B12 Bit 12, Least Significant Bit

14 GND Ground

16 CLK Convert Clock Input, 50% Duty Cycle

18 OE HI: High Impedance State. LO or Floating: Nor- mal Operation. Internal pull-down resistors.

19 MSBI Most Significant Bit Inversion, HI: MSB inverted

for complementary output. LO or Floating: Straight output. Internal pull-down resistors. 20 +V S +5V Power Supply 21 REFB Bottom Reference Bypass. For external bypass- ing of internal +1.25V reference. 22 CM Common-Mode Voltage. It is derived by (REFT + REFB)/2. 23 REFT Top Reference Bypass. For external bypassing of internal +3.25V reference. 24 +V S +5V Power Supply

25 GND Ground

26 IN Input

27 IN Complementary Input

28 GND Ground

NOTE: (1) “ ” indicates the portion of the waveform that will stretch out at slower sample rates. Track Hold "N" Hold "N + 1" Hold "N + 2" Hold "N + 3" Hold "N + 4" Hold "N + 5" Hold "N + 6"Track Data Valid N-7 Data Valid N-6 INTERNAL TRACK/HOLD CONVERT CLOCK OUTPUT DATA tD DATA LATENCY (6.5 Clock Cycles) tCONV tL tH Track Track Track Track N-3N-5 N-4 N-2 N-1 N Track Track Data Valid N-8 (1) Data Invalid

2.0 1.0 –1.0 –2.0 DIFFERENTIAL LINEARITY ERROR Code DLE (LSB) fIN = 10MHz 2.0 1.0 –1.0 –2.0 DIFFERENTIAL LINEARITY ERROR Code DLE (LSB) 0 1024 2048 3072 4096 fIN = 500kHz TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. SPECTRAL PERFORMANCE Frequency (MHz) Amplitude (dB) –20 –40 –60 –80 –100 –120 fIN = 10MHz SPECTRAL PERFORMANCE Frequency (MHz) Amplitude (dB) –20 –40 –60 –80 –100 –120 fIN = 500kHz –20 –40 –60 –80 –100 –120 TWO-TONE INTERMODULATION Amplitude (dB) Frequency (MHz) f1 = 4.5MHz f2 = 4.4MHz INPUT FREQUENCY vs DYNAMIC PERFORMANCE Frequency (MHz) SFDR, SNR (dB) 0.1 1 10 100 SFDR SNR

4.0 2.0 –2.0 –4.0 INTEGRAL LINEARITY ERROR ILE (LSB) 0 1024 2048 3072 4096 Code fIN = 500kHz 100 Input Amplitude (dBm) SFDR (dBFS) SWEPT POWER SFDR fIN = 10MHz TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. Input Amplitude (dBm) SWEPT POWER SNR SNR (dB) fIN = 10MHz DYNAMIC PERFORMANCE vs DIFFERENTIAL FULL-SCALE INPUT RANGE Dynamic Range (dB) 12 3 4 5 Differential Full-Scale Input Range (Vp-p) SFDR (fIN = 10MHz) SNR (fIN = 10MHz) DYNAMIC PERFORMANCE vs SINGLE-ENDED FULL-SCALE INPUT RANGE Dynamic Range (dB) 12 3 4 5 Single-Ended Full-Scale Input Range (Vp-p) SFDR (fIN = 10MHz) SNR (fIN = 10MHz) OUTPUT NOISE HISTOGRAM (NO SIGNAL) Counts 800k 600k 400k 200k 0.0 Code N–2 N–1 N N+1 N+2

POWER DISSIPATION vs TEMPERATURE Ambient Temperature (°C) Power (mW) 265 260 255 250 245 –50 –25 0 25 50 75 100 SIGNAL-TO-(NOISE + DISTORTION) vs TEMPERATURE Ambient Temperature (°C) SINAD (dB) –50 –25 0 25 50 75 100 fIN = 500kHz fIN = 10MHz DIFFERENTIAL LINEARITY ERROR vs TEMPERATURE Ambient Temperature (°C) DLE (LSBs) 0.5 0.4 0.3 0.2 0.1 –50 –25 0 25 50 75 100 fIN = 10MHz fIN = 500kHz TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. SPURIOUS FREE DYNAMIC RANGE (SFDR) vs TEMPERATURE Ambient Temperature (°C) SFDR (dBFS) –50 –25 0 25 50 75 100 fIN = 500kHz fIN = 10MHz SIGNAL-TO-NOISE RATIO vs TEMPERATURE Ambient Temperature (°C) SNR (dB) –50 –25 0 25 50 75 100 fIN = 500kHz fIN = 10MHz SUPPLY CURRENT vs TEMPERATURE Ambient Temperature (°C) IQ (mA) –50 –25 0 25 50 75 100

Ambient Temperature (°C) Gain (% FSR) –0.05 –0.55 –1.05 –1.55 –50 –25 0 25 50 75 100 OFFSET ERROR vs TEMPERATURE Ambient Temperature (°C) Offset (% FSR) –1.50 –1.75 –2.0 –2.25 –50 –25 0 25 50 75 100 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = +5V, Sampling Rate = 25MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted. TRACK-MODE SMALL-SIGNAL INPUT BANDWIDTH Frequency (Hz) Track-Mode Input Response (dB) 10k 100k 1M 10M 100M 1G