ADS1000-Q1 TI1 | Alldatasheet

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NOTE: Marking text direction indicates pin 1. Marking text depends on I C address; see Package Option Addendum. VIN- BSKQ BTMQ VDD SDA SCL GND VIN+ VIN- VDD SDA SCL GND VIN+ I C address: 1001000 I C address: 1001001 ADS1000 Clock Oscillator I C Interface 2A/D ConverterPGA VDD VIN+ VIN/c45 GND SDA SCL ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 LOW-POWER12-BITANALOG-TO-DIGITALCONVERTERWITHI2C™ INTERFACE Check forSamples: ADS1000-Q1 1FEATURES APPLICATIONS

  • VoltageMonitors23• QualifiedforAutomotive Applications
  • BatteryManagement• Complete 12-BitData AcquisitionSystem ina TinySOT-23 Package
  • Low CurrentConsumption: Only 90 mA
  • IntegralNonlinearity:1 LSB Max
  • Single-CycleConversion
  • Programmable Gain Amplifier Gain = 1,2,4,or 8
  • 128-SPS Data Rate
  • I2C InterfacewithTwo AvailableAddresses
  • Power Supply:2.7V to5.5V
  • Pin-and Software-Compatiblewith16-Bit ADS1100

DESCRIPTION

The ADS1000 isan I2C-compatibleserialinterfaceanalog-to-digital(A/D)converterwithdifferentialinputsand 12 bitsofresolutionina tinySOT23-6 package.Conversionsareperformedratiometrically,usingthepower supply as thereferencevoltage.The ADS1000 operatesfroma singlepower supplyrangingfrom2.7Vto5.5V. The ADS1000 performsconversionsat a rateof 128 samples per second (SPS).The onboard programmable gainamplifier(PGA),whichoffersgainsofup to8,allowssmallersignalstobe measured withhighresolution.In single-conversionmode, the ADS1000 automaticallypowers down aftera conversion,greatlyreducingcurrent consumptionduringidleperiods. The ADS1000 is designed forapplicationswhere space and power consumptionare major considerations. Typicalapplicationsincludeportableinstrumentation,consumer goods,and voltagemonitoring. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2I2C isa trademarkofNXP Semiconductors,Inc. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2009–2010,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING ADS1000A0QDBVRQ1 BSKQ –40°C to125°C SOT-23 – DBV Reelof3000 ADS1000A1QDBVRQ1 BTMQ (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. (2) Package drawings,thermaldata,and symbolizationareavailableatwww.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS (1) Over operatingfree-airtemperaturerange(unlessotherwisenoted). ADS1000 UNIT VDD toGND –0.3to6 V Inputcurrent(momentary) 100 mA Inputcurrent(continuous) 10 mA VoltagetoGND, VIN+,VIN– –0.3toVDD to0.3 V VoltagetoGND, SDA, SCL –0.5to6 V Maximum junctiontemperature,TJ +150 °C Operatingtemperature –40 to125 °C Storagetemperature –60 to150 °C (1) Stressesabove thoselistedunderAbsoluteMaximum Ratingsmay cause permanentdamage tothedevice.Exposuretoabsolute maximum conditionsforextendedperiodsmay affectdevicereliability.

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www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010

ELECTRICAL CHARACTERISTICS

Allspecificationsat–40°C to125°C, VDD = 5V,GND = 0V,and allPGAs (unlessotherwisenoted) ADS1000 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Analog Input Full-scaleinputvoltage (VIN+)– (VIN–) ±VDD /PGA (1) V Analoginputvoltage VIN+,VIN– toGND GND – 0.2 VDD + 0.2 V Differentialinputimpedance 2.4/PGA M Ω Common-mode inputimpedance 8 M Ω System Performance Resolution No missingcodes 12 Bits Data rate 104 128 184 SPS Integralnonlinearity(INL) ±0.1 1 LSB Offseterror 1 ±2 LSB Gain error 0.01 0.1 % DigitalInput/Output Logiclevel VIH 0.7VDD 6 V VIL GND – 0.5 0.3VDD V VOL IOL = 3 mA GND 0.4 V Inputleakage IIH VIH = 5.5V 10 mA IIL VIL= GND – 10 mA Power-Supply Requirements Power-supplyvoltage VDD 2.7 5.5 V Supplycurrent Power-down 0.05 2 mA Active 90 150 mA Power dissipation mA VDD = 5.0V 450 750 mW VDD = 3.0V 210 mW (1) Each input,VIN+ and VIN–,must meet theabsoluteinputvoltagespecifications. Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):ADS1000-Q1

I2C Bus Frequency (kHz) IVDD (µA) 25/C0095C −40/C0095C 125/C0095C 120 100 IVDD (µA) −60 −40 −20 0 20 40 60 80 100 120 140 Temperature (/C0095C) VDD = 5V VDD = 2.7V PGA = 8 PGA = 4 PGA = 2 PGA = 1 2.0 1.0 0.0 1.0 2.0 /c45 /c45 /c4540 /c4520 0 20 40 60 80 100 120 140/c4560 T emperature□(°C) Offset□Error□(mV) PGA□=□8 PGA□=□4 PGA□=□1 PGA□=□2 0.04 0.03 0.02 0.01 0.00 0.01 0.02 0.03 0.04 /c45 /c45 /c45 /c45 /c4540 /c4520 0 20 40 60 80 100 120 140/c4560 T emperature□(°C) Gain□Error□(%) VDD = 2.7V VDD = 5V 160 144 128 112 Data Rate (SPS) −60 −40 −20 0 20 40 60 80 100 120 140 Temperature (/C0095C) ADS1000-Q1 SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS AtTA = 25°C and VDD = 5V,unlessotherwiseindicated. SUPPLY CURRENT vs TEMPERATURE SUPPLY CURRENT vs I2C BUS FREQUENCY Figure1. Figure2. OFFSET ERROR vs TEMPERATURE GAIN ERROR vs TEMPERATURE Figure3. Figure4. DATA RATE vs TEMPERATURE Figure5.

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Output Code/C00432048(PGA)/C0466V IN/C0041/C0042V IN− V DD /C0467 ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 THEORY OF OPERATION The ADS1000 is a fullydifferential,12-bitA/D converter.The ADS1000 allowsusers to obtainprecise measurements witha minimum ofeffort,and thedeviceisextremelyeasy todesignwithand configure. The ADS1000 consistsofan A/D convertercorewithadjustablegain,a clockgenerator,and an I2C interface. Each oftheseblocksaredescribedindetailinthesectionsthatfollow. ANALOG-TO-DIGITAL CONVERTER The ADS1000 uses a switched-capacitorinputstage.To externalcircuitry,itlooksroughlylikea resistance.The resistancevaluedepends on thecapacitorvaluesand therateatwhichtheyareswitched.The switchingclockis generatedby theonboard clockgenerator,so itsfrequency,nominally275kHz, isdependenton supplyvoltage and temperature.The capacitorvaluesdepend on thePGA setting. The common-mode and differentialinputimpedances are different.For a gainsettingof PGA, the differential inputimpedance istypically2.4MΩ/PGA. The common-mode impedance istypically8M Ω. OUTPUT CODE CALCULATION The ADS1000 outputscodes inbinarytwo’s complement format.The outputcode isconfinedto the range of numbers:–2048 to2047,and isgivenby: CLOCK GENERATOR The ADS1000 featuresan onboardclockgenerator.The TypicalCharacteristicsshow variationsindatarateover supplyvoltageand temperature.ItisnotpossibletooperatetheADS1000 withan externalclock. USING THE ADS1000 OPERATING MODES The ADS1000 operatesinone oftwo modes: continuousconversionand singleconversion. Incontinuousconversionmode, theADS1000 continuouslyperformsconversions.Once a conversionhas been completed,the ADS1000 placesthe resultinthe outputregister,and immediatelybeginsanotherconversion. When theADS1000 isincontinuousconversionmode, theST/BSY bitintheconfigurationregisteralwaysreads Insingleconversionmode, theADS1000 waitsuntiltheST/BSY bitintheconversionregisterissetto1.When thishappens,theADS1000 powers up and performsa singleconversion.Aftertheconversioncompletes,the ADS1000 placestheresultintheoutputregister,resetstheST/BSY bitto0 and powers down. Writinga 1 to ST/BSY whilea conversionisinprogresshas no effect. When switchingfrom continuousconversionmode to singleconversionmode, the ADS1000 willcompletethe currentconversion,resettheST/BSY bitto0 and power-down thedevice. RESET AND POWER-UP When theADS1000 powers up,itautomaticallyperformsa reset.As partofthereset,theADS1000 setsallof thebitsintheconfigurationregistertotheirrespectivedefaultsettings. The ADS1000 respondstotheI2C GeneralCallReset command. When theADS1000 receivesa GeneralCall Reset,itperformsan internalreset,exactlyas thoughithad justbeen powered on. Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):ADS1000-Q1

SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com I2C INTERFACE The ADS1000 communicates throughan I2C (Inter-IntegratedCircuit)interface.The I2C interfaceisa two-wire, open-draininterfacesupportingmultipledevicesand masterson a singlebus.Deviceson theI2C bus onlydrive thebus lineslow,by connectingthem toground;theyneverdrivethebus lineshigh.Instead,thebus wiresare pulledhighby pullupresistors,so the bus wiresare highwhen no deviceisdrivingthem low.Thisway, two devicescannotconflict;iftwo devicesdrivethebus simultaneously,thereisno drivercontention. Communicationon theI2C bus alwaystakesplacebetween two devices,one actingas themasterand theother actingas theslave.Bothmastersand slavescan readand write,butslavescan onlydo so underthedirectionof themaster.Some I2C devicescan actas mastersorslaves,buttheADS1000 can onlyactas a slavedevice. An I2C bus consistsoftwo lines,SDA and SCL. SDA carriesdata;SCL providestheclock.Alldataistransmitted acrosstheI2C bus ingroupsofeightbits.To send a biton theI2C bus,theSDA lineisdriventothebitlevel whileSCL islow (a Low on SDA indicatesthe bitis0; a High indicatesthe bitis1).Once the SDA linehas settled,the SCL lineisbroughthigh,then low.Thispulseon SCL clocksthe SDA bitintothe receivershift register. The I2C bus isbidirectional:theSDA lineisused bothfortransmittingand receivingdata.When a masterreads froma slave,theslavedrivesthedataline;when a mastersends toa slave,themasterdrivesthedataline.The masteralwaysdrivestheclockline.The ADS1000 neverdrivesSCL, because itcannotactas a master.On the ADS1000, SCL isan inputonly. Most ofthetimethebus isidle,no communicationtakesplace,and bothlinesare high.When communication takesplace,thebus isactive.Only masterdevicescan starta communication.They do thisby causinga start conditionon thebus.Normally,thedatalineisonlyallowedtochange statewhiletheclocklineislow.Ifthedata linechanges statewhiletheclocklineishigh,itiseithera startconditionoritscounterpart,a stopcondition.A startconditioniswhen theclocklineishighand thedatalinegoes fromhightolow.A stopconditioniswhen the clocklineishighand thedatalinegoes fromlowtohigh. Afterthe master issuesa startcondition,itsends a byte thatindicateswithwhich slavedeviceitwants to communicate.Thisbyteiscalledtheaddressbyte. Each deviceon an I2C bus has a unique7-bitaddressto which itresponds.(Slavescan alsohave 10-bitaddresses;see the I2C specificationfordetails.)The master sends an addressintheaddressbyte,togetherwitha bitthatindicateswhetheritwishestoreadfromorwriteto theslavedevice. Everybytetransmittedon theI2C bus,whetheritbe addressordata,isacknowledgedwithan acknowledgebit. When a masterhas finishedsendinga byte,eightdatabits,toa slave,itstopsdrivingSDA and waitsforthe slavetoacknowledgethebyte.The slaveacknowledgesthebyteby pullingSDA low.The masterthensends a clockpulsetoclocktheacknowledgebit.Similarly,when a masterhas finishedreadinga byte,itpullsSDA low to acknowledge to the slavethatithas finishedreadingthe byte.Itthen sends a clockpulseto clockthe bit. (Remember thatthemasteralwaysdrivestheclockline.) A not-acknowledgeisperformedby simplyleavingSDA highduringan acknowledge cycle.Ifa deviceisnot presenton thebus,and themasterattemptstoaddressit,itwillreceivea not-acknowledgebecause no deviceis presentatthataddresstopullthelinelow. When a masterhas finishedcommunicatingwitha slave,itmay issuea stopcondition.When a stopconditionis issued,thebus becomes idleagain.A mastermay alsoissueanotherstartcondition.When a startconditionis issuedwhilethebus isactive,itiscalleda repeatedstartcondition. A timingdiagram foran ADS1000 I2C transactionisshown inFigure6. Table 1 givesthe parametersforthis diagram.

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t(BUF) t(HDST A) t(LOW) tR tF t(HDDA T) t(HIGH) t(SUST A) t(SUDA T) t(HDST A) t(SUSTO) SCL SDA P S S P ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 Figure6. I2C Timing Diagram Table1.Timing Diagram Definitions FAST MODE HIGH-SPEED MODE PARAMETER MIN MAX MIN MAX UNITS SCLK operatingfrequency f(SCLK) 0.4 3.4 MHz Bus freetimebetween STOP and START t(BUF) 600 160 ns conditions HoldtimeafterrepeatedSTART condition t(HDSTA) 600 160 ns Afterthisperiod,thefirstclockisgenerated. Repeated START conditionsetuptime t(SUSTA) 600 160 ns STOP conditionsetuptime t(SUSTO) 600 160 ns Data holdtime t(HDDAT) 0 0 ns Data setuptime t(SUDAT) 100 10 ns SCLK clocklowperiod t(LOW) 1300 160 ns SCLK clockhighperiod t(HIGH) 600 60 ns Clock/datafalltime tF 300 160 ns Clock/datarisetime tR 300 160 ns ADS1000 I2C ADDRESSES The ADS1000 I2C addressiseither1001000 or1001001,setatthefactory.The addressisidentifiedwithan A0 oran A1 withintheorderablename. The two differentI2C variantsare also marked differently.Devices withan I2C address of 1001000 have packagesmarked BD0 ,whiledeviceswithan I2C addressof1001001 aremarked withBD1 . I2C GENERAL CALL The ADS1000 respondstoGeneralCallReset,whichisan addressbyteof00h followedby a databyteof06h. The ADS1000 acknowledgesbothbytes. On receivinga General CallReset,the ADS1000 performsa fullinternalreset,justas though ithad been powered offand thenon.Ifa conversionisinprocess,itisinterrupted;theoutputregisterissettozero,and the configurationregisterreturnstoitsdefaultsetting. The ADS1000 always acknowledgesthe GeneralCalladdressbyteof 00h, but itdoes not acknowledge any GeneralCalldatabytesotherthan04h or06h. I2C DATA RATES The I2C bus operatesinone ofthreespeed modes: Standard,whichallowsa clockfrequencyofup to100kHz; Fast,whichallowsa clockfrequencyofup to400kHz;and High-speedmode (alsocalledHs mode),whichallows a clockfrequencyofup to3.4MHz.The ADS1000 isfullycompatiblewithallthreemodes. No specialactionneeds tobe takentouse theADS1000 inStandardorFastmodes, butHigh-speedmode must be activated.To activateHigh-speedmode, send a specialaddress byte of 00001XXX followingthe start Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):ADS1000-Q1

SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com condition,where theXXX bitsareuniquetotheHs-capablemaster.ThisbyteiscalledtheHs mastercode.(Note thatthisisdifferentfromnormaladdressbytes;thelowbitdoes notindicateread/writestatus.)The ADS1000 will notacknowledgethisbyte;theI2C specificationprohibitsacknowledgmentoftheHs mastercode.On receivinga mastercode,theADS1000 willswitchon itsHigh-speedmode filters,and willcommunicateatup to3.4MHz.The ADS1000 switchesoutofHs mode withthenextstopcondition. Formore informationon High-speedmode, consulttheI2C specification. REGISTERS The ADS1000 has two registersthatareaccessibleviaitsI2C port.The outputregistercontainstheresultofthe lastconversion;theconfigurationregisterallowsuserstochange theADS1000 operatingmode and querythe statusofthedevice. OUTPUT REGISTER The 16-bitoutputregistercontainstheresultofthelastconversioninbinarytwo’s complement format.Sincethe portyields12 bitsof data,the ADS1000 outputsright-justifiedand sign-extendedcodes.This outputformat makes itpossibletoperformaveragingusinga 16-bitaccumulator. Followingresetor power-up,the outputregisterisclearedto 0; itremains zero untilthe firstconversionis completed.Therefore,ifa userreadstheADS1000 justafterresetorpower-up,theoutputregisterwillread0. The outputregisterformatisshown inTable2. Table2.OUTPUT REGISTER BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 NAME D15 (1) D14 (1) D13 (1) D12 (1) D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 (1) D15 –D12 aresignextensionsof12-bitdata. CONFIGURATION REGISTER A user controlsthe ADS1000 operatingmode and PGA settingsvia the 8-bitconfigurationregister.The configurationregisterformatisshown inTable3.The defaultsettingis80H. Table3.CONFIGURATION REGISTER 7 6 5 4 3 2 1 0 ST/BSY 0 0 SC 0 0 PGA1 PGA0 Bit7:ST/BSY The meaning oftheST/BSY bitdepends on whetheritisbeingwrittentoorreadfrom. Insingleconversionmode, writinga 1 totheST/BSY bitcauses a conversiontostart,and writinga 0 has no effect.Incontinuousconversionmode, theADS1000 ignoresthevaluewrittentoST/BSY. When readinsingleconversionmode, ST/BSY indicateswhethertheA/D converterisbusy takinga conversion. IfST/BSY isreadas 1,theA/D converterisbusy,and a conversionistakingplace;if0,no conversionistaking place,and theresultofthelastconversionisavailableintheoutputregister. Incontinuousmode, ST/BSY isalwaysreadas 1. Bits6 -5:Reserved Bits6 and 5 must be settozero. Bit4:SC SC controlswhethertheADS1000 isincontinuousconversionor singleconversionmode. When SC is1,the ADS1000 isinsingleconversionmode; when SC is0, the ADS1000 isincontinuousconversionmode. The defaultsettingis0. Bits3 -2:Reserved Bits3 and 2 must be settozero.

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Frame□1:□I C□Slave□Address□Byte Frame□2:□Output□Register□Upper□Byte Start□By Master ACK□By ADS1000 ACK□By Master From ADS1000 From ADS1000 1 9 1 9

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  • ··SDA SCL SDA (Continued) SCL (Continued) 1 0 0 1 A2 A1 A0 R/W D15 D14 D13 D12 D11 D10 D9 D8 Frame□3:□Output□Register□Lower□Byte Frame□4:□Configuration□Register (Optional) ACK□By Master Stop□By Master ACK□By Master From ADS1000 1 9 1 D7 D6 D5 D4 D3 D2 D1 D0 ST/ BSY 0 0 SC 0 0 PGA1 PGA0 ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 Bits1 -0:PGA Bits1 and 0 controltheADS1000 gainsetting;see Table4. Table4.PGA Bits PGA1 PGA0 GAIN 0(1) 0(1) 1(1) 0 1 2 1 0 4 1 1 8 (1)Defaultsetting READING FROM THE ADS1000 A usercan readtheoutputregisterand thecontentsoftheconfigurationregisterfromtheADS1000. To do this, addressthe ADS1000 forreading,and read threebytesfrom the device.The firsttwo bytesare the output registercontents;thethirdbyteistheconfigurationregistercontents. A userdoes notalwayshave toread threebytesfrom theADS1000. Ifonlythecontentsoftheoutputregister areneeded,readonlytwo bytes. Reading more thanthreebytesfromtheADS1000 has no effect.Allofthebytesbeginningwiththefourthbyte willbe FFh.See Figure7 fora timingdiagramofan ADS1000 readoperation. WRITING TO THE ADS1000 A usercan writenew contentsintotheconfigurationregister(thecontentsoftheoutputregistercannotchange). To do this,addresstheADS1000 forwriting,and writeone bytetoit.Thisbyteiswrittenintotheconfiguration register. Writingmore thanone bytetotheADS1000 has no effect.The ADS1000 ignoresany bytessenttoitafterthe firstone, and willonlyacknowledge the firstbyte.See Figure8 fora timingdiagram of an ADS1000 write operation. Figure7. Timing Diagram forReading from theADS1000 Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):ADS1000-Q1

Frame□1:□I C□Slave□Address□Byte Frame□2:□Configuration□Register Start□By Master ACK□By ADS1000 ACK□By ADS1000 1 9 1 9 SDA SCL 0 0 1 A2 A1 A0 R/W ST/ BSY 0 0 SC PGA1 PGA0 Stop□By Master 0 0 ADS1000-Q1 SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com Figure8. Timing Diagram forWritingtotheADS1000

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Positive□Input (0V□to□5V) Negative□Input (0V□to□5V) VDD VDD 4.7 F□(typ.)/c109 Microcontroller□or Microprocessor with□I C□Port SCL SDA I C□Pull-Up□Resistors 1k to□10k (typ.)/c87 /c87 ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010

APPLICATION INFORMATION

For many applications,connectingthe ADS1000 is extremelysimple.A basicconnectiondiagram forthe ADS1000 isshown inFigure9. The fullydifferentialvoltageinputoftheADS1000 isidealforconnectiontodifferentialsourceswithmoderately low source impedance, such as bridgesensors and thermistors.Althoughthe ADS1000 can read bipolar differentialsignals,itcannotacceptnegativevoltageson eitherinput.Itmay be helpfultothinkoftheADS1000 positivevoltageinputas noninverting,and ofthenegativeinputas inverting. When the ADS1000 isconverting,itdraws currentinshortspikes.The 0.1mF bypass capacitorsuppliesthe momentary burstsofextracurrentneeded fromthesupply. The ADS1000 interfacesdirectlyto standardmode, fastmode, and high-speedmode I2C controllers.Any microcontrollerI2C peripheral,includingmaster-onlyand non-multiple-masterI2C peripherals,willwork withthe ADS1000. The ADS1000 does notperformclock-stretching(thatis,itneverpullstheclocklinelow),so itisnot necessarytoprovideforthisunlessotherdevicesareon thesame I2C bus. Pull-upresistorsarenecessaryon boththeSDA and SCL linesbecause I2C bus driversareopen-drain.The size oftheseresistorsdepends on thebus operatingspeed and capacitanceofthebus lines.Higher-valueresistors consume lesspower,butincreasethetransitiontimeson thebus,limitingthebus speed.Lower-valueresistors allowhigherspeed attheexpense ofhigherpower consumption.Long bus lineshave highercapacitanceand requiresmallerpullupresistorstocompensate.The resistorsshouldnotbe toosmall;iftheyare,thebus drivers may notbe abletopullthebus lineslow. Figure9. TypicalConnections oftheADS1000 CONNECTING MULTIPLE DEVICES Connectingtwo ADS1000s toa singlebus isalmosttrivial.An example showingtwo ADS1000 devicesand one ADS1100 connectedon a singlebus isshown inFigure10.Multipledevicescan be connectedtoa singlebus (providedthattheiraddressesaredifferent). Note thatonlyone setofpullupresistorsisneeded perbus.A usermightfindthathe orshe needs tolowerthe pullupresistorvaluesslightlyto compensate forthe additionalbus capacitancepresentedby multipledevices and increasedlinelength. Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):ADS1000-Q1

I C□Pull-Up□Resistors 1k to□10k (typ.)/c87 /c87 VDD Microcontroller□or Microprocessor with□I C□Port VIN/c45VIN+ SCL GND VDD SDA ADS1000A0 VIN/c45VIN+ SCL GND VDD SDA ADS1000A1 VIN/c45VIN+ SCL GND VDD SDA ADS1100A2NOTE:□ADS1000□power and□input□connections omitted□for□clarity. VIN/c45VIN+ SCL GND VDD SDA ADS1000 VDD Microcontroller□or Microprocessor with□I C□Port SCL SDA NOTE:□ADS1000□power and□input□connections omitted□for□clarity. ADS1000-Q1 SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com Figure10. Connecting MultipleADS1000s USING GPIO PORTS FOR I2C Most microcontrollershave programmable input/outputpinsthatcan be set in softwareto act as inputsor outputs.Ifan I2C controllerisnot available,the ADS1000 can be connectedto GPIO pins,and the I2C bus protocolsimulated,orbit-banged,insoftware.An example ofthisfora singleADS1000 isshown inFigure11. Figure11. Using GPIO witha SingleADS1000 Bit-bangingI2C withGPIO pinscan be done by settingtheGPIO linetozeroand togglingitbetween inputand outputmodes toapplytheproperbus states.To drivethelinelow,thepinissettooutputa 0;toletthelinego high,thepinissettoinput.When thepinissettoinput,thestateofthepincan be read;ifanotherdeviceis pullingthelinelow,thisdevicewillreadas a 0 intheportinputregister. Note thatno pullupresistorisshown on the SCL line.In thissimplecase,the resistorisnot needed; the microcontrollercan simplyleavethelineon output,and setitto1 or0 as appropriate.Itcan do thisbecause the ADS1000 never drivesitsclocklinelow.Thistechniquecan alsobe used withmultipledevices,and has the advantageoflowercurrentconsumptionresultingfromtheabsence ofa resistivepullup.

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Filter□Capacitor 33pF□to□100pF (typ.) 0V V Single-Ended /c45 DD ADS1000-Q1 www.ti.com SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 Ifthereare any deviceson thebus thatmay drivetheirclocklineslow,theabove method shouldnotbe used; theSCL lineshouldbe high-Zorzeroand a pullupresistorprovidedas usual.Note alsothatthiscannotbe done on theSDA lineinany case,because theADS1000 does drivetheSDA linelow from timetotime,as allI2C devicesdo. Some microcontrollershave selectablestrongpullupcircuitsbuiltintotheGPIO ports.Insome cases,thesecan be switchedon and used in placeof an externalpullupresistor.Weak pullupsare alsoprovidedon some microcontrollers,butusuallytheseare tooweak forI2C communication.Ifthereisany doubtaboutthematter, testthecircuitbeforecommittingittoproduction. SINGLE-ENDED INPUTS Althoughthe ADS1000 has a fullydifferentialinput,itcan easilymeasure single-endedsignals.A simple single-endedconnectionscheme is shown in Figure 12. The ADS1000 is configuredfor single-ended measurement by groundingeitherof itsinputpins,usuallyVIN–, and applyingthe inputsignalto VIN+. The single-endedsignalcan range from –0.2V toVDD + 0.3V.The ADS1000 losesno linearityanywhere initsinput range.Negativevoltagescannotbe appliedtothiscircuitbecause theADS1000 inputscan onlyacceptpositive voltages. Figure12. Measuring Single-EndedInputs The ADS1000 inputrange isbipolardifferentialwithrespectto the reference,thatis,±VDD . The single-ended circuitshown inFigure12 coversonlyhalftheADS1000 inputscalebecause itdoes notproducedifferentially negativeinputs;therefore,one bitof resolutionislost.The DRV134 balancedlinedrivercan be employed to regainthisbitforsingle-endedsignals. Negativeinputvoltagesmust be level-shifted.A good candidateforthisfunctionisthe THS4130 differential amplifier,whichcan outputfullydifferentialsignals.Thisdevicecan alsohelprecoverthelostbitnotedpreviously forsingle-endedpositivesignals.Level-shiftingcan alsobe performedusingtheDRV134. Copyright© 2009–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):ADS1000-Q1

NOTES:□□(1)□Pull-down□resistor□to□allow□accurate□swing□to□0V. (2)□R is□sized□for□a□50mV□drop□at□full-scale□current.S V Load RS (2) 1k/c87 G□=□12.5 /c45 5V OPA335 R 49.9k /c87 (1) FS□=□0.63V 5V5V 11.5k/c87 ADS1000 I C (PGA□Gain□=□8) 5V□FS ADS1000-Q1 SBAS480A –SEPTEMBER 2009–REVISED AUGUST 2010 www.ti.com LOW-SIDE CURRENT MONITOR Figure13 shows a circuitfora low-sideshunt-typecurrentmonitor.The circuitreadsthevoltageacrossa shunt resistor,whichissizedas smallas possiblewhilestillgivinga readableoutputvoltage.Thisvoltageisamplified by an OPA335 low-driftop-amp,and theresultisreadby theADS1000. Figure13. Low-Side CurrentMeasurement Itisrecommended thattheADS1000 be operatedata gainof8.The gainoftheOPA335 can thenbe setlower. For a gainof8,theop amp shouldbe configuredtogivea maximum outputvoltageofno greaterthan0.75V.If theshuntresistorissizedtoprovidea maximum voltagedropof50mV atfull-scalecurrent,thefull-scaleinputto theADS1000 is0.63V. ADDITIONAL RECOMMENDATIONS The ADS1000 isfabricatedina small-geometrylow-voltageprocess.The analoginputsfeatureprotectiondiodes to the supplyrails.However, the current-handlingabilityof thesediodesislimited,and the ADS1000 can be permanentlydamaged by analoginputvoltagesthatremainmore thanapproximately300mV beyond therailsfor extendedperiods.One way toprotectagainstovervoltageistoplacecurrent-limitingresistorson theinputlines. The ADS1000 analoginputscan withstandmomentary currentsofas largeas 10mA. The previousparagraphdoes notapplytotheI2C ports,whichcan bothbe drivento6V regardlessofthesupply. IftheADS1000 isdrivenby an op amp withhighvoltagesupplies,such as ±12V, protectionshouldbe provided, even iftheop amp isconfiguredso thatitwillnotoutputout-of-rangevoltages.Many op amps seek toone ofthe supplyrailsimmediatelywhen power isapplied,usuallybeforetheinputhas stabilized;thismomentary spikecan damage theADS1000. Sometimes thisdamage isincrementaland resultsinslow,long-termfailure— whichcan be disastrousforpermanentlyinstalled,low-maintenancesystems. Ifusingan op amp orotherfront-endcircuitrywiththeADS1000, be suretotaketheperformancecharacteristics ofthiscircuitryintoaccount;a chainisonlyas strongas itsweakestlink. Any dataconverterisonlyas good as itsreference.FortheADS1000, thereferenceisthepower supply,and the power supplymust be cleanenough to achievethe desiredperformance.Ifa power-supplyfiltercapacitoris used,itshouldbe placedclosetotheVDD pin,withno viasplacedbetween thecapacitorand thepin.The trace leadingtothepinshouldbe as wideas possible,even ifitmust be necked down atthedevice.

14 SubmitDocumentationFeedback Copyright© 2009–2010,Texas InstrumentsIncorporated

ProductFolderLink(s):ADS1000-Q1

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) ADS1000A0QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ADS1000A1QDBVRQ1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF ADS1000-Q1 :

  • Catalog:ADS1000 NOTE: Qualified Version Definitions:
  • Catalog - TI's standard catalog product PACKAGE OPTION ADDENDUM www.ti.com 5-Jan-2010 Addendum-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 1-Dec-2011 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS1000A0QDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 ADS1000A1QDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 1-Dec-2011 Pack Materials-Page 2

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