ADPM12160 AD | Alldatasheet
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Technical content
1600W, Nonisolated Quarter-Brick DC-DC Power Module ADPM12160 Rev 0; 10/25 © 2025 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Product Features
- Electrical
- 40V to 60V Input Voltage Range
- 12V Fully Regulated Output Voltage
- Thermal Design Power up to 1600W
- Peak Power up to 2400W
- Peak Efficiency up to 98% at Half Load
- Fully Protected: OTP, Input UVLO and OVLO, Input OCP, Output OVP, Output OCP and SCP
- No Minimum Load Required
- Fast Load-Transient Response with Coupled Inductor
- Optional Logic for Remote ON/OFF (REM)
- PMBus™ Configuration
- Event Data Recorder (Black Box)
- Parallel Operation with Active Current Sharing
- Nonisolated
- Mechanical
- Industry-Standard Quarter-Brick Footprint: 0.59in)
- Optional Pin Length: 2.79mm, 3.70mm, or 4.32mm
- Safety and Certification
- IEC/UL/EN/CSA 62368-1
- Compliance with RoHS EU Directive 2011/65/EU and (EU)2015/863
- ISO 9001, TL 9000, ISO 14001, ISO 45001 Certified Manufacturing Facility Key Applications
- Distributed Power Architectures
- Wireless Networks
- Access and Optical Network Equipment
- Enterprise Networks
- Latest-Generation ICs (DSP, FPGA, and ASIC) and Microprocessor-Powered Applications General Description The ADPM12160 is a high -power, quarter-brick DC-DC converter that provides up to 98% efficiency at half load. The ADPM12160 is a nonisolated converter that delivers a fully regulated 12V output with a continuous power level of 1600W and a peak power capability of up to 2400W for limited time. Ordering Information appears at the end of the data sheet.
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 2 Absolute Maximum Ratings IN to GND (when V IN > VIN, OVLO, module enters into input Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational section s of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Electrical Characteristics
(VIN = 40V to 60V, TA = +25°C, CIN, EXT = 200µF, C OUT, EXT = 1500µF (550µF MLCC, OS -CON for others), resistive load, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INPUT CHARACTERISTICS Operating Input Voltage VIN 40 54 60 V Input Current IIN VIN = 40V to 60V, no load 160 mA VIN = 40V, full load 45 A VIN = 54V, disabled by REM 10 mA Input Reflected Ripple Current IIN, RIPPLE (see Figure 1) 300 mA, pk- pk Recommended External Input Capacitance CIN, EXT 200 µF REMOTE CONTROL CHARACTERISTICS REM Logic Threshold VREM Logic high 2.4 20 V Logic low 0.8 REM Current IREM VREM = 0V 0.3 mA Leakage Current Logic high, VREM = 20V 30 µA REM Voltage when Floating VREM_FLOATI NG 3 V OUTPUT CHARACTERISTICS Output Voltage Set Point VOUT, SET VIN = 54V, IOUT = 0A 11.88 12 12.12 V Over VIN, IOUT range 11.64 12.36 Output Current Range IOUT VIN = 40V to 60V 0 133.3 A Peak Current Duration IOUT up to 200A 150 ms Line Regulation VIN = 40V to 60V, IOUT = 0A 60 mV Load Regulation VIN = 54V, IOUT = 0A to IOUT, MAX 120 mV Temperature Coefficient TA = -40°C to +85°C 200 ppm/°C External Output Capacitance COUT, EXT No less than 550µF for ceramic, oscon for others 1500 30000 µF Dynamic Response ΔVOUT, OVERSHOOT 75% ~ 50% of IOUT, MAX load step, di/dt = 1A/µs 250 mV ΔVOUT, UNDERSHOOT 50% ~ 75% of IOUT, MAX load step, di/dt = 1A/µs 250 Settling time COUT, EXT = 1500µF, di/dt = 1A/µs Within 1% nominal VOUT 200 µs
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 3 (VIN = 40V to 60V, TA = +25°C, CIN, EXT = 200µF, C OUT, EXT = 1500µF (550µF MLCC, OS -CON for others), resistive load, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Ripple and Noise IOUT = IOUT, MAX, COUT, EXT = 1500µF + 10µF tantalum + 1µF ceramic 5Hz to 20MHz bandwidth 120 mV, pk- pk 5Hz to 20MHz bandwidth 10 50 mV, RMS Turn-On Delay Time tON, DELAY Time from instant at which VIN = 40V, from REM assertion to VOUT = 10% of VOUT, SET 300 ms Turn-On Rise Time tRISE Time for VOUT to rise from 10% to 90% of VOUT, SET 45 ms Current Sharing Accuracy 30% ~ 100% load Four modules in parallel operation -10 +10 % Power-Good Signal VPGOOD 0 3.6 V PROTECTION CHARACTERISTICS Input Undervoltage Lockout VIN, UVLO VIN rising 37 38 39 V VIN falling 36 37 38 Input Overvoltage Lockout VIN, OVLO Latch off1 66 V Output Overvoltage Lockout VOUT, OVLO Latch off1 13.5 V Output Overcurrent Protection IOCP Latch off1 275 A Output Short-Circuit Protection Latch off1 Overtemperature Protection TOTP Retry1, PMBus report temperature 122 °C GENERAL SPECIFICATIONS Efficiency η VIN = 40V, half load 98.0 % VIN = 54V, half load 97.8 VIN = 54V, full load 97.5 Switching Frequency fSW VIN = 54V, full load Fixed frequency 180 kHz FIT 109/MTBF 182 MTBF Telcordia SR-332, Issue 4, 2016, TA = +40°C 5.5 x 106 hours Weight 100 g PMBUS CLK, DATA Input Logic Threshold VIL Logic low 0.8 V VIH Logic high 2.1 3.6 Output Logic Low VOL Sinking current = 4mA CLK, DATA, and ALERT pins 0.4 V Leakage Current CLK, DATA, and ALERT pins; logic output high -5 +5 µA Input Capacitance CLK, DATA, and ALERT pins; inside the module 50 pF CLK Frequency fCLK 100 kHz Input Voltage Reporting Accuracy -2 +2 V
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 4 (VIN = 40V to 60V, TA = +25°C, CIN, EXT = 200µF, C OUT, EXT = 1500µF (550µF MLCC, OS -CON for others), resistive load, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Output Voltage Reporting Accuracy -0.25 +0.25 V Output Current Reporting Accuracy < 30% load -3 +3 A Temperature Reporting Range -40 +125 °C Temperature Reporting Accuracy -5 +5 °C Note 1: The fault response is programmable with the options of retry, latch off, and ignore. See the MFR_FAULT_RESPONSE (D9h) section for more details. Note 2: Safety: Compliant with IEC 62368-1, UL 62368-1, EN 62368-1, and CSA 62368-1 Note 3: Vibration: IEC 60068-2-6, 10Hz to 500Hz sweep, 0.75mm excursion, 10g acceleration, 10min in each three perpendicular directions Note 4: Transportation: ETS 300019-1-2 Note 5: Shock: IEC 60068-2-27, 200g acceleration, duration 3ms, six drops in each three perpendicular directions
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 5 Typical Operating Characteristics (TA = +25°C, VIN = 54V, VOUT = 12V, unless otherwise noted.)
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 6 (TA = +25°C, VIN = 54V, VOUT = 12V, unless otherwise noted.)
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 7 Pin Configurations QUARTER BRICK (58.4mm × 36.8mm)1 IN BOTTOM VIEW
2 REM
3 GND
1 IN Positive Input. Remote ON/OFF Control. With active-high modules, pull it high or leave it open to enable the output of the module. Pull it low to disable the output. With active-low modules, pull it high or leave it open to disable the output of the module. Pull it low to enable the output. 3, 4, 5 GND Power Ground 6, 7 OUT Positive Output 8 PGOOD Power-Good Output. Internally pulled up to 3.3V bias through a 10kΩ resistor. 9 DGND Digital Ground. Internally connected to GND through a single point. 10 DATA PMBus Data. Internally pulled up to 3.3V bias through a 10kΩ resistor. 11 ALERT PMBus Alert. Internally pulled up to 3.3V bias through a 10kΩ resistor. 12 CLK PMBus Clock. Internally pulled up to 3.3V bias through a 10kΩ resistor. 13 ADDR PMBus Address Configuration. Connect a resistor from the ADDR pin to DGND to select the proper module address.
14 ISHARE
Active Current Sharing. For standalone operation, leave this pin open. For parallel operation, tie the ISHARE pin of each module together. Do not leave this pin open.
voltage is above the overvoltage fault limit, the module shuts down immediately, and enters into latched mode by default. temperature is within specification. caused by the module’s output voltage deviation, temperature deviation, and layout asymmetry. Figure 3. Active Current-Sharing Diagram with Two Modules
- The inputs of the modules must be connected to the same voltage source.
- When multiple modules are connected in parallel, ensure that the input loop and output loop of each module are as symmetrical as possible.
- The ISHARE of each parallel module must be connected with the shortest wires.
- The REM pin of the modules in parallel must be connected together.
Table 2. PMBus Address coefficients to calculate the desired values. Table 3 lists the coefficients used by the module. Table 3. PMBus Command Code Coefficients the 2-byte, two’s complement integer received from the module; b is the offset; and R is the exponent.
value in units such as volts, to be converted for transmission; b is the offset; and R is the exponent. only certain PMBus commands can be accessed with the serial port. See Table 4 for a complete list of PMBus commands. LOCK status bit in STATUS_MFR_SPECIFIC is always available to indicate whether the module is locked or unlocked. The supported PMBus commands are listed in Table 4. Table 4. PMBus Command Codes
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 14 CODE COMMAND NAME TYPE PAGE (Note 1) NO. OF BYTES FLASH STORED/ LOCKED (Note 2) DEFAULT VALUE (Note 2) 0-11 12-15 16-20 255 5Eh POWER_GOOD_ON R/W word R/W R/W — — 2 Y/Y 0546h (Note 4) 5Fh POWER_GOOD_OFF R/W word R/W R/W — — 2 Y/Y 0520h (Note 4) 60h TON_DELAY R/W word R/W — — — 2 Y/Y See Table 6 62h TON_MAX_FAULT_LIMIT R/W word R/W — — — 2 Y/Y 01F4h (Note 4) 64h TOFF_DELAY R/W word R/W — — — 2 Y/Y See Table 6 79h STATUS_WORD Read word R R R R 2 N/N 0000h 7Ah STATUS_VOUT Read byte R R — — 1 N/N 00h 7Bh STATUS_IOUT Read byte R R — — 1 N/N 00h 7Ch STATUS_INPUT Read byte R R — — 1 N/N 00h 7Dh STATUS_TEMPERATURE Read byte — — R — 1 N/N 00h 7Eh STATUS_CML Read byte R R R R 1 N/N 00h 80h STATUS_MFR_SPECIFIC Read byte R — — R 1 N/N 00h 88h READ_VIN Read word R R — — 2 N/N 0000h 89h READ_IIN Read word R R — — 2 N/N 0000h 8Bh READ_VOUT Read word R R — — 2 N/N 0000h 8Ch READ_IOUT Read word R R — — 2 N/N 0000h 8Dh READ_TEMPERATURE_1 Read word — — R — 2 N/N 0000h 98h PMBUS_REVISION Read byte R R R R 1 FIXED/N 11h 9Eh MFR_SERIAL R/W 64 R/W R/W R/W R/W 8 Y/Y (Note 6) D1h MFR_MODE R/W word R/W R/W R/W R/W 2 Y/Y 0022h D4h MFR_VOUT_PEAK R/W word R/W R/W — — 2 N/Y 0000h D5h MFR_IOUT_PEAK R/W word R/W R/W — — 2 N/Y 0000h D6h MFR_TEMPERATURE_PE AK R/W word — — R/W — 2 N/Y 8000h D7h MFR_VOUT_MIN R/W word R/W R/W — — 2 N/Y 7FFFh D8h MFR_NV_LOG_CONFIG R/W word R/W R/W R/W R/W 2 Y/Y 0000h D9h MFR_FAULT_RESPONSE R/W 32 R/W R/W — — 4 Y/Y See Table 6 DAh MFR_FAULT_RETRY R/W word R/W R/W R/W R/W 2 Y/Y 1388h DCh MFR_NV_FAULT_LOG Read 32 R R R R 255 Y/Y (Note 7) DDh MFR_TIME_COUNT R/W 32 R/W R/W R/W R/W 4 N/Y (Note 8) DFh MFR_MARGIN_CONFIG R/W word R/W — — — 2 Y/Y 403Eh (Note 4) E2h MFR_IOUT_AVG R/W word R R — — 2 N/Y 0000h ECh MFR_CONFIG_VERSION R/W word — — — R/W 2 N/N 0000h EEh MFR_STORE_ALL Write byte W W W W 1 N/Y — EFh MFR_RESTORE_ALL Write byte W W W W 1 N/Y —
Note 1: Common commands are shaded; access through any page results in the same response. The module unlocks if the upper 4 bytes of MFR_SERIAL match the data written to the module. Note 3: 14h for REM active-low modules, 16h for REM active-high modules. Note 4: When PAGE = 02h for output voltage configuration. Note 5: When PAGE = 12h (18d) for temperature configuration. Note 6: The factory-set default value for this 8-byte block is 3130313031303130h. Note 7: The factory-set default value for the complete block of the MFR_NV_FAULT_LOG is FFh. Note 8: The factory-set default value for this 4-byte block is 00000040h. Note 9: 5BC4h for REM active-low modules, AA7Ch for REM active-high modules. temperature. All of the monitoring and control is accomplished using one PMBus address. the same effect on and the same response from the module. See Table 5 for PAGE commands. few commands (OPERATION, CLEAR_FAULTS) where this function has a real application. Table 5. PAGE (00h) Commands 0, 1, 15 Internal used. Do NOT change any values in these pages. 2 Output voltage monitoring and control. 3 PGOOD output delay control. 5 Phase 1 current monitoring and control.
6 Phase 2 current monitoring and control. 7 Phase 3 current monitoring and control. 8 Phase 4 current monitoring and control. 9 Input voltage monitoring and control. 10 Input current monitoring and control. 14 Accurate output current monitoring, READ_IOUT (8Ch) command only. 18 PCB board temperature monitoring and control. Table 6. Default Values for Voltage/Current Setting pin (if enabled) instructs the module to change to another state. The valid OPERATION command byte values are shown in Table 7. Table 7. OPERATION (01h) Command Byte byte is set to 40h, the output powers down according to the programmed turn-off delay.
In most cases, for power-on and power-off control, the OPERATION command should be sent when PAGE is set to 255. warning or fault and responds as programmed. “Ignore all faults” means that all warnings and faults on output are ignored. To begin the margining function, the output must exceed its POWER_GOOD_ON value. Table 8. ON_OFF_CONFIG (02h) Command Byte 7:6 Reserved. N/A Always returns 00.
5 OPERATION command and
0 OPERATION command is ANDed with REM pin if both are enabled. 1 OPERATION command is ORed with REM pin if both are enabled. 0 Turns on the module when input is present, regardless of the REM pin. 1 Uses the REM pin (if enabled) and/or OPERATION command (Note 1).
3 OPERATION command
0 On/off portion of the OPERATION command disabled. 1 OPERATION command enabled. 0 Uses the programmed turn-off delay (soft-off). 1 Turns off the module immediately. and either can turn the module off. CLEAR_FAULTS command is executed. This command is write-only. There is no data byte for this command. memory. All supported commands can have their parameters read, regardless of the WRITE_PROTECT settings. No fault or error is generated if the host attempts to write to a protected area. The WRITE_PROTECT message content is described in Table 9. Table 9. WRITE_PROTECT (10h) Command Byte 80h Disables all writes except the WRITE_PROTECT command. 40h Disables all writes except the WRITE_PROTECT, OPERATION, and PAGE commands. 00h Enables writes for all commands (default).
the module configuration data. See Figure 8. The flash memory has three separate arrays for configuration parameters, whereas the RAM only has a single array. factory, the MAIN and BACKUP flash memory arrays are identical and are configured as shown in Table 4 and Table 6. commands are described in Table 10. Figure 8. Configuration Data Management Table 10. Memory Transfer PMBus Commands STORE_DEFAULT_ALL Copies RAM OPERATING to the flash MAIN. RESTORE_DEFAULT_ALL Copies the flash MAIN to RAM OPERATING. MFR_STORE_ALL CODE = 00h Copies RAM OPERATING to the flash MAIN. CODE = 01h Copies RAM OPERATING to the flash BACKUP. MFR_RESTORE_ALL CODE = 00h Copies the flash MAIN to RAM OPERATING. CODE = 01h Copies the flash BACKUP to RAM OPERATING. MFR_STORE_SINGLE Copies RAM OPERATING (single parameter) to the flash SINGLE. STATUS_CML. This command is write-only. There is no data byte for this command. MFR_STORE_SINGLE command allows a single command to be stored in much less time, 310µs. The RESTORE_DEFAULT_ALL command instructs the module to copy the flash MAIN memory to RAM OPERATING. STORE_DEFAULT_ALL must be issued, followed by a power reset.
Upon a module power-on reset, this command is automatically executed by the module without PMBus action required. operates the same as STORE_DEFAULT_ALL. monitor power supplies while transferring the configuration. The time required to complete this task is 80ms. operates the same as RESTORE_DEFAULT_ALL. STORE_DEFAULT_ALL or MFR_STORE_ALL must be issued. single command to be stored in 310µs.
- No bits are set in STATUS_CML. The MFR_STORE_SINGLE command should only be invoked a maximum of 85
RAM OPERATING or the flash MAIN or BACKUP memory arrays. A CRC value for the flash SINGLE array is not available. returns FFFFh when read. See Table 11. Table 11. MFR_CRC (FEh) Command Byte fails, the module does not power up.
read-only. The message content is described in Table 12. Table 12. CAPABILITY (19h) Command Byte 7 Packet-error checking 0 = PEC not supported. 6:5 PMBus speed 01 = Maximum supported bus speed is 400kHz. 4 ALERT 1 = Supports an ALERT output (ALERT is enabled in MFR_MODE). 0 = Does not support an ALERT output (ALERT is disabled in MFR_MODE). 3:0 Reserved Always returns 0000. 1) Sets the MARGIN bit in STATUS_WORD. 2) Sets the MARGIN_FAULT bit in STATUS_MFR_SPECIFIC (PAGE 2). 3) Notifies the host through ALERT assertion (if enabled in MFR_MODE). 1) Sets the MARGIN bit in STATUS_WORD. 2) Sets the MARGIN_FAULT bit in STATUS_MFR_SPECIFIC (PAGE 2). 3) Notifies the host through the ALERT assertion (if enabled in MFR_MODE). 1) Sets the VOUT_OV bit and the VOUT bit in STATUS_WORD. 2) Sets the VOUT_OV_FAULT bit in STATUS_VOUT. 3) Responds as specified in the MFR_FAULT_RESPONSE. 4) Notifies the host through the ALERT assertion (if enabled in MFR_MODE). to ensure that the command works properly. When PAGE = 9, the VOUT_OV_FAULT_LIMIT command sets the OV threshold of the input voltage.
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 21 VOUT_OV_WARN_LIMIT (42h) The VOUT_OV_WARN_LIMIT command sets the value of the voltage that causes a voltage high warning. The monitored voltage must drop by at least 2% below the limit before the warning is allowed to clear. This value is typically less than the overvoltage thresh old in VOUT_OV_FAULT_LIMIT. The 2 data bytes are in DIRECT format. In response to the VOUT_OV_WARN_LIMIT being exceeded, the module does the following: 1) Sets the VOUT bit in STATUS_WORD. 2) Sets the VOUT_OV_WARN bit in STATUS_VOUT. 3) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). VOUT_UV_WARN_LIMIT (43h) The VOUT_UV_WARN_LIMIT command sets the value of the voltage that causes a voltage low warning. The monitored voltage must increase by at least 2% above the limit before the warning is allowed to clear. This value is typically greater than the undervoltage-fault threshold in VOUT_UV_FAULT_LIMIT. This warning is masked until the voltage reaches the programmed POWER_GOOD_ON for the first time and during turn-off when the power supply is disabled. VOUT_UV_WARN_LIMIT should be set to a value greater than 100mV. The 2 data bytes are in DIRECT format. In response to violation of the VOUT_UV_WARN_LIMIT, the module does the following: 1) Sets the VOUT bit in STATUS_WORD. 2) Sets the VOUT_UV_WARN bit in STATUS_VOUT. 3) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). VOUT_UV_FAULT_LIMIT (44h) The VOUT_UV_FAULT_LIMIT command sets the value of the voltage that causes an undervoltage fault. The monitored voltage must increase by at least 2% above the limit before the fault is allowed to clear. This fault is masked until the voltage reaches the pro grammed POWER_GOOD_ON for the first time and during turn -off when the power supply is disabled. VOUT_UV_FAULT_LIMIT should be set to a value greater than 100mV. The 2 data bytes are in DIRECT format. In response to violation of the VOUT_UV_FAULT_LIMIT, the module does the following: 1) Sets the VOUT bit in STATUS_WORD. 2) Sets the VOUT_UV_FAULT bit in STATUS_VOUT. 3) Responds as specified in MFR_FAULT_RESPONSE. 4) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). The minimum input voltage UV rising threshold is set to 38.4V (typ) by hardware circuit; the value of VOUT_UV_FAULT_LIMIT (when PAGE = 9) should then be set higher than it to ensure the command works properly. IOUT_OC_FAULT_LIMIT (46h) The IOUT_OC_FAULT_LIMIT command sets the value of the current that causes an overcurrent fault. The monitored current must decrease by at least 5% below the limit before the fault is allowed to clear. This fault is masked until the current is below this li mit for the first time. The 2 data bytes are in DIRECT format. In response to violation of the IOUT_OC_FAULT_LIMIT, the module does the following: 1) Sets the IOUT bit in STATUS_WORD. 2) Sets the IOUT_OC_FAULT bit in STATUS_IOUT. 3) Responds as specified in the MFR_FAULT_RESPONSE. 4) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). IOUT_OC_WARN_LIMIT (4Ah) The IOUT_OC_WARN_LIMIT command sets the value of the current that causes an overcurrent warning. The monitored current must decrease by at least 5% below the limit before the warning is allowed to clear. This value is typically less than the overcurrent-fault threshold in IOUT_OC_FAULT_LIMIT. The 2 data bytes are in DIRECT format. In response to violation of the IOUT_OC_WARN_LIMIT, the module does the following: 1) Sets the IOUT bit in STATUS_WORD. 2) Sets the IOUT_OC_WARN bit in STATUS_IOUT.
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 22 3) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). OT_FAULT_LIMIT (4Fh) The OT_FAULT_LIMIT command sets the temperature, in degrees Celsius, at which an overtemperature fault is detected. The temperature must drop by at least 4 °C below the limit before the fault is allowed to clear. The 2 data bytes are in DIRECT format. In response to the OT_FAULT_LIMIT being exceeded, the module does the following: 1) Sets the TEMPERATURE bit in STATUS_WORD. 2) Sets the OT_FAULT bit in STATUS_TEMPERATURE register. 3) Responds as specified in the MFR_FAULT_RESPONSE. 4) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). OT_WARN_LIMIT (51h) The OT_WARN_LIMIT command sets the temperature, in degrees Celsius, at which an overtemperature warning is detected. The temperature must drop by at least 4 °C below the limit before the warning is allowed to clear. The 2 data bytes are in DIRECT format. In response to the OT_WARN_LIMIT being exceeded, the module does the following: 1) Sets the TEMPERATURE bit in STATUS_WORD. 2) Sets the OT_WARN bit in STATUS_TEMPERATURE register. 3) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). POWER_GOOD_ON (5Eh) The POWER_GOOD_ON command sets the value of the output voltage that it must exceed to assert the PGOOD pin. The POWER_GOOD_ON threshold is also used to determine if TON_MAX_FAULT_LIMIT is exceeded. The POWER_GOOD_ON level should always be set higher than t he POWER_GOOD_OFF level. The 2 data bytes are in DIRECT format. POWER_GOOD_ON should be set higher than VOUT_UV_FAULT_LIMIT and VOUT_UV_WARN_LIMIT because their functionality does not become active until the output voltage rises above the POWER_GOOD_ON threshold. POWER_GOOD_OFF (5Fh) The POWER_GOOD_OFF command sets the value of the output voltage that causes the PGOOD pin to deassert after it has been asserted. The POWER_GOOD_OFF level should always be set lower than the POWER_GOOD_ON level. The 2 data bytes are in DIRECT format. When the V OUT voltage falls from greater than the POWER_GOOD_ON value to less than the POWER_GOOD_OFF value, the module does the following: 1) Deassert the PGOOD pin. 2) Sets the POWER_GOOD# bit in STATUS_WORD. 3) Sets the POWER_GOOD# bit in STATUS_MFR_SPECIFIC register (PAGE 2). Note: If the POWER_GOOD_ON value is configured to be lower than the POWER_GOOD_OFF value, the module sets the POWER_GOOD_OFF value to be equal to the POWER_GOOD_ON value. Conversely, if the POWER_GOOD_OFF value is configured to be higher than the POWER_GOOD_ON value, the module sets the POWER_GOOD_ON value to be equal to the POWER_GOOD_OFF value. TON_DELAY (60h) When PAGE = 2, the TON_DELAY sets the time, in milliseconds, from the REM assertion to the beginning of VOUT rising. Considering the required initialization time for internal circuits, DO NOT set TON_DELAY less than 215ms when the module works in standalone mode. When in parallel operation to support high power output, DO NOT change this TON_DELAY value to ensure all modules start up simultaneously. When PAGE = 3, the TON_DELAY sets the delay time before PGOOD pin is asserted. The 2 data bytes are in DIRECT format.
When PAGE = 2, the TOFF_DELAY sets the time, in milliseconds, before V OUT drops when REM is deasserted. value is ignored if the OPERATION commands to turn off immediately. When PAGE = 3, the TOFF_DELAY sets the delay time before PGOOD pin is deasserted. The 2 data bytes are in DIRECT format. 1) Sets the VOUT bit in STATUS_WORD. 2) Sets the TON_MAX_FAULT bit in STATUS_VOUT. 3) Responds as specified in MFR_FAULT_RESPONSE. 4) Notifies the host using the ALERT assertion (if enabled in MFR_MODE). The STATUS_WORD command returns 2 bytes of information with a summary of the reason for a fault. Table 13. STATUS_WORD (79h) 15 VOUT A voltage fault or warning, or TON_MAX_FAULT_LIMIT has occurred. 14 IOUT An overcurrent fault or warning has occurred. 12 MFR A bit in STATUS_MFR_SPECIFIC (PAGE = 255) has been set.
11 POWER_GOOD# Voltage has fallen from POWER_GOOD_ON to less than POWER_GOOD_OFF (logical OR of all
the POWER_GOOD# bits in STATUS_MFR_SPECIFIC). 8 MARGIN A margining fault has occurred. 6 SYS_OFF Set when output is off (logical OR of all the OFF bits in STATUS_MFR_SPECIFIC). 5 VOUT_OV An overvoltage fault has occurred. 4 IOUT_OC An overcurrent fault has occurred. 2 TEMPERATURE A temperature fault or warning has occurred. 1 CML A communication, memory, or logic fault has occurred. Note: The setting of the SYS_OFF and POWER_GOOD# bits do not assert the ALERT signal. TON_MAX_FAULT, when the event occurs again.
Table 14. STATUS_VOUT (7Ah) STATUS_IOUT are latched. When cleared, the bits are set again if the condition persists. Table 15. STATUS_IOUT (7Bh) except bit 3 in STATUS_INPUT, are latched. When cleared, the bits are set again if the condition persists. Table 16. STATUS_INPUT (7Ch) decreased below the turn-off threshold. bits in STATUS_VOUT are latched. When cleared, the bits are set again if the condition persists. Table 17. STATUS_TEMPERATURE (7Dh)
event occurs again. The FAULT_LOG_FULL bit reflects the current real-time state of the fault log. Table 18. STATUS_CML (7Eh) BACKUP_FAULT and MAIN_FAULT bits does not assert the ALERT signal. Table 19. STATUS_MFR_SPECIFIC (80h) (for PAGES 0–11)
3 MARGIN_FAULT This bit is set if the module cannot properly close-loop margin the
2 POWER_GOOD#
Table 20. STATUS_MFR_SPECIFIC (80h) (for PAGE 255) 7 LOCK Set when the module is password protected.
3 REM
Set each time the REM input is deasserted. The READ_VIN command returns the actual measured input voltage when PAGE = 9. READ_VIN is measured and updated every 5ms. The 2 data bytes are in DIRECT format. The READ_IIN command returns the latest measured input current when PAGE = 10. READ_IIN is measured and updated every 5ms. The 2 data bytes are in DIRECT format. The READ_VOUT command returns the actual measured output voltage when PAGE = 2. READ_VOUT is measured and updated every 5ms. The 2 data bytes are in DIRECT format.
READ_IOUT is measured and updated every 5ms. The 2 data bytes are in DIRECT format. The READ_TEMPERATURE_1 command returns the measured PCB board temperature when PAGE = 18. READ_TEMPERATURE_1 is measured and updated every one second. The 2 data bytes are in DIRECT format. command has 1 data byte. Bits 7:4 indicate the revision of the PMBus specification Part I to which the module is compliant. The MFR_SERIAL command loads the module with text (ISO/IEC 8859 -1) characters that uniquely identify the module. Table 21. MFR_MODE (D1h) 13 ALERT 0 = ALERT output disabled (the module does not respond to ARA). 1 = ALERT output enabled (the module does respond to ARA). 11 SOFT_RESET This bit must be set, then cleared and set again within 8ms for a soft reset to occur.
10 LOCK
then unlocked a maximum of 256 times before a power cycle occurs. 7:0 — Internal use. Default value: 22h. as a comparison for future peak updates. The 2 data bytes are in DIRECT format.
- To reset this value to its lowest value, write to this command with a data value of 8000h. Any other values written by
this command are used as a comparison for future peak updates. The 2 data bytes are in DIRECT format. actual measured input voltage when PAGE = 9. To reset this value, write to this command with a data value of 7FFFh. are ignored. The 2 data bytes are in DIRECT format. The MFR_NV_LOG_CONFIG command is used to configure the operation of the nonvolatile fault logging in the module. The MFR_NV_LOG_CONFIG command is described in Table 22. Table 22. MFR_NV_LOG_CONFIG (D8h)
15 FORCE_NV_FAULT_LOG
STATUS_WORD; no bits are set in STATUS_CML.
14 CLEAR_NV_FAULT_LOG
the fault log, monitoring is stopped and commands should not be sent to the PMBus port.
10 NV_LOG_T0_CONFIG
0 = Log the last regular collection interval ADC reading. 1 = Read the latest ADC value before logging.
9 NV_LOG_OVERWRITE
0 = Do not overwrite the NV fault log. 6:0 — Internal use. Default value: 00h. the status bit and asserting the ALERT output. The MFR_FAULT_RESPONSE command is described in Table 23. the ON_OFF_CONFIG command or the module is power cycled.
commanded, then remains off, until the time in MFR_FAULT_RETRY expires and then restarts. or a module reset occurs. The same rule applies to overcurrent, undervoltage, overtemperature, and sequencing faults. Table 23. MFR_FAULT_RESPONSE (D9h) 31:16 — Internal use. Default value: 0101h. 15 NV_LOG 0 = Do not log the fault into MFR_NV_FAULT_LOG. 1 = Log the fault into MFR_NV_FAULT_LOG. 14 — Internal use. Default value: 1.
00 Immediate
11:8 — Internal use. Default value: 0000. Logs fault into MFR_NV_FAULT_LOG if NV_LOG = 1. Logs fault into MFR_NV_FAULT_LOG if NV_LOG = 1. Continues operation without any action. fault response is configured to retry. This command value is used for all fault responses. The 2 data bytes are in DIRECT format.
data. The host can clear the fault log by setting the CLEAR_NV_FAULT_LOG bit in MFR_NV_LOG_CONFIG. MFR_NV_FAULT_LOG command are described in Table 24. bit in STATUS_WORD (no bits are set in STATUS_CML) and ALERT is asserted (if enabled in MFR_MODE). Table 24. MFR_NV_FAULT_LOG (DCh)
2 FAULT_LOG_COUNT 130 READ_VOUT/READ_IOUT T2 PAGE 9
4 MFR_TIME_COUNT (LSW) 132 READ_VOUT/READ_IOUT T0 PAGE 10
6 MFR_TIME_COUNT (HSW) 134 READ_VOUT/READ_IOUT T1 PAGE 10
10 STATUS_CML/00h 138 READ_VOUT/READ_IOUT T0 PAGE 11
12 STATUS_WORD 140 READ_VOUT/READ_IOUT T1 PAGE 11
14 STATUS_VOUT/STATUS_IOUT PAGES 0/1 142 READ_VOUT/READ_IOUT T2 PAGE 11
16 STATUS_VOUT/STATUS_IOUT PAGES 2/3 144 READ_VOUT/READ_IOUT T0 PAGE 12
18 STATUS_VOUT/STATUS_IOUT PAGES 4/5 146 READ_VOUT/READ_IOUT T1 PAGE 12
20 STATUS_VOUT/STATUS_IOUT PAGES 6/7 148 READ_VOUT/READ_IOUT T2 PAGE 12
22 STATUS_VOUT/STATUS_IOUT PAGES 8/9 150 READ_VOUT/READ_IOUT T0 PAGE 13
24 STATUS_VOUT/STATUS_IOUT PAGES 10/11 152 READ_VOUT/READ_IOUT T1 PAGE 13
26 STATUS_VOUT/STATUS_IOUT PAGES 12/13 154 READ_VOUT/READ_IOUT T2 PAGE 13
28 STATUS_VOUT/STATUS_IOUT PAGES 14/15 156 READ_VOUT/READ_IOUT T0 PAGE 14
30 STATUS_MFR_SPECIFIC PAGES 0/1 158 READ_VOUT/READ_IOUT T1 PAGE 14
32 STATUS_MFR_SPECIFIC PAGES 2/3 160 READ_VOUT/READ_IOUT T2 PAGE 14
34 STATUS_MFR_SPECIFIC PAGES 4/5 162 READ_VOUT/READ_IOUT T0 PAGE 15
36 STATUS_MFR_SPECIFIC PAGES 6/7 164 READ_VOUT/READ_IOUT T1 PAGE 15
38 STATUS_MFR_SPECIFIC PAGES 8/9 166 READ_VOUT/READ_IOUT T2 PAGE 15
40 STATUS_MFR_SPECIFIC PAGES 10/11 168 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 0
42 STATUS_MFR_SPECIFIC PAGES 12/13 170 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 1
44 STATUS_MFR_SPECIFIC PAGES 14/15 172 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 2
46 STATUS_MFR_SPECIFIC PAGE 255/00h 174 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 3
48 STATUS_TEMPERATURE PAGES 16/17 176 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 4
50 STATUS_TEMPERATURE PAGES 18/19 178 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 5
52 STATUS_TEMPERATURE PAGE 20/00h 180 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 6
54 CURRENT_CHANNELS (Note 4) 182 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 7
56 STATUS_INPUT PAGES 0/1 184 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 8
58 STATUS_INPUT PAGES 2/3 186 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 9
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 30 BYTE PARAMETER BYTE PARAMETER
60 STATUS_INPUT PAGES 4/5 188 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 10
62 STATUS_INPUT PAGES 6/7 190 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 11
64 STATUS_INPUT PAGES 8/9 192 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 12
66 STATUS_INPUT PAGES 10/11 194 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 13
68 STATUS_INPUT PAGES 12/13 196 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 14
70 STATUS_INPUT PAGES 14/15 198 MFR_VOUT_PEAK/MFR_IOUT_PEAK PAGE 15
72 READ_VOUT/READ_IOUT T0 PAGE 0 (Notes 2, 3) 200 MFR_VOUT_MIN PAGE 0
74 READ_VOUT/READ_IOUT T1 PAGE 0 (Notes 2, 3) 202 MFR_VOUT_MIN PAGE 1
76 READ_VOUT/READ_IOUT T2 PAGE 0 (Notes 2, 3) 204 MFR_VOUT_MIN PAGE 2
78 READ_VOUT/READ_IOUT T0 PAGE 1 206 MFR_VOUT_MIN PAGE 3
80 READ_VOUT/READ_IOUT T1 PAGE 1 208 MFR_VOUT_MIN PAGE 4
82 READ_VOUT/READ_IOUT T2 PAGE 1 210 MFR_VOUT_MIN PAGE 5
84 READ_VOUT/READ_IOUT T0 PAGE 2 212 MFR_VOUT_MIN PAGE 6
86 READ_VOUT/READ_IOUT T1 PAGE 2 214 MFR_VOUT_MIN PAGE 7
88 READ_VOUT/READ_IOUT T2 PAGE 2 216 MFR_VOUT_MIN PAGE 8
90 READ_VOUT/READ_IOUT T0 PAGE 3 218 MFR_VOUT_MIN PAGE 9
92 READ_VOUT/READ_IOUT T1 PAGE 3 220 MFR_VOUT_MIN PAGE 10
94 READ_VOUT/READ_IOUT T2 PAGE 3 222 MFR_VOUT_MIN PAGE 11
96 READ_VOUT/READ_IOUT T0 PAGE 4 224 MFR_VOUT_MIN PAGE 12
98 READ_VOUT/READ_IOUT T1 PAGE 4 226 MFR_VOUT_MIN PAGE 13
100 READ_VOUT/READ_IOUT T2 PAGE 4 228 MFR_VOUT_MIN PAGE 14
102 READ_VOUT/READ_IOUT T0 PAGE 5 230 MFR_VOUT_MIN PAGE 15
104 READ_VOUT/READ_IOUT T1 PAGE 5 232 READ_TEMPERATURE_1 PAGE 16
106 READ_VOUT/READ_IOUT T2 PAGE 5 234 READ_TEMPERATURE_1 PAGE 17
108 READ_VOUT/READ_IOUT T0 PAGE 6 236 READ_TEMPERATURE_1 PAGE 19
110 READ_VOUT/READ_IOUT T1 PAGE 6 238 READ_TEMPERATURE_1 PAGE 19
112 READ_VOUT/READ_IOUT T2 PAGE 6 240 READ_TEMPERATURE_1 PAGE 20
114 READ_VOUT/READ_IOUT T0 PAGE 7 242 MFR_TEMPERATURE_PEAK PAGE 16
116 READ_VOUT/READ_IOUT T1 PAGE 7 244 MFR_TEMPERATURE_PEAK PAGE 17
118 READ_VOUT/READ_IOUT T2 PAGE 7 246 MFR_TEMPERATURE_PEAK PAGE 18
120 READ_VOUT/READ_IOUT T0 PAGE 8 248 MFR_TEMPERATURE_PEAK PAGE 19
122 READ_VOUT/READ_IOUT T1 PAGE 8 250 MFR_TEMPERATURE_PEAK PAGE 20
124 READ_VOUT/READ_IOUT T2 PAGE 8 252 0000h
126 READ_VOUT/READ_IOUT T0 PAGE 9 254 LOG_VALID (Note 1)
Note 1: LOG_VALID is set to DDh if the fault log contains valid data. Note 2: For READ_VOUT, READ_IOUT, T2 is the oldest reading and T0 is the newest reading. Note 3: STATUS_VOUT/STATUS_IOUT and READ_VOUT/READ_IOUT depend on whether the rail (or PAGE) is configured to monitor voltage or current, see Table 5. Note 4: CURRENT_CHANNELS is a bitmask (0 = voltage/1 = current) indicating which channels (or PAGES) are enabled for current measurement, see Table 5. MFR_TIME_COUNT (DDh) The MFR_TIME_COUNT command returns the current value of a real -time counter that increments every 5ms, 20ms, 80ms, or 160ms depending on the configuration of the NV_LOG_DEPTH bits in MFR_NV_LOG_CONFIG. This counter is useful in determining the time between multiple faults. The counter is a 32 -bit value that rolls over. The count is reset to zero upon module power cycle, or a soft-reset. MFR_TIME_COUNT can be preset to any value and starts counting up from the preset value.
Table 25. MFR_MARGIN_CONFIG (DCh)
15 SLOPE
0 = Negative slope, increasing PWM duty cycle results in a lower voltage. 1 = Positive slope, increasing PWM duty cycle results in a higher voltage. 14 OPEN_LOOP 0 = Normal closed-loop margining. 1 = PWM duty cycle or DAC value set constantly to the DC_DAC value when margining invoked. power supply either up or down. When bit 14 is set, this value is used to set the PWM duty cycle. The margin function works only when output voltage is higher than its programmed POWER_GOOD_ON level. When OPERATION is set to one of the margin states, margining is initiated, and the module margins the output voltage. for the output voltage to return to a normal condition. 1) Sets the MARGIN bit in STATUS_WORD. 2) Sets the MARGIN_FAULT bit in STATUS_MFR_SPECIFIC (PAGE 2). 3) Notifies the host through ALERT assertion (if enabled in MFR_MODE). The MFR_CONFIG_VERSION command returns the user-defined configuration file version that is loaded in the module. This command is read-and-write.
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 32 sequence will not be able to disable the write protection of the module. The write protection feature of the module is disabled by default, and it can be enabled by writing any value other than 9Ch to the command.
Figure 9. Outline Diagram is discouraged for through-hole-mounted power modules, as the associated difficulties can compromise reliability. A no-clean (NC) flux is recommended to avoid entrapment of cleaning fluids in cavities inside of the DC-DC power module. The residues may affect long-time reliability and isolation voltage.
recommended to ensure a reliable solder joint. Figure 10. Recommended Reflow Profile Table 26. Reflow Process Specifications
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module www.analog.com Analog Devices | 35
Ordering Information
PART NUMBER PIN LENGTH MSL REM LOGIC PACKAGE DESCRIPTION TEMP RANGE ADPM12160CMLZBH 2.79mm — Active high Quarter brick, 58.4mm × 36.8mm × 15.1mm -40°C to +85°C ADPM12160CMLZCH 3.70mm ADPM12160CMLZDH 4.32mm ADPM12160CMLZBL 2.79mm — Active low ADPM12160CMLZCL 3.70mm ADPM12160CMLZDL 4.32mm All products are halogen-free * MSL3 qualification is in progress, and it is not guaranteed until qualification is completed. Packing Details The products are supplied as standard in the antistatic tray, shown in Figure 11. Figure 11. Packaging Tray Diagram
Table 27. Tray Specification
ADPM12160 1600W, Nonisolated Quarter-Brick DC-DC Power Module
Revision History
0 10/25 Initial release — Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. All Analog Devices products contained herein are subject to release and availability. w w w . a n a l o g . c o m Analog Devices | 37