ADPL42005 AD | Alldatasheet

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Technical content

analog.com Rev. 0 2 of 26 TABLE OF CONTENTS

Table 1. Electrical Characteristics

analog.com Rev. 0 4 of 26 (VIN = (VOUT + 1V) or 4V (whichever is greater), EN = VIN, IOUT = 10mA, CIN = COUT = 1µF, TA = 25°C for typical specifications, TJ = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS UVLO THRESHOLD FALLING UVLOFALL 3.3V ≤ VIN ≤ 20V, 10kΩ in series with the enable pin 1.13 V UVLO HYSTERESIS CURRENT UVLOHYS VEN > 1.25V 7.5 9.8 12 µA ENABLE PULL-DOWN CURRENT IEN-IN EN = VIN 500 nA START THRESHOLD VSTART 3.2 V SHUTDOWN THRESHOLD VSHUTDOWN 2.45 V HYSTERESIS 250 mV OUTPUT NOISE OUTNOISE 10Hz to 100kHz, VIN = 6.3V, VOUT = 3.3V 32 µV rms 10Hz to 100kHz, VIN = 5.5V, VOUT = 1.5V, adjustable mode 18 µV rms 10Hz to 100kHz, VIN = 12V, VOUT = 5V, adjustable mode 30 µV rms 10Hz to 100kHz, VIN = 20V, VOUT = 15V, adjustable mode 65 µV rms POWER SUPPLY REJECTION RATIO PSRR 100kHz, VIN = 4.3V, VOUT = 3.3V 50 dB 10kHz, VIN = 4.3V, VOUT = 3.3V 58 dB 100kHz, VIN = 3.3V, VOUT = 1.8V, adjustable mode 50 dB 10kHz, VIN = 3.3V, VOUT = 1.8V, adjustable mode 60 dB 1 Based on an end -point calculation using 1mA and 500mA loads. See Figure 6 for typical load regulation performance for loads less than 1mA. 2 Dropout voltage is defined as the input -to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 3.0V. Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0V, or 4.5V.

Table 2. Input and Output Capacitor, Recommended Specifications recommended; Y5V and Z5U capacitors are not recommended for use with any LDO.

Table 3. Absolute Maximum Ratings Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. for extended periods may affect product reliability. ambient temperature may have to be derated. device (PD), and junction-to-ambient thermal resistance of the package (θJA). board construction. For additional information, refer to the AN-617 application note.

Refer to JESD51-8 and JESD51-12 for more detailed information about ΨJB. Table 4. Thermal Resistance

Figure 3. LFCSP Package Figure 4. Narrow Body SOIC Package Table 5. Pin Descriptions 1 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1µF or greater capacitor.

2 SENSE/ADJ

function applies to adjustable voltages only.

3 GND Ground

4 NC Do Not Connect to This Pin.

5 EN/UVLO

thresholds are determined by the programming resistors.

6 GND Ground

Power Good. This open-drain output requires an external pull-up resistor to VIN or VOUT. not used, the pin may be left open or connected to ground. 8 VIN Regulator Input Supply. Bypass VIN to GND with a 1µF or greater capacitor. highly recommended that the EPAD be connected to the ground plane on the board.

  1. NC = NO CONNECT. DO NOT CONNECT TO
  2. IT IS HIGHLY RECOMMENDED THAT THE

6 GND

8 VIN

  1. NC = NO CONNECT. DO NOT CONNECT TO
  2. IT IS HIGHLY RECOMMENDED THAT THE

Figure 41. Typical Adjustable Output Voltage Application Schematic The value of R2 must be less than 200kΩ to minimize errors in the output voltage caused by the ADJ pin input current. the ADJ pin input current is 2mV or 0.08%, assuming a typical ADJ pin input current of 10nA at 25°C. EN/UVLO is high, VOUT turns on, and when EN is low, VOUT turns off. For automatic startup, EN/UVLO can be tied to VIN. body of the PFET is switched to VOUT and turned off or opened. In other words, the gate is connected to VOUT.

and simulations. For more information on design tools, visit the ADPL42005 product page. Figure 42. Output Transient Response, VOUT = 1.8V, COUT = 1µF capacitance is required, the input capacitor should be increased to match it. Thevenin equivalent resistance in series with the EN/UVLO pin.

analog.com Rev. 0 21 of 26 junction temperature drops below 135°C, the output is turned on again, and output current is restored to its operating value. Consider the case where a hard short from VOUT to ground occurs. At first, the ADPL42005 current limits, so that only 775mA is conducted into the short. If self heating of the junction is great enough to cause its temperature to rise above 150°C, thermal shutdown activates, turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 135°C, the output turns on and conducts 775mA into the short, again causing the junction temperature to rise above 150°C. T his thermal oscillation between 135°C and 150°C causes a current oscillation between 775mA and 0mA, which continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation must be externally limited so the junction temperature does not exceed 125°C.

Figure 51. 8-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP -8-11) Figure 52. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP] Narrow Body (RD-8-1). Dimensions shown

0.203 REF

0.05 MAX

0.02 NOM

0.50 BSC

0.20 MIN

0.10 MAX

0.05 NOM

3.81 REF

1.04 REF

Table 6. Ordering Guide

1 Z = RoHS compliant part

2 For additional voltage options, contact a local Analog Devices sales or distribution representative.

analog.com Rev. 0 25 of 26

REVISION HISTORY

DATE DESCRIPTION PAGE NUMBER 0 02/25 Initial release —

ALL INFORMATION CONTAINED HEREIN IS PROVIDED “AS IS” WITHOUT REPRESENTATION OR WARRANTY. NO RESPONSIBILITY IS ASSUMED BY ANALOG DEVICES FOR ITS USE, NOR FOR ANY INFRINGEMENTS OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES THAT MAY RESULT FROM ITS USE. SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. NO LICENCE, EITHER EXPRESSED OR IMPLIED, IS GRANTED UNDER ANY ADI PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR ANY OTHER ADI INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS, IN WHICH ADI PRODUCTS OR SERVICES ARE USED. TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. ALL ANALOG DEVICES PRODUCTS CONTAINED HEREIN ARE SUBJECT TO RELEASE AND AVAILABILITY. analog.com Rev. 0 26 of 26