ADPA1113 AD | Alldatasheet

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Technical content

2 GHz to 6 GHz, 46 dBm (40 W), GaN Power Amplifier

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FEATURES

►Internally matched and AC-coupled, 40 W, GaN power amplifier ►Integrated drain bias inductor ►POUT: 46.5 dBm typical from 2.0 GHz to 5.7 GHz (PIN = 21 dBm) ►Small signal gain: 40.5 dB typical from 2.3 GHz to 5.7 GHz ►Power gain: 25.5 dB typical from 2.0 GHz to 5.7 GHz (PIN = 21 dBm) ►PAE: 39% typical from 2.3 GHz to 5.7 GHz ►VDD = 28 V at IDQ = 750 mA ►14-lead ceramic leaded chip carrier [LDCC] with a copper-molyb- denum base

APPLICATIONS

►Military jammers ►Commercial and military radars ►Test and measurement equipment GENERAL DESCRIPTION The ADPA1113 is a gallium nitride (GaN), broadband power amplifi- er delivering 46.5 dBm (44.7 W) with 39.0% power added efficiency (PAE) from 2.3 GHz to 5.7 GHz. No external matching or AC-cou- pling are required to achieve full-band operation. Additionally, no external inductor is required to bias the amplifier. The ADPA1113 is ideal for continuous wave applications, such as military jammers and radars. FUNCTIONAL BLOCK DIAGRAM Figure 1. Functional Block Diagram

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REVISION HISTORY

1/2024—Revision 0: Initial Version

Table 1. 2.0 GHz to 2.3 GHz Frequency Range TCASE = 25°C, VDD = 28 V, IDQ = 750 mA, and frequency range = 2.3 GHz to 5.7 GHz, unless otherwise noted. Table 2. 2.3 GHz to 5.7 GHz Frequency Range

TCASE = 25°C, VDD = 28 V, IDQ = 750 mA, and frequency range = 5.7 GHz to 6.0 GHz, unless otherwise noted. Table 3. 5.7 GHz to 6.0 GHz Frequency Range

be exposed to ambient temperatures above 150°C. Table 4. Absolute Maximum Ratings ing conditions for extended periods may affect product reliability. Table 5. Thermal Resistance operating temperature of 85°C. sensitive devices in an ESD protected area only. Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. Table 6. ADPA1113, 14-Lead LDCC damage may occur on devices subjected to high energy ESD. performance degradation or loss of functionality.

Figure 2. Pin Configuration Table 7. Pin Function Descriptions 1, 7 NIC No Internal Connection. The NIC pins are not connected internally. For normal operation, connect to ground. 2 VDD1 Drain Bias for First Stage of Amplifier. See Figure 3 for the VDD1 pin interface schematic. 3, 5, 10, 12 GND Ground. The ground pins must be connected to the RF and the DC ground. See Figure 4 for the GND interface schematic. 4 RFIN RF Input. The RFIN pin is AC-coupled and internally matched to 50 Ω. See Figure 3 for the RFIN interface schematic. 6 VGG1 Gate Control for All Three Stages of the Amplifier. See Figure 3 for the VGG1 interface schematic. 8 VDD2B Drain Bias for the Second Stage of the South Side of the Amplifier. See Figure 5 for the VDD2B interface schematic. 9 VDD3B Drain Bias for the Third Stage of the South Side of the Amplifier. See Figure 6 for the VDD3B interface schematic. 11 RFOUT RF Output. The RFOUT pin is AC-coupled and internally matched to 50 Ω. See Figure 6 for the RFOUT interface schematic. 13 VDD3A Drain Bias for the Third Stage of the North Side of the Amplifier. See Figure 6 for the VDD3A interface schematic. 14 VDD2A Drain Bias for the Second Stage of the North Side of the Amplifier. See Figure 5 for the VDD2A interface schematic. Package Base GND The package base must be connected to the RF and the DC ground. See Figure 4 for the GND Interface schematic.

Figure 25. PAE at PIN = 21 dBm vs. Frequency for Various Supply Voltages at Figure 26. Output Power at PIN = 21 dBm vs. Frequency for Figure 27. Power Gain at PIN = 21 dBm vs. Frequency for Figure 28. Power Gain at PIN = 21 dBm vs. Frequency for Figure 29. PAE at PIN = 21 dBm vs. Frequency Figure 30. PAE, POUT, Gain, and Supply Current (IDD) vs. Input Power at

2.0 GHz, VDD = 28 V, IDQ = 750 mA

Figure 43. Noise Figure vs. Frequency for Various IDQ Values, VDD = 28 V Figure 44. Noise Figure vs. Frequency for Various VDD Values, IDQ = 750 mA

is applied to VGG1 to set the total IDQ to 750 mA nominal. Figure 45. Basic Block Diagram

registered trademarks are the property of their respective owners. One Analog Way, Wilmington, MA 01887-2356, U.S.A. Figure 47. 14-Lead Ceramic Leaded Chip Carrier [LDCC]