ADP7182

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 28

Technical content

Rev. A | Page 2 of 28 TABLE OF CONTENTS Input and Output Capacitance, Recommended

REVISION HISTORY

5/13—Rev. 0 to Rev. A 4/13—Revision 0: Initial Version

Rev. A | Page 3 of 28 SPECIFICATIONS VIN = (VOUT − 0.5 V) or −2.7 V (whichever is greater), EN = VIN, IOUT = −10 mA, CIN = COUT = 2.2 µF , TJ = −40°C to +125°C for minimum/maximum specifications, TA = 25°C for typical specifications, unless otherwise noted. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT VOLTAGE RANGE VIN −2.7 −28 V OPERATING SUPPLY CURRENT IGND IOUT = 0 µA −33 −53 µA IOUT = −10 mA −100 −150 µA IOUT = −200 mA −650 −850 µA SHUTDOWN CURRENT IGND-SD EN = GND −2 µA EN = GND, VIN = −2.7 V to −28 V −8 µA OUTPUT VOLTAGE ACCURACY Fixed Output Voltage Accuracy VOUT IOUT = −10 mA, TA = 25°C –1 +1 % −1 mA < IOUT < −200 mA, VIN = (VOUT − 0.5 V) to −28 V –3 +2 % Adjustable Output Voltage Accuracy VADJ IOUT = −10 mA −1.208 −1.22 −1.232 V −1 mA < IOUT < −200 mA, VIN = (VOUT − 0.5 V) to −28 V −1.184 −1.244 V LINE REGULATION ∆VOUT/∆VIN VIN = (VOUT − 0.5 V) to −28 V −0.01 +0.01 %/V LOAD REGULATION1 ∆VOUT/∆IOUT IOUT = −1 mA to −200 mA 0.001 0.006 %/mA ADJ INPUT BIAS CURRENT ADJI-BIAS −1 mA < IOUT < −200 mA, VIN = (VOUT − 0.5 V) to −28 V 10 nA DROPOUT VOL TAGE2 VDO IOUT = −10 mA −25 −70 mV IOUT = −50 mA −46 −90 mV IOUT = −200 mA −185 −360 mV START-UP TIME3 tSTART-UP VOUT = −5 V 550 µs VOUT = −2.8 V 375 µs CURRENT-LIMIT THRESHOLD4 ILIMIT −230 −350 −500 mA THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C EN THRESHOLD Positive Rise VEN-POS-RISE VOUT = off to on (positive) 1.2 V Negative Rise VEN-NEG-RISE VOUT = off to on (negative) −2.0 V Positive Fall VEN-POS-FAL L VOUT = on to off (positive) 0.3 V Negative Fall VEN-NEG-FAL L VOUT = on to off (negative) −0.55 V INPUT VOLTAGE LOCKOUT Start Threshold VSTART −2.695 −2.49 V Shutdown Threshold VSHUTDOWN −2.34 −2.1 V Hysteresis 150 mV OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VOUT = −1.5 V, VOUT = −3 V, and VOUT = −5 V 18 µV rms

10 Hz to 100 kHz, VOUT = −5 V, adjustable mode,

CNR = open, RNR = open, RFB1 = 147 kΩ, RFB2 = 13 kΩ 150 µV rms CNR = 100 nF, RNR = 13 kΩ, RFB1 = 147 kΩ, RFB2 = 13 kΩ 33 µV rms

Rev. A | Page 4 of 28 Parameter Symbol Test Conditions/Comments Min Typ Max Unit POWER SUPPLY REJECTION RATIO PSRR 1 MHz, VIN = −4.3 V, VOUT = −3 V 45 dB

1 MHz, VIN = −6 V, VOUT = −5 V 32 dB

100 kHz, VIN = −4.3 V, VOUT = −3 V 45 dB 100 kHz, VIN = −6 V, VOUT = −5 V 45 dB 10 kHz, VIN = −4.3 V, VOUT = −3 V 66 dB 10 kHz, VIN = −6 V, VOUT = −5 V 66 dB

1 MHz, VIN = −16 V, VOUT = −15 V, adjustable mode,

CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 45 dB 100 kHz, VIN = −16 V, VOUT = −15 V, adjustable mode, CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 45 dB 10 kHz, VIN = −16 V, VOUT = −15 V, adjustable mode, CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 66 dB 1 Based on an endpoint calculation using −1 mA and −200 mA loads. See Figure 8 for the typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages below −3 V. 3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a −5 V output voltage is defined as the current that causes the output voltage to drop to 90% of −5 V, or −4.5 V. INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT AND OUTPUT CAPACITANCE Minimum Capacitance1 CMIN TA = −40°C to +125°C 1.5 2.2 µF Capacitor Effective Series Resistance (ESR) RESR TA = −40°C to +125°C 0.001 0.2 Ω 1 The minimum input and output capacitance must be greater than 1.5 µF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO.

temperature may have to be derated. Application Note , MicroCSP™ Wafer Level Chip Scale Package. device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance

5 VOUT

Figure 3. 5-Lead TSOT Pin Configuration, Fixed Output Voltage

4 ADJ

Figure 4. 5-Lead TSOT Pin Configuration, Adjustable Output Voltage Table 5. 5-Lead TSOT Pin Function Descriptions 4 Not applicable NC No Connect. Do not connect to this pin. Not applicable 4 ADJ Adjustable Input. An external resistor divider sets the output voltage.

6 GND

8 VIN

7 VINADP7182

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP PACKAGE ENHANCES

Figure 5. 8-Lead LFCSP Pin Configuration, Fixed Output Voltage

1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP PACKAGE ENHANCES

Figure 6. 8-Lead LFCSP Pin Configuration, Adjustable Output Voltage Table 6. 8-Lead LFCSP Pin Function Descriptions Not applicable 3 ADJ Adjustable Input. An external resistor divider sets the output voltage. 3 Not applicable NC No Connect. Do not connect to this pin. 5 5 NC No Connect. Do not connect to this pin. voltage regulator, VIN is the most negative potential in the circuit.

limited so that the junction temperatures do not exceed 125°C. maximum junction temperature of 125°C. is important to guarantee reliable performance over all conditions. package due to the power dissipation, as shown in Equation 3. of copper used to solder the package GND pins to the PCB. shows the typical ΨJB values of the 8-lead LFCSP and 5-lead TSOT. Table 7. Typical θJA Values of the 8-Lead LFCSP 1 Device soldered to minimum size pin traces. Table 8. Typical θJA Values of the 5-Lead TSOT 1 Device soldered to minimum size pin traces. Table 9. Typical ΨJB Values TA is the ambient temperature. VIN and VOUT are the input and output voltages, respectively. ambient temperatures, power dissipation, and areas of PCB copper. the amount of copper attached to the pins of the ADP7182. in the junction-to-ambient thermal resistance. Figure 87. Junction Temperature vs. Total Power Dissipation for the

0.05 MAX

0.02 NOM

0.80 MAX

0.55 NOM

0.20 MIN

Figure 97. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 2 For additional voltage options, contact a local Analog Devices, Inc., sales or distribution representative.

Rev. A | Page 28 of 28 NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10703-0-5/13(A)