DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 23
Technical content
40 V, 200 mA, Low Noise,
Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2014–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
FEATURES
Low noise: 11 μV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT ≤ 5 V, VIN = 7 V Input voltage range: 2.7 V to 40 V Maximum output current: 200 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature −1.2% to +1.5%, T J = −40°C to +85°C Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5 V User programmable soft start (LFCSP and SOIC only) Low quiescent current, I GND = 50 μA (typical) with no load Low shutdown current: 1.8 μA at VIN = 5 V, 3.0 μA at VIN = 40 V Stable with a small 2.2 μF ceramic output capacitor 15 standard voltages between 1.2 V and 5.0 V are available Adjustable output from 1.2 V to V IN – VDO, output can be adjusted above initial set point Precision enable 2 mm × 2 mm, 6-lead LFCSP, 8-Lead SOIC, 5-Lead TSOT Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications ADC, DAC circuits, precision amplifiers, power for VCO VTUNE control Communications and infrastructure Medical and healthcare Industrial and instrumentation TYPICAL APPLICATION CIRCUITS GND EN SS VIN VOUT ADP7142 ON OFF VIN = 6V VOUT = 5V SENSE/ADJ CIN 2.2µF COUT 2.2µF CSS 1nF 11848-001 Figure 1. ADP7142 with Fixed Output Voltage, 5 V Figure 2. ADP7142 with 5 V Output Adjusted to 6 V The ADP7142 is available in 15 fixed output voltage options. available in the LFCSP and SOIC packages. ADP7142 is also available in a 5-lead TSOT and an 8-lead SOIC.
Rev. H | Page 2 of 23 TABLE OF CONTENTS Input and Output Capacitance, Recommended Specifications .. 4
REVISION HISTORY
3/2020—Rev. G to Rev. H Changes to Current-Limit and Thermal Overload 10/2019—Rev. F to Rev. G 9/2018—Rev. E to Rev. F 4/2018—Rev. D to Rev. E 11/2017—Rev. C to Rev. D 6/2016—Rev. B to Rev. C Changes to Programmable Precision Enable Section and Soft Added Effect of Noise Reduction on Start-Up Time Section .. 16 4/2015—Rev. A to Rev. B 12/2014—Rev. 0 to Rev. A 9/2014—Revision 0: Initial Version
Rev. H | Page 3 of 23 SPECIFICATIONS VIN = VOUT +1 V or 2.7 V, whichever is greater, VOUT = 5 V, EN = VIN, IOUT = 10 mA, CIN = COUT = 2.2 μF, CSS = 0 pF, TA = 25°C for typical specifications, TJ = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted. Table 1. Parameter Symbol Test Conditio ns/Comments Min Typ Max Unit INPUT VOLTAGE RANGE VIN 2.7 40 V OPERATING SUPPLY CURRENT I GND I OUT = 0 μA 50 140 μA IOUT = 10 mA 80 190 μA IOUT = 200 mA 180 320 μA SHUTDOWN CURRENT IGND-SD EN = GND 1.8 μA EN = GND, VIN = 40 V 3.0 10 μA OUTPUT VOLTAGE ACCURACY Output Voltage Accuracy V OUT I OUT = 10 mA, TJ = 25°C –0.8 +0.8 % 100 μA < IOUT < 200 mA, VIN = (VOUT + 1 V) to 40 V, TJ = −40°C to +85°C –1.2 +1.5 % 100 μA < IOUT < 200 mA, VIN = (VOUT + 1 V) to 40 V –1.8 +1.8 % LINE REGULATION ∆VOUT/∆VIN V IN = (VOUT + 1 V) to 40 V –0.01 +0.01 %/V LOAD REGULATION1 ∆V OUT/∆IOUT I OUT = 100 μA to 200 mA 0.002 0.004 %/mA SENSE INPUT BIAS CURRENT SENSE I-BIAS 100 μA < I OUT < 200 mA VIN = (VOUT + 1 V) to 40 V 10 1000 nA DROPOUT VOLTAGE2 V DROPOUT I OUT = 10 mA 30 60 mV IOUT = 200 mA 200 420 mV START-UP TIME3 t START-UP V OUT = 5 V 380 μs SOFT START SOURCE CURRENT SS I-SOURCE SS = GND 1.15 μA CURRENT-LIMIT THRESHOLD4 I LIMIT 250 360 460 mA THERMAL SHUTDOWN Thermal Shutdown Threshold TS SD T J rising 150 °C Thermal Shutdown Hysteresis TS SD-HYS 15 °C UNDERVOLTAGE THRESHOLDS Input Voltage Rising UVLO RISE 2.69 V Input Voltage Falling UVLO FALL 2.2 V Hysteresis UVLO HYS 230 mV PRECISION EN INPUT 2.7 V ≤ VIN ≤ 40 V Logic High ENHIGH 1.15 1.22 1.30 V Logic Low ENLOW 1.06 1.12 1.18 V Logic Hysteresis ENHYS 100 mV Leakage Current IEN-LKG EN = V IN or GND 0.04 1 μA Delay Time tEN-DLY From EN rising from 0 V to V IN to 0.1 × VOUT 80 μs OUTPUT NOISE OUT NOISE 10 Hz to 100 kHz, all output voltage options 11 μV rms POWER SUPPLY REJECTION RATIO PSRR 1 MHz, V IN = 7 V, VOUT = 5 V 50 dB 100 kHz, VIN = 7 V, VOUT = 5 V 68 dB 10 kHz, VIN = 7 V, VOUT = 5 V 88 dB 1 Based on an endpoint calculation using 100 μA and 200 mA loads. See Figure 7 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages above 2.7 V. 3 Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of its nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V or 4.5 V.
Rev. H | Page 4 of 23 INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditio ns/Comments Min Typ Max Unit INPUT AND OUTPUT CAPACITANCE Minimum Capacitance1 C MIN T A = −40°C to +125°C 1.5 μF Capacitor Effective Series Resistance (ESR) RESR T A = −40°C to +125°C 0.001 0.3 Ω 1 The minimum input and output capacitance must be greater than 1.5 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended, while Y5V and Z5U capacitors are not recommended for use with any LDO.
operational section of this specification is not implied. extended periods may affect product reliability. junction-to-ambient thermal resistance of the package (θJA). is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance
- THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE
PAD CONNECT TO THE GROUND PLANE ON THE BOARD. Figure 3. 6-Lead LFCSP Pin Configuration
5 VOUT
4 SENSE/ADJ
Figure 4. 5-Lead TSOT Pin Configuration
- THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE
PAD CONNECT TO THE GROUND PLANE ON THE BOARD. Figure 5. 8-Lead SOIC Pin Configuration Table 5. Pin Function Descriptions 1 1, 2 5 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 2.2 μF or greater capacitor. set the output voltage higher than the fixed output voltage (ADJ). time. Leave this pin open for a typical 380 μs start-up time. Do not ground this pin. 6 7, 8 1 VIN Regulator Input Supply. Bypass VIN to GND with a 2.2 μF or greater capacitor. recommended that the exposed pad connect to the ground plane on the board.
is restored to its operating value. continues as long as the short remains at the output. junction temperature does not exceed 125°C. maximum junction temperature of 125°C. solder the package GND pins to the PCB. Table 6. Typical θJA Values 1 Device soldered to minimum size pin traces. Table 7. Typical ΨJB Values TA is the ambient temperature. IN and VOUT are input and output voltages, respectively.
Figure 66. Example TSOT PCB Layout Table 8. Recommended LDOs for Very Low Noise Operation
10 Hz to
1 MHz Package
Table 9. Related Devices
0.20 REF
0.05 MAX
0.02 NOM
0.65 BSC
0.15 MIN
Figure 67. 6-Lead Lead Frame Chip Scale Package [LFCSP]
0.10 MAX
0.05 NOM
3.81 REF
1.04 REF
1.27 BSC
Figure 68. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP]
0.95 BSC
1.90 REF
1.00 MAX
Figure 69. 5-Lead Thin Small Outline Transistor Package [TSOT] 2 For additional voltage options, contact a local Analog Devices, Inc., sales or distribution representative. 3 The evaluation boards are preconfigured with an adjustable ADP7142. registered trademarks are the prop erty of their respective owners.