DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 24
Technical content
20 V, 200 mA, Low Noise,
Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2014–2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
FEATURES
Low noise: 11 µV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT ≤ 5 V, VIN = 7 V Input voltage range: 2.7 V to 20 V Maximum output current: 200 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature Low dropout voltage: 200 mV (typical) at a 200 mA load, VOUT = 5 V User programmable soft start (LFCSP and SOIC only) Low quiescent current, IGND = 50 μA (typical) with no load Low shutdown current: 1.8 μA at VIN = 5 V, 3.0 μA at VIN = 20 V Stable with a small 2.2 µF ceramic output capacitor 16 standard voltages between 1.2 V and 5.0 V are available Adjustable output from 1.2 V to VIN – VDO, output can be adjusted above initial set point Precision enable 2 mm × 2 mm, 6-lead LFCSP, 8-Lead SOIC, 5-Lead TSOT AEC-Q100 qualified for automotive applications
APPLICATIONS
Regulation to noise sensitive applications ADC and DAC circuits, precision amplifiers, power for VCO VTUNE control Communications and infrastructure Medical and healthcare Industrial and instrumentation Supported by ADIsimPower tool TYPICAL APPLICATION CIRCUITS GND EN SS VIN VOUT ADP7118 ON OFF VIN = 6V VOUT = 5V SENSE/ADJ CIN 2.2µF COUT 2.2µF CSS 1nF 11849-001 Figure 1. ADP7118 with Fixed Output Voltage, 5 V Figure 2. ADP7118 with 5 V Output Adjusted to 6 V the output voltage for the fixed options of 5 V or less. The ADP7118 is available in 16 fixed output voltage options. available in the LFCSP and SOIC packages. ADP7118 is also available in a 5-lead TSOT and an 8-lead SOIC.
Rev. F | Page 2 of 24 TABLE OF CONTENTS Input and Output Capacitance, Recommended Specifications .. 4
REVISION HISTORY
9/2020—Rev. E to Rev. F Changes to Current-Limit and Thermal Overload 9/2019—Rev. D to Rev. E 4/2018—Rev. C to Rev. D 11/2016—Rev. B to Rev. C 7/2016—Rev. A to Rev. B Changes to Programmable Precision Enable Section and Soft Added Effect of Noise Reduction on Start-Up Time Section .. 16 12/2014—Rev. 0 to Rev. A 9/2014—Revision 0: Initial Version
Rev. F | Page 3 of 24 SPECIFICATIONS VIN = VOUT + 1 V or 2.7 V, whichever is greater, VOUT = 5 V, EN = VIN, IOUT = 10 mA, CIN = COUT = 2.2 µF, CSS = 0 pF, TA = 25°C for typical specifications, TJ = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT VOLTAGE RANGE VIN 2.7 20 V OPERATING SUPPLY CURRENT IGND IOUT = 0 µA 50 140 µA IOUT = 10 mA 80 190 µA IOUT = 200 mA 180 320 µA SHUTDOWN CURRENT IGND-SD EN = GND 1.8 µA EN = GND, VIN = 20 V 3.0 10 µA OUTPUT VOLTAGE ACCURACY Output Voltage Accuracy VOUT IOUT = 10 mA, TJ = 25°C –0.8 +0.8 % 100 μA < IOUT < 200 mA, VIN = (VOUT + 1 V) to 20 V, TJ = −40°C to +85°C –1.2 +1.5 % 100 μA < IOUT < 200 mA, VIN = (VOUT + 1 V) to 20 V –1.8 +1.8 % LINE REGULATION ∆VOUT/∆VIN VIN = (VOUT + 1 V) to 20 V –0.015 +0.015 %/V LOAD REGULATION1 ∆VOUT/∆IOUT IOUT = 100 μA to 200 mA 0.002 0.004 %/mA SENSE INPUT BIAS CURRENT SENSEI-BIAS 100 μA < IOUT < 200 mA VIN = (VOUT + 1 V) to 20 V 10 1000 nA DROPOUT VOLTAGE2 VDROPOUT IOUT = 10 mA 30 60 mV IOUT = 200 mA 200 420 mV START-UP TIME3 tSTART-UP VOUT = 5 V 380 µs SOFT START SOURCE CURRENT SSI-SOURCE SS = GND 1.15 µA CURRENT-LIMIT THRESHOLD4 ILIMIT 250 360 460 mA THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C UNDERVOLTAGE THRESHOLDS Input Voltage Rising UVLO RISE 2.69 V Input Voltage Falling UVLO FALL 2.2 V Hysteresis UVLO HYS 230 mV PRECISION EN INPUT 2.7 V ≤ VIN ≤ 20 V Logic High ENHIGH 1.15 1.22 1.30 V Logic Low ENLOW 1.06 1.12 1.18 V Logic Hysteresis ENHYS 100 mV Leakage Current IEN-LKG EN = VIN or GND 0.04 1 µA Delay Time tEN-DLY From EN rising from 0 V to VIN to 0.1 × VOUT 80 μs OUTPUT NOISE OUT NOISE 10 Hz to 100 kHz, a ll output voltage options 11 µV rms POWER SUPPLY REJECTION RATIO PSRR 1 MHz, VIN = 7 V, VOUT = 5 V 50 dB 100 kHz, VIN = 7 V, VOUT = 5 V 68 dB 10 kHz, VIN = 7 V, VOUT = 5 V 88 dB 1 Based on an endpoint calculation using 100 μA and 200 mA loads. See Figure 7 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages above 2.7 V. 3 Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of the nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V or 4.5 V.
Rev. F | Page 4 of 24 INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT AND OUTPUT CAPACITANCE Minimum Capacitance1 CMIN TA = −40°C to +125°C 1.5 µF Capacitor Effective Series Resistance (ESR) RESR TA = −40°C to +125°C 0.001 0.3 Ω 1 The minimum input and output capacitance must be greater than 1.5 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended, while Y5V and Z5U capacitors are not recommended for use with any LDO.
operational section of this specification is not implied. extended periods may affect product reliability. junction-to-ambient thermal resistance of the package (θJA). is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal Resistance
6 VIN
- THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE
PAD CONNECT TO THE GROUND PLANE ON THE BOARD. Figure 3. 6-Lead LFCSP Pin Configuration
5 VOUT
4 SENSE/ADJ
Figure 4. 5-Lead TSOT Pin Configuration
- THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE
PAD CONNECT TO THE GROUND PLANE ON THE BOARD. Figure 5. 8-Lead SOIC Pin Configuration Table 5. Pin Function Descriptions also set the output voltage higher than the fixed output voltage (ADJ).
10 V output according to Equation 3 (see Figure 50):
the output voltage noise is proportional to the output voltage. to the target voltage to minimize the increase in output noise. the error amplifier. RNR is chosen to be small with respect to R2. gain is determined by the parallel combination of RNR and R1. slightly greater than unity gain. Figure 50. Noise Reduction Modification where RPAR is a parallel combination of R1 and RNR.
- DC gain of 10 (20 dB)
- 3 dB roll-off frequency of 1.75 Hz
- High frequency ac gain of 1.099 (0.82 dB)
- Theoretical noise reduction factor of 9.1 (19.2 dB)
- Measured rms noise of the adjustable LDO without noise reduction is 70 µV rms
- Measured rms noise of the adjustable LDO with noise reduction is 12 µV rms
- Measured noise reduction of approximately 15.3 dB Note that the measured noise reduction is less than the theoretical noise reduction. Figure 51 shows the noise spectral density of an adjustable ADP7118 set to 6 V and 12 V with and without the noise reduction network. The output noise with the noise reduction network is approximately the same for both voltages, especially beyond 100 Hz. The noise of the 6 V and 12 V outputs without the noise reduction network differs by a factor of 2 up to approximately 20 kHz. Above 40 kHz, the closed loop gain of the error amplifier is limited by the open loop gain characteristic. Therefore, the noise contribution from 20 kHz to 100 kHz is less than what it is if the error amplifier had infinite bandwidth. This is also the reason why the noise is less than what might be expected simply based on the dc gain, that is, 70 µV rms vs. 110 µV rms. NOISE SPECTRAL DENSITY (nV/√Hz) FREQUENCY (Hz) 10M1M100k10k1k100101 100 10k 100k 11849-100 12V NOISE REDUCTION 12V NO NOISE REDUCTION 6V NOISE REDUCTION 6V NO NOISE REDUCTION
Figure 51. 6 V and 12 V Output Voltage with and Without Noise Reduction where power supply sequencing is critical. as shown in Figure 50, the start-up time is approximately 0.6 sec. length of the start-up time instead of the soft start capacitor.
is restored to the operating value. junction temperature does not exceed 125°C. the maximum junction temperature of 125°C. solder the package GND pins to the PCB. Table 6. Typical θJA Values 1 Device soldered to minimum size pin traces. Table 7. Typical ΨJB Values TA is the ambient temperature. VIN and VOUT are input and output voltages, respectively. to ensure that the junction temperature does not rise above 125°C.
Figure 66. Example TSOT PCB Layout Table 8. Recommended LDOs for Very Low Noise Operation
10 Hz to
1 MHz Package
Table 9. Related Devices
0.20 REF
0.05 MAX
0.02 NOM
0.65 BSC
Figure 67. 6-Lead Lead Frame Chip Scale Package [LFCSP]
0.10 MAX
0.05 NOM
3.81 REF
1.04 REF
1.27 BSC
Figure 68. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP]
0.95 BSC
1.90 REF
1.00 MAX
Figure 69. 5-Lead Thin Small Outline Transistor Package [TSOT] 2 W = Qualified for Automotive Applications. 3 For additional voltage options, contact a local Analog Devices, Inc., sales or distribution representative. 4 The evaluation boards are preconfigured with an adjustable ADP7118.
Rev. F | Page 24 of 24 AUTOMOTIVE PRODUCTS The ADP7118W model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that this automotive model may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ©2014–2020 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the propert y of their respective owners. D11849-9/20(F)