ADNS-3040

ADNS-3040 HP | Alldatasheet

Document overview

• Manufacturer or author: pROVIDED bY alldatasheet.com(free datasheet download site)
• PDF pages: 26

Technical content

Features

• •••• Low power architecture
• •••• Self-adjusting power-saving modes for longest battery life
• •••• High speed motion detection up to 20 ips and 8G
• •••• SmartSpeed self-adjusting frame rate for optimum performance
• •••• Motion detect pin output
• •••• Internal oscillator – no clock input needed
• •••• Selectable 400 and 800 cpi resolution
• •••• Wide operating voltage: 2.5V-3.6V nominal
• •••• Four wire serial port
• •••• Minimal number of passive components

Applications

• •••• Integrated input devices
• •••• Battery-powered input devices

Figure 1. Package outline drawing (top view) Figure 2. Package outline drawing

1. Dimension in millimeters(inches).
2. Dimension tolerence of ± 0.1mm.
3. Coplanarity of leads: 0.01mm.
4. Lead pitch toleronce: ± 0.15mm.
5. Cummulative pitch tolerance: ±0.15mm.
6. Angular tolerance: ±3.0˚.
7. Chamfer (25˚ x 2) on the taper side of the lead.
8. * These dimension are for references only and

should not be used to mechanically reference the sensor.

1 NCS Chip select (active low input)

2 MISO Serial data output (Master In/Slave Out)

3 SCLK Serial clock input

4 MOSI Serial data input (Master Out/Slave In)

5 MOTION Motion Detect (active low output)

6 XY_LED LED control

8 NC No connection

9 AGND Analog Ground

10 SHTDWN Shutdown (active high input)

11 AVDD Analog Supply Voltage

12 GND Ground

13 GND Ground

14 AGND Analog Ground

15 VDD Supply Voltage

16 GND Ground

17 NC No connection

18 NC No connection

19 AGND Analog Ground

20 NC No connection

package that align to the lens. LED in relation to the lens. recommended for illumination. Figure 3. Recommended PCB mechanical cutouts and spacing

1.731 Base Plate

Figure 4. 2D Assembly drawing of ADNS-3040 (top and side view) Figure 5. Exploded view

1 PTE1

Notes The supply and ground paths should be laid out using a star topology. Figure 8. Schematic Diagram for Interface between ADNS-3040 and microcontroller

• Passes FCC B and worldwide analogous emission limits when assembled into a mouse with shielded cable and following Agilent recommendations.
• Passes IEC-1000-4-3 radiated susceptibility level when assembled into a mouse with shielded cable and following Agilent recommendations.
• Passes EN61000-4-4/IEC801-

4 EFT tests when assembled

• UL flammability level UL94 V-0.
• Provides sufficient ESD creepage/clearance distance to avoid discharge up to 15kV when assembled into a mouse according to usage instructions above. Recommended Operating Conditions * Please note that for HSDL-4261 IR LED, the min power supply is 2.5V. Object Surface 2.40 0.094 Sensor Lens

Figure 9. Distance from lens reference plane to surface VDD 2.6 3.6 Volts Including noise. Serial Port Clock Frequency f SCLK 1 MHz Active drive, 50% duty cycle.

Parameter Symbol Minimum Typical Maximum Units Notes Motion delay after reset t MOT-RST 23 ms From SW_RESET register write to valid motion, assuming motion is present Shutdown t STDWN 50 ms From STDWN pin active to low current Wake from shutdown t WAKEUP 1s From STDWN pin inactive to valid motion. Notes: A RESET must be asserted after a shutdown. Refer to section "Notes on Shutdown and Forced Rest", also note t MOT-RST Forced Rest enable t REST-EN 1s From RESTEN bits set to low current W ake from Forced Rest t REST-DIS 1s From RESTEN bits cleared to valid motion MISO rise time t r-MISO 150 300 ns CL = 100pF MISO fall time t f-MISO 150 300 ns CL = 100pF MISO delay after SCLK t DLY -MISO 120 ns From SCLK falling edge to MISO data valid, no load conditions MISO hold time t HOLD-MISO 0.5 1/f SCLK µs Data held until next falling SCLK edge MOSI hold time t HOLD-MOSI 200 ns Amount of time data is valid after SCLK rising edge MOSI setup time t SETUP-MOSI 120 ns From data valid to SCLK rising edge SPI time between write commands tSWW 30 µs From rising SCLK for last bit of the first data byte, to rising SCLK for last bit of the second data byte. SPI time between write and read commands tSWR 20 µs From rising SCLK for last bit of the first data byte, to rising SCLK for last bit of the second address byte. SPI time between read and subsequent commands tSRW tSRR 500 ns From rising SCLK for last bit of the first data byte, to falling SCLK for the first bit of the address byte of the next command. SPI read address-data delay tSRAD 4 µs From rising SCLK for last bit of the address byte, to falling SCLK for first bit of data being read. NCS inactive after motion burst tBEXIT 500 ns Minimum NCS inactive time after motion burst before next SPI usage NCS to SCLK active t NCS-SCLK 120 ns From NCS falling edge to first SCLK rising edge SCLK to NCS inactive (for read operation) tSCLK-NCS 120 ns From last SCLK rising edge to NCS rising edge, for valid MISO data transfer SCLK to NCS inactive (for write operation) tSCLK-NCS 20 us From last SCLK rising edge to NCS rising edge, for valid MOSI data transfer NCS to MISO high-Z t NCS-MISO 500 ns From NCS rising edge to MISO high-Z state MOTION rise time t r-MOTION 150 300 ns CL = 100pF MOTION fall time t F-MOTION 150 300 ns CL = 100pF SHTDWN pulse width t P-STDWN 1s Transient Supply Current I DDT 45 mA Max supply current during a V DD ramp from 0 to 2.6V

Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V DD=2.6 V. Parameter Symbol Minimum Typical Maximum Units Notes DC Supply Current in various modes IDD_RUN IDD_REST1 IDD_REST2 IDD_REST3 2.9 0.5 0.1 0.03 1.8 0.4 0.15 mA Average current, including LED current. No load on MISO, MOTION. Peak Supply Current 40 mA Peak current in 100kHz bandwidth, including LED current. Shutdown Supply Current I DDSTDWN 11 2 µA SCLK, MOSI and NCS must be within 300mV of GND or V DD. STDWN must be within 300mV of VDD. Input Low Voltage V IL 0.6 V SCLK, MOSI, NCS, STDWN Input High Voltage V IH VDD - 0.6 V SCLK, MOSI, NCS, STDWN Input hysteresis V I_HYS 100 mV SCLK, MOSI, NCS, STDWN Input leakage current I leak ±1 ±10 µA Vin=VDD-0.6V, SCLK, MOSI, NCS, STDWN XY_LED Current I LAS 13 25 mA XY_LED pin voltage should be greater than 0.15V and less than 1.4V. XY_LED current is pulsed, so average value is much lower Output Low Voltage V OL 0.7 V I OUT=1mA, MISO, MOTION Output High Voltage V OH VDD-0.7 V I OUT=-1mA, MISO, MOTION Input Capacitance C in 10 pF MOSI, NCS, SCLK, STDWN

power-saving modes. Each mode has a different motion detection period, affecting response time to mouse motion (Response Time). The sensor automatically changes to the appropriate mode, depending on the time since the last reported motion (Downshift Time). The parameters of each mode are shown in the following table. Motion Pin Timing The motion pin is a level- sensitive output that signals the micro-controller when motion has occurred. The motion pin is lowered whenever the motion bit is set; in other words, whenever there is data in the Delta_X or Delta_Y registers. Clearing the motion bit (by reading Delta_Y and Delta_X, or writing to the Motion register) will put the motion pin high. LED Mode For power savings, the LED will not be continuously on. ADNS-3040 will flash the LED only when needed. Chip Select Operation The serial port is activated after NCS goes low. If NCS is raised during a transaction, the entire transaction is aborted and the serial port will be reset. This is true for all transactions. After a transaction is aborted, the normal address-to-data or transaction-to-transaction delay is still required before beginning the next transaction. To improve communication reliability, all serial transactions should be framed by NCS. In other words, the port should not remain enabled during periods of non- use because ESD and EFT/B events could be interpreted as serial communication and put the chip into an unknown state. In addition, NCS must be raised after each burst- mode transaction is complete to terminate burst-mode. The port is not available for further use until burst-mode is terminated. Synchronous Serial Port The synchronous serial port is used to set and read parameters in the ADNS-3040, and to read out the motion information. The port is a four wire serial port. The host micro- controller always initiates communication; the ADNS- 3040 never initiates data transfers. SCLK, MOSI, and NCS may be driven directly by a micro-controller. The port pins may be shared with other SPI slave devices. When the NCS pin is high, the inputs are ignored and the output is tri- stated. The lines that comprise the SPI port: SCLK: Clock input. It is always generated by the master (the micro-controller). MOSI: Input data. (Master Out/Slave In) MISO: Output data. (Master In/Slave Out) NCS: Chip select input (active low). NCS needs to be low to activate the serial port; otherwise, MISO will be high Z, and MOSI & SCLK will be ignored. NCS can also be used to reset the serial port in case of an error. Mode Response Time (nominal) Downshift Time (nominal) Rest 1 16.5 ms 237 ms Rest 2 82 ms 8.4 s Rest 3 410 ms 504 s

Notes on Shutdown and Forced Rest The ADNS-3040 can be set in Rest mode through the Configuration_Bits register (0x11). This is to allow for further power savings in applications where the sensor does not need to operate all the time. The ADNS-3040 can be set in Shutdown mode by asserting the SHTDWN pin. For proper operation, SHTDWN pulse width must be at least t STDWN. Shorter pulse widths may cause the chip to enter an undefined state. In addition, the SPI port should not be accessed when SHTDWN is asserted. (Other ICs on the same SPI bus can be accessed, as long as the sensor’s NCS pin is not asserted.) The table below shows the state of various pins during shutdown. After deasserting SHTDWN, a full reset must be initiated. Wait t WAKEUP before accessing the SPI port, then write 0x5A to the POWER_UP_RESET register. Any register settings must then be reloaded. * NCS pin must be held to 1 (high) if SPI bus is shared with other devices. It can be in either state if the sensor is the only device in addition to the microcontroller. Note: There are long wakeup times from shutdown and forced Rest. These features should not be used for power management during normal mouse motion. Notes on Power-up The ADNS-3040 does not perform an internal power up self-reset; the POWER_UP_RESET register must be written every time power is applied. The appropriate sequence is as follows: 1. Apply power 2. Drive NCS high, then low to reset the SPI port 3. Write 0x5a to register 0x3a 4. Read from registers 0x02, 0x03 and 0x04 (or read these same 3 bytes from burst motion register 0x42) one time regardless the state of the motion pin. During power-up there will be a period of time after the power supply is high but before any clocks are available. The table below shows the state of the various pins during power-up and reset. Pin On Power-Up NCS high before reset NCS Low before reset After Reset NCS functional high low functional MISO undefined undefined functional depends on NCS SCLK ignored ignored functional depends on NCS MOSI ignored ignored functional depends on NCS XY_LED undefined undefined undefined functional MOTION undefined undefined undefined functional SHTDWN must be low must be low must be low functional State of Signal Pins After V DD is Valid Pin SHTDWN active NCS Functional* MISO Undefined SCLK Undefined MOSI Undefined XY_LED Low current MOTION Undefined

The ADNS-3040 registers are accessible via the serial port. The registers are used to read motion data and status as well as to set the device configuration. Address Register Read/Write Default Value 0x00 Product_ID R 0x0D 0x01 Revision_ID R 0x02 0x02 Motion R/W 0x00 0x03 Delta_Y R Any 0x04 Delta_X R Any 0x05 SQUAL R Any 0x06 Shutter_Upper R Any 0x07 Shutter_Lower R Any 0x08 Maximum_Pixel R Any 0x09 Pixel_Sum R Any 0x0a Minimum_Pixel R Any 0x0b Pixel_Grab R/W Any 0x0c CRC0 R Any 0x0d CRC1 R Any 0x0e CRC2 R Any 0x0f CRC3 R Any 0x10 Self_T est W 0x11 Configuration_Bits R/W 0x03 0x12-0x2d Reserved 0x2e Observation R/W Any 0x2f-0x38 Reserved 0x3a POWER_UP_RESET W 0x3b-0x3d Reserved 0x3e Inverse_Revision_ID R 0xFD 0x3f Inverse_Product_ID R 0xF2 0x42 Motion_Burst R Any

Product ID Address: 0x00 Access: Read Reset Value: 0x0D B i t 7654321 0 Field PID 7 PID6 PID5 PID4 PID3 PID2 PID1 PID0 Data Type: 8-Bit unsigned integer USAGE: This register contains a unique identification assigned to the ADNS-3040. The value in this register does not change; it can be used to verify that the serial communications link is functional. Revision ID Address: 0x01 Access: Read Reset Value: 0x02 B i t 76543210 Field RID 7 RID6 RID5 RID4 RID3 RID2 RID1 RID0 Data Type: 8-Bit unsigned integer USAGE: This register contains the IC revision. It is subject to change when new IC versions are released.

Motion Address: 0x02 Access: Read/Write Reset Value: 0x00 B i t 76543210 Field MOT PIXRDY PIXFIRST OVF Reserved Reserved Reserved Reserved Data Type: Bit field. USAGE: Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If the MOT bit is set, then the user should read registers 0x03 and 0x04 to get the accumulated motion. Read this register before reading the Delta_Y and Delta_X registers. Writing anything to this register clears the MOT and OVF bits, Delta_Y and Delta_X registers. The written data byte is not saved. Internal buffers can accumulate more than eight bits of motion for X or Y. If either one of the internal buffers overflows, then absolute path data is lost and the OVF bit is set. This bit is cleared once some motion has been read from the Delta_X and Delta_Y registers, and if the buffers are not at full scale. Since more data is present in the buffers, the cycle of reading the Motion, Delta_X and Delta_Y registers should be repeated until the motion bit (MOT) is cleared. Until MOT is cleared, either the Delta_X or Delta_Y registers will read either positive or negative full scale. If the motion register has not been read for long time, at 400 cpi it may take up to 16 read cycles to clear the buffers, at 800 cpi, up to 32 cycles. To clear an overflow, write anything to this register. The PIXRDY bit will be set whenever a valid pixel data byte is available in the Pixel_Dump register. Check that this bit is set before reading from Pixel_Dump. To ensure that the Pixel_Grab pointer has been reset to pixel 0,0 on the initial write to Pixel_Grab, check to see if PIXFIRST is set to high. Field Name Description MOT Motion since last report 0 = No motion 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers PIXRDY Pixel Dump data byte is available in Pixel_Dump register 0 = data not available 1 = data available PIXFIRST This bit is set when the Pixel_Grab register is written to or when the complete pixel array has been read, initiating an increment to pixel 0,0. 0 = Pixel_Grab data not from pixel 0,0 1 = Pixel_Grab data is from pixel 0,0 OVF Motion overflow, ∆Y and/or ∆X buffer has overflowed since last report 0 = no overflow 1 = Overflow has occurred

Delta Y Address: 0x03 access: Read Reset Value: Undefined Bit 7 6 5 4 3 2 1 0 Field X 7 X6 X5 X4 X3 X2 X1 X0 Data Type: Eight bit 2’s complement number. USAGE: Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. 00 01 02 7E 7F +127+126+1 +2 FFFE8180 0-1-2-127-128Motion Delta_Y NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially. Delta X Address: 0x04 Access: Read Reset Values: Undefined Bit 7 6 5 4 3 2 1 0 Field Y 7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Data Type: Eight bit 2’s complement number. USAGE: X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. 00 01 02 7E 7F +127+126+1 +2 FFFE8180 0-1-2-127-128Motion Delta_X NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially.

Maximum Pixel address: 0x08 Access: Read Reset Value: Underfined B i t 76543210 Field MP 7 MP6 MP5 MP4 MP3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 254. The maximum pixel value can vary with every frame. Pixel_Sum Address: 0x09 Access: Read Reset Value: Undefined B i t 76543210 Field AP 7 AP6 AP5 AP4 AP3 AP2 AP1 AP0 Data Type: High 8 bits of an unsigned 17-bit integer. USAGE: This register is used to find the average pixel value. It reports the seven bits of a 16- bit counter, which sums all pixels in the current frame. It may be described as the full sum divided by 512. To find the average pixel value, use the following formula: Average Pixel = Register Value * 128/121 = Register Value * 1.06 The maximum register value is 240. The minimum is 0. The pixel sum value can change on every frame. Minimum_Pixel Address: 0x0a Access: Read Reset Value: Undefined B i t 76543210 Field MP 7 MP6 MP5 MP4 MP3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = 254. The minimum pixel value can vary with every frame.

CRC0 Address: 0x0c Access: Read Reset Value: Undefined B i t 76543210 Field CRC0 7 CRC06 CRC05 CRC04 CRC03 CRC02 CRC01 CRC00 Data Type: Eight-bit number USAGE: Register 0x0c reports the first byte of the system self test results. Value = 0xAF. See Self Test register 0x10. Pixel_Grab Address: 0x0b Access: Read/Write Reset Value: Undefined B i t 76543210 Field PD 7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 Data Type: Eight-bit word. USAGE: For test purposes, the sensor will read out the contents of the pixel array, one pixel per frame. To start a pixel grab, write anything to this register to reset the pointer to pixel 0,0. Then read the PIXRDY bit in the Motion register. When the PIXRDY bit is set, there is valid data in this register to read out. After the data in this register is read, the pointer will automatically increment to the next pixel. Reading may continue indefinitely; once a complete frame’s worth of pixels has been read, PIXFIRST will be set to high to indicate the start of the first pixel and the address pointer will start at the beginning location again. Pixel Address Map (Looking through the ADNS-3120-001 Lens) First Pixel 0 22 44 66 88 110 132 154 176 198 220 242 264 286 308 330 352 374 396 418 440 462 1 23 45 67 89 111 133 155 177 199 221 243 265 287 309 331 353 375 397 419 441 463 2 24 46 68 90 112 134 156 178 200 222 244 266 288 310 332 354 376 398 420 442 464 3 25 47 69 91 113 135 157 179 201 223 245 267 289 311 333 355 377 399 421 443 465 4 26 48 70 92 114 136 158 180 202 224 246 268 290 312 334 356 378 400 422 444 466 5 27 49 71 93 115 137 159 181 203 225 247 269 291 313 335 357 379 401 423 445 467 6 28 50 72 94 116 138 160 182 204 226 248 270 292 314 336 358 380 402 424 446 468 7 29 51 73 95 117 139 161 183 205 227 249 271 293 315 337 359 381 403 425 447 469 8 30 52 74 96 118 140 162 184 206 228 250 272 294 316 338 360 382 404 426 448 470 9 31 53 75 97 119 141 163 185 207 229 251 273 295 317 339 361 383 405 427 449 471 10 32 54 76 98 120 142 164 186 208 230 252 274 296 318 340 362 384 406 428 450 472 11 33 55 77 99 121 143 165 187 209 231 253 275 297 319 341 363 385 407 429 451 473 12 34 56 78 100 122 144 166 188 210 232 254 276 298 320 342 364 386 408 430 452 474 13 35 57 79 101 123 145 167 189 211 233 255 277 299 321 343 365 387 409 431 453 475 14 36 58 80 102 124 146 168 190 212 234 256 278 300 322 344 366 388 410 432 454 476 15 37 59 81 103 125 147 169 191 213 235 257 279 301 323 345 367 389 411 433 455 477 16 38 60 82 104 126 148 170 192 214 236 258 280 302 324 346 368 390 412 434 456 478 17 39 61 83 105 127 149 171 193 215 237 259 281 303 325 347 369 391 413 435 457 479 18 40 62 84 106 128 150 172 194 216 238 260 282 304 326 348 370 392 414 436 458 480 19 41 63 85 107 129 151 173 195 217 239 261 283 305 327 349 371 393 415 437 459 481 20 42 64 86 108 130 152 174 196 218 240 262 284 306 328 350 372 394 416 438 460 482 21 43 65 87 109 131 153 175 197 219 241 263 285 307 329 351 373 395 417 439 461 483 Last Pixel RBLB Top Xray View of Mouse POSITIVE X 201 A3040 YYWW P O S I T I V E Y

CRC3 Address: 0x0f Access: Read Reset Value: Undefined B i t 76543210 Field CRC3 7 CRC36 CRC35 CRC34 CRC33 CRC32 CRC31 CRC30 Data Type: Eight-bit number USAGE: Register 0x0f reports the fourth byte of the system self test results. Value = 0x22. See Self Test register 0x10. CRC2 Address: 0x0e Access: Read Reset Value: Undefined B i t 76543210 Field CRC2 7 CRC26 CRC25 CRC24 CRC23 CRC22 CRC21 CRC20 Data Type: Eight-bit number USAGE: Register 0x0e reports the third byte of the system self test results. Value = 0x31. See Self Test register 0x10. CRC1 Address: 0x0d Access: Read Reset Value: Undefined B i t 76543210 Field CRC1 7 CRC16 CRC15 CRC14 CRC13 CRC12 CRC11 CRC10 Data Type: Eight bit number USAGE: Register 0x0c reports the second byte of the system self test results. Value = 0x4E. See Self Test register 0x10.

Reserved Address: 0x12-0x2d Configuration_bits Address: 0x11 Access: Read/Write Reset Value: 0x03 B i t 76543210 Field RES Reserved RESTEN 1 RESTEN0 Reserved Reserved Reserved Reserved Data Type: Bit field USAGE: Register 0x11 allows the user to change the configuration of the sensor. Setting the RESTEN bit forces the sensor into Rest mode, as described in the power modes section above. The RES bit allows selection between 400 and 800 cpi resolution. Note: Forced Rest has a long wakeup time and should not be used for power management during normal mouse motion. Field Name Description RESTEN1-0 Puts chip into Rest mode 00 = normal operation 01 = force Rest1 10 = force Rest2 11 = force Rest3 RES Sets resolution 0 = 400 1 = 800 Self_Test Address: 0x10 Access: Write Reset Value: NA B i t 76543210 Field Reserved Reserved Reserved Reserved Reserved Reserved Reserved TESTEN Data Type: Bit field USAGE: Set the TESTEN bit in register 0x10 to start the system self-test. The test takes 250ms. During this time, do not write or read through the SPI port. Results are available in the CRC0-3 registers. After self-test, reset the chip to start normal operation. Field Name Description TESTEN Enable System Self T est 0 = Disable 1 = Enable

Observation Address: 0x2e Access: Read/Write Reset Value: Undefined B i t 76543210 Field MODE 1 MODE0 Reserved Reserved OBS 3 OBS2 OBS1 OBS0 Data Type: Bit field USAGE: Register 0x2e provides bits that are set every frame. It can be used during EFTB testing to check that the chip is running correctly. Writing anything to this register will clear the bits. Reserved Address: 0x2f-0x39 POWER_UP_RESET Address: 0x3a Access: Write Reset Value: Undefined B i t 76543210 Field RST 7 RST6 RST5 RST4 RST3 RST2 RST1 RST0 Data Type: 8-bit integer USAGE: Write 0x5A to this register to reset the chip. All settings will revert to default values. Field Name Description MODE1-0 Mode Status: Reports which mode the sensor is in. 00 = Run 01 = Rest1 10 = Rest2 11 = Rest3 OBS 3-0 Set every frame Inverse_Revision_ID Address: 0x3e Access: Read Reset Value: 0xFD B i t 76543210 Field NRID 7 NRID6 NRID5 NRID4 NRID3 NRID2 NRID1 NRID0 Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Revision_ID. It can be used to test the SPI port.

www.agilent.com/ semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152(Domestic/Inter- national), or 0120-61-1280(Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright © 2005 Agilent Technologies, Inc. August 23, 2005 5989-3540EN Motion_Burst Address: 0x42 Access: Read Reset Value: Any B i t 76543210 Field MB 7 MB6 MB5 MB4 MB3 MB2 MB1 MB0 Data Type: Various. USAGE: Read from this register to activate burst mode. The sensor will return the data in the Motion register, Delta_Y, Delta_X, Squal, Shutter_Upper, Shutter_Lower, and Maximum_Pixel. A minimum of 3 bytes should be read during a burst read. Reading the first 3 bytes clears the motion data. Inverse_Product_ID Address: 0x3f Access: Read Reset Value: 0xF2 B i t 76543210 Field NPID 7 NPID6 NPID5 NPID4 NPID3 NPID2 NPID1 NPID0 Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Product_ID. It can be used to test the SPI port.