ADN4667

ADN4667 (Rev. B)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 16

Technical content

3 V LVDS Quad CMOS

Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.

FEATURES

±15 kV ESD protection on output pins

400 Mbps (200 MHz) switching rates

Flow through pinout simplifies PCB layout 300 ps typical differential skew 400 ps maximum differential skew 1.7 ns maximum propagation delay

3.3 V power supply

±310 mV differential signaling Low power dissipation (10 mW typical) Interoperable with existing 5 V LVDS receivers High impedance on LVDS outputs on power-down Conforms to TIA/EIA-644 LVDS standards Industrial operating temperature range: −40°C to +85°C Available in surface-mount (SOIC) and low profile TSSOP package Qualified for automotive applications

APPLICATIONS

Backplane data transmission Cable data transmission Clock distribution FUNCTIONAL BLOCK DIAGRAM Figure 1. GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1 mA for driving a transmission medium such as a twisted pair cable. The transmitted signal develops a differential voltage of typi- cally ±310 mV across a termination resistor at the receiving end. This is converted back to a TTL/CMOS logic level by an LVDS receiver, such as the ADN4668. The ADN4667 also offers active high and active low enable/ disable inputs (EN and EN). These inputs control all four drivers and turn off the current outputs in the disabled state to reduce the quiescent power consumption to typically 10 mW . The ADN4667 and its companion LVDS receiver, the ADN4668, offer a new solution to high speed, point-to-point data trans- mission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL). 07032-001 ADN4667 DOUT1+ DOUT1– DIN1 DOUT2+ DOUT2– DIN2 DOUT3+ DOUT3– DIN3 DOUT4+ DOUT4– DIN4 EN EN GND VCC

Rev. B | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

3/12—Rev. A to Rev. B 5/08—Rev. 0 to Rev. A 1/08—Revision 0: Initial Version

Rev. B | Page 3 of 16 SPECIFICATIONS VCC = 3.0 V to 3.6 V; RL = 100 Ω; CL = 15 pF to GND; all specifications TMIN to TMAX, unless otherwise noted. All typical values are given for VCC = +3.3 V , TA = +25°C. Table 1. Parameter Symbol Min Typ Max Unit Conditions/Comments1, 2 LVDS OUTPUTS (DOUT+, DOUT−) Differential Output Voltage VOD 250 310 450 mV See Figure 2 and Figure 4 Change in Magnitude of VOD for Complementary Output States ΔVOD 1 35 |mV| See Figure 2 and Figure 4 Offset Voltage VOS 1.125 1.17 1.375 V See Figure 2 and Figure 4 Change in Magnitude of VOS for Complementary Output States ΔVOS 1 25 |mV| See Figure 2 and Figure 4 Output High Voltage VOH 1.33 1.6 V See Figure 2 and Figure 4 Output Low Voltage VOL 0.90 1.02 V See Figure 2 and Figure 4 INPUTS (DIN, EN, EN) Input High Voltage VIH 2.0 VCC V Input Low Voltage VIL GND 0.8 V Input High Current IIH −10 +2 +10 μA VIN = VCC or 2.5 V Input Low Current IIL −10 +2 +10 μA VIN = GND or 0.4 V Input Clamp Voltage VCL −1.5 −0.8 V ICL = −18 mA LVDS OUTPUT PROTECTION (DOUT+, DOUT−) Output Short-Circuit Current3 IOS −4.2 −9.0 mA Enabled, DIN = VCC, DOUT+ = 0 V or DIN = GND, DOUT− = 0 V Differential Output Short-Circuit Current3 IOSD −4.2 −9.0 mA Enabled, VOD = 0 V LVDS OUTPUT LEAKAGE (DOUT+, DOUT−) Power-Off Leakage IOFF −20 ±1 +20 μA VOUT = 0 V or 3.6 V, VCC = 0 V or open Output Three-State Current IOZ −10 ±1 +10 μA EN = 0.8 V and EN = 2.0 V, VOUT = 0 V or VCC POWER SUPPLY No Load Supply Current, Drivers Enabled ICC 4.0 8.0 mA DIN = VCC or GND Loaded Supply Current, Drivers Enabled ICCL 20 30 mA RL = 100 Ω all channels, DIN = VCC or GND (all inputs) No Load Supply Current, Drivers Disabled ICCZ 2.2 6.0 mA DIN = VCC or GND, EN = GND, EN = VCC ESD PROTECTION DOUT+, DOUT− ±15 kV Human body model All Pins Except DOUT+, DOUT− ±4 kV Human body model 1 Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD, ΔVOD, and ΔVOS. 2 The ADN4667 is a current mode device and functions within data sheet specifications only when a resistive load is applied to the driver outputs. Typical range is 90 Ω to 110 Ω. 3 Output short-circuit current (IOS) is specified as magnitude only; minus sign indicates direction only.

Rev. B | Page 6 of 16 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter Rating VCC to GND −0.3 V to +4 V Input Voltage (DIN) to GND −0.3 V to VCC + 0.3 V Enable Input Voltage (EN, EN) to GND −0.3 V to VCC + 0.3 V Output Voltage (DOUT+, DOUT−) to GND −0.3 V to VCC + 0.3 V Short-Circuit Duration (DOUT+, DOUT−) to GND Continuous Industrial Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature (TJ max) 150°C Power Dissipation (TJ max − TA)/θJA θJA Thermal Impedance Reflow Soldering Peak Temperature (10sec) 260°C max Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION

Figure 7. Pin Configuration Table 4. Pin Function Descriptions drivers when high and disables the drivers when low. 2 DIN1 Driver Channel 1 Logic Input. 3 DIN2 Driver Channel 2 Logic Input. 10 μF solid tantalum capacitor in parallel with a 0.1 μF capacitor to GND. 5 GND Ground Reference Point for All Circuitry on the Part. 6 DIN3 Driver Channel 3 Logic Input. 7 DIN4 Driver Channel 4 Logic Input. drivers when low or open circuit and disables the drivers and powers down the device when high.

Rev. B | Page 13 of 16 ORDERING GUIDE Model1, 2 Temperature Range Package Description Package Option ADN4667ARZ −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADN4667ARZ-REEL7 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 ADN4667ARUZ −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16 ADN4667ARUZ-REEL7 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16 ADN4667WARZ-REEL7 −40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 1 Z = RoHS Compliant Part.

2 W = Qualified for Automotive Applications

The ADN4667W model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that this automotive model may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for this model.

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Rev. B | Page 16 of 16 NOTES ©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07032-0-3/12(B)