ADM1034 ONSEMI | Alldatasheet
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© Semiconductor Components Industries, LLC, 2009 July, 2009 − Rev. 3
1 Publication Order Number:
Speed (RPM) Controller The ADM1034 is a dual −channel remote− and local −temperature sensor and fan controller. The remote channels monitor the temperature of two remote thermal diodes, which may be discrete 2N3904/6s or may be located on a microprocessor die. The device also monitors its own ambient temperature. The ADM1034 can monitor and control the speed of two cooling fans. The user can program a target fan speed, or else use the look−up table to input a temperature−to−fan speed profile. The look−up table can be configured to run the fans at discrete speeds (discrete mode) or to ramp the fan speed with temperature (linear mode). The ADM1034 communicates over a 2−wire SMBus 2.0 interface. An 8 −level LOCATION input allows the user to choose between SMBus 1.1 and SMBus 2.0. An ALERT output indicates error conditions. The THERM I/O signals overtemperature as an output and times THERM assertions as an input. Pin 8 can be configured as a reference for the THERM (PROCHOT) input.
FEATURES
- 1 Local and 2 Remote Temperature Channels
- ±1°C Accuracy on Local and Remote Channels
- Automatic Remote Temperature Channels, Up to 1 k/C0087
- Fast (Up to 64 Measurements per Second)
- SMBus 2.0, 1.1, and 1.0 Compliant
- SMBus Address Input/LOCATION Input to UDID
- Programmable Over/Undertemperature Limits
- Programmable Fault Queue
- SMBusALERT Output
- Fail−Safe Overtemperature Comparator Output
- Fan Speed (RPM) Controller
- Look−Up Table for Temperature−to−Fan Speed Control
- Linear and Discrete Options for Look−Up Table
- FAN_FAULT Output
- THERM Input, Used to Time PROCHOT Assertions
- REF Input, Used as Reference for THERM (PROCHOT)
- 3.0 V to 5.5 V Supply
- Small 16−Lead QSOP Package
- This is a Pb−Free Device
APPLICATIONS
- Desktop and Notebook PCs
- Embedded Systems
- Telecommunications Equipment
- LCD Projectors http://onsemi.com PIN ASSIGNMENT (Top View) TACH1 DRIVE2 TACH2 THERM VCC GND DRIVE1 SDA LOCATION D2– D2+ SCL ADM1034 FAN_FAULT/REF ALERT D1− D1+ See detailed ordering and shipping information in the package dimensions section on page 38 of this data sheet.
ORDERING INFORMATION
# = Pb −Free Package YYWW = Date Code 1034A RQZ #YYWWQSOP−16 CASE 492
Figure 1. Functional Block Diagram
http://onsemi.com ABSOLUTE MAXIMUM RATINGS Parameter Rating Unit Positive Supply Voltage (VCC) −0.3, +6.5 V Voltage on Any Input or Output Pin except FAN_FAULT and LOCATION −0.3 to VDD +6.5 V Voltage on FAN_FAULT (Note 1) VCC Voltage on LOCATION VCC + 0.3 V Input Current at Any Pin ±20 mA Maximum Junction Temperature (TJ max) 150 °C Storage Temperature Range −65 to +150 °C Lead Temperature, Soldering (10 s) 300 °C IR Reflow Peak Temperature 220 °C ESD Rating − All Pins 1500 V 1. During powerup the voltage on FAN_FAULT should not be higher than VCC. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above t he Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device is ESD sensitive. Use standard ESD precautions when handling. THERMAL CHARACTERISTICS Parameter Rating 16−Lead QSOP Package /C0113JA = 150°C/W, /C0113JC = 39°C/W PIN ASSIGNMENT Pin No. Mnemonic Description 1 DRIVE1 DRIVE1 Pin Drives Fan 1. Open−drain output. Requires a pullup resistor. 2 TACH1 Fan 1 Fan Speed Measurement Input. Connects to the fan’s TACH output to measure the fan speed. 3 DRIVE2 DRIVE2 Pin Drives Fan 2. Open−drain output. Requires a pullup resistor. 4 TACH2 Fan 2 Fan Speed Measurement Input. Connects to the fan’s TACH output to measure the fan speed. 5 GND Ground for Analog and Digital Circuitry. 6 VCC Power. Can be powered by 3.3 V standby power if monitoring in low power states is required.
7 THERM Can be configured as an overtemperature interrupt output, or as an input (to monitor PROCHOT
output of an INTEL CPU). A timer measures assertion times on the THERM pin (either input or output). 8 FAN_FAULT/REF FAN_FAULT: Open−Drain Output. Asserted low when one or both fans stall. Requires a pullup resistor to VCC. REF: Analog Input Reference for the THERM Input. 9 D1− Cathode Connection for the First Thermal Diode or Diode−Connected Transistor. 10 D1+ Anode Connection for the First Thermal Diode or Diode−Connected Transistor. 11 D2− Cathode Connection for the Second Thermal Diode or Diode−Connected Transistor. 12 D2+ Anode Connection for the Second Thermal Diode or Diode−Connected Transistor. 13 LOCATION 8−Level Analog Input. Used to determine the correct SMBus version and the SMBus address (in fixed and discoverable mode) and to set the LLL bits in the UDID (in ARP−capable mode). 14 ALERT Open−Drain Output. SMBusALERT pin. Alerts the system in the case of out−of−limit events, such as over temperature. Can be configured as sticky SMBus mode or comparator mode. 15 SDA Serial Bus Bidirectional Data. Connects to the SMBus master’s data line. Requires pullup resistor if not provided elsewhere in the system. 16 SCL Serial SMBus Clock Input. Connects to the SMBus master’s clock line. Requires pullup resistor if not already provided in the system.
http://onsemi.com ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. (Note 1) Parameter Test Conditions / Comments Min Typ Max Unit Power Supply Supply Voltage, VCC (Note 2) 3.0 3.30 3.6 V Supply Current, ICC Interface inactive, ADC active 3.0 mA Standby mode 900 /C0109A Undervoltage Lockout Threshold 2.5 V Power−On Reset Threshold 1.0 2.4 V Temperature−to−Digital Converter Internal Sensor Accuracy +20°C ≤ TA ≤ +60°C ±1.0 ±2.0 ±2.5 Resolution 0.03125 °C External Diode Sensor Accuracy −40°C ≤ TD ≤ +100°C; TA = +40°C ±0.5 ±1.0 ±1.0 ±1.25 ±2.5 Resolution 0.03125 °C Remote Sensor Source Current High level Mid level Low level 5.5 /C0109A Series Resistance Cancellation 1000 /C0087 Power Supply Sensitivity ±1.0 %/V Conversion Time (Local Temperature) Averaging enabled 11 ms Conversion Time (Remote Temperature) Averaging enabled 32 ms Total Conversion Time Averaging enabled 75 ms Open−Drain Digital Outputs (ALERT, THERM, FAN_FAULT, DRIVE1, DRIVE2) (Note 3) Output Low Voltage, VOL IOUT = −6.0 mA; VCC = +3 V 0.4 V High Level Output Leakage Current, IOH VOUT = VCC; VCC = 3 V 0.1 1.0 /C0109A Digital Input Leakage Current (TACH1, TACH2) Input High Current, IIH −VIN = VCC −1.0 /C0109A Input Low Current, IIL VIN = 0 1.0 /C0109A Input Capacitance, CIN 7.0 pF Digital Input Logic Levels (TACH1, TACH2) Input High Voltage, VIH 2.0 5.5 V Input Low Voltage, VIL −0.3 +0.8 V Hysteresis 500 mV p−p Open−Drain Serial Data Bus Output (SDA) Output Low Voltage, VOL IOUT = −6.0 mA; VCC 0.4 V High Level Output Leakage Current, IOH VOUT = VCC 0.1 1.0 /C0109A Serial Data Bus Inputs (SCL, SDA) Input High Voltage, VIH 2.1 V Input Low Voltage, VIL 0.8 V Hysteresis 500 mV Analog Inputs (Location, REF) Input Resistance 80 125 160 k/C0087 specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge. 2. Operation at 5.5 V is guaranteed by design, not production tested. 3. Recommend use of 100 k /C0087 pullup resistors for all open−drain outputs from the ADM1034. 4. Guaranteed by design, not production tested. 5. SMBus timeout disabled by default. See the SMBus section for more information.
are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge.
- Operation at 5.5 V is guaranteed by design, not production tested.
- Recommend use of 100 k /C0087 pullup resistors for all open−drain outputs from the ADM1034.
- Guaranteed by design, not production tested.
- SMBus timeout disabled by default. See the SMBus section for more information.
Figure 2. Serial Bus Timing Diagram
Figure 3. Temperature Error vs. PCB Track Figure 4. Remote Temperature Error vs. Figure 5. Remote Temperature Error vs. Figure 6. Remote Temperature Error vs. Figure 7. Remote Temperature Error vs. Figure 8. Remote Temperature Error vs.
01 M 2 M 4 M 3M 5M
01 M 3 M 2M 5M 4M 6M
01 M 2 M 3 M 4 M 6 M 5M
Figure 16. Setting Up Multiple ADM1034 Addresses
- Prepare to ARP (general)
- Reset device (general and directed)
- Get UDID (general and directed)
- Assign address (general)
Table 1. Internal Register Descriptions Configuration Provides control and configuration of various functions on the device. Conversion Rate Determines the number of measurements per second completed by the ADM1034. the first byte of data is always a register address, written to the address pointer register. Status Provides the status of each limit comparison. Interrupt Mask Allows the option to mask ALERTs due to particular out−of−limit conditions. Value and Limit Stores the results of temperature and fan speed measurements, along with their limit values. subtracting up to 15.875°C from a temperature reading. THERM Limit and Hysteresis Contains the temperature value at which THERM is asserted and indicates the level of hysteresis. Look−Up Table Used to program the look−up table for the fan speed−to−temperature profile. a percentage of a time window. The user can program the length of the time window. Table 2. Resistor Ratios for Setting LOCATION Bits
- ARP denotes ARP −capable mode, FD denotes fixed and discoverable mode.
Table 3. UDID Values PEC and uses a random number address device). Implementer’s Forum or the PCI SIG. <79:64> Interface Identifies the protocol layer interfaces supported by the ADM1034. This represents SMBus 2.0 as the Interface version.. high. This indicates that an address/data stream is to follow. written to or read from the slave device).
- The peripheral that corresponds to the transmitted
- Data is sent over the serial bus in sequences of 9
and slave devices can handle.
- When all data bytes have been read or written,
during the low period before the 9th clock pulse. 10th clock pulse to assert a stop condition. and cannot be changed without starting a new operation. register selected by the APR.
Table 4. Temperature Data Format − (Local Table 5. Local and Remote Sensor Extended the technique is unsuitable for mass production. Figure 26. Measuring Temperature by Using Discreet equally well as a discrete transistor. the D− input and the base to the D+ input. capacitance should never be greater than 1000 pF. averaging is enabled and 6 ms when averaging is disabled.
Table 6. Temperature Measurement Registers Table 7. Temperature Measurement Limit Registers Figure 27. ADM1034 Signal Conditioning (A VG) of Configuration 1 Register (Address 0x01). and 4) of the Configuration Register 2 (Address 0x02). Table 8. Channel Selector
00 Local Channel = Default
01 Remote 1 Channel
10 Remote 2 Channel
11 Reserved
ensuring correct readings in the value registers.
Table 11. Temperature Limit Registers Table 12. THERM Limit Registers Configuration Register 1 (Address 0x01). located at Addresses 0x4F to 0x51. output has been pulled low by the ADM1034. status bit as long as the error condition is gone. bit is to read the status register (after the event has gone). Table 13. Interrupt Status Register 1 (Reg. 0x4F)
7 LH 1 = Local high temperature limit has been
6 LL 1 = Local low temperature limit has been
5 R1H 1 = Remote 1 high temperature limit has
4 R1L 1 = Remote 1 low temperature limit has
3 R1D 1 = Remote 1 diode error; indicates an
open or short on the D1+/D1− pins.
2 R2H 1 = Remote 2 high temperature limit has
1 R2L 1 = Remote 2 low temperature limit has
0 R2D 1 = Remote 2 diode error; indicates an
open or short on the D2+/D2− pins.
Table 14. Status Register 2 (Reg. 0x50)
7 LT 1 = Local THERM temperature limit has
6 R1T 1 = Remote 1 THERM temperature limit
5 R2T 1 = Remote 2 THERM temperature limit
4 T% 1 = THERM % on−time limit has been
3 TA 1 = One of the THERM limits has been
Table 15. Status Register 3 (Reg. 0x51) 7 F1S 1 = Fan 1 has stalled. 5 F2S 1 = Fan 2 has stalled.
0 ALERT 1 = ALERT low; indicates the ALERT
out−of−limit measurement is made (if it is not masked out). to operate in either SMBusALERT mode or in comp mode. (Bit 3) of the Configuration Register 1 (Address 0x01) to 0. as no other measurement is outside its limits). of Configuration Register 1 (Address 0x01) to1. low when a measurement goes outside its programmed limits. output is automatically pulled high again. whereas the comp mode ALERT output automatically resets. Figure 30. ALERT Comparator and SMBusALERT Figure 31. Handling SMBusALERT
- Detect an SMBus assertion.
- Enter the interrupt handler.
- Read the status register to identify the interrupt
- Mask the interrupt source by setting the
(from Reg. 0x08 to Reg. 0x0A).
- Take the appropriate action for a given interrupt
- Exit the interrupt handler.
- Periodically poll the status register. If the interrupt
status bits then behave as shown in Figure 31. Table 16. Mask Register 1 (Reg. 0x08)
7 LH 1 masks the ALERT for the local high
6 LL 1 masks the ALERT for the local low
5 R1H 1 masks the ALERT for the Remote 1
4 R1L 1 masks the ALERT for the Remote 1 low
3 R1D 1 masks the ALERT for the Remote 1
2 R2H 1 masks the ALERT for the Remote 2
1 R2L 1 masks the ALERT for the Remote 2 low
0 R2D 1 masks the ALERT for the Remote 2
Table 17. Mask Register 2 (Reg. 0x09)
4 T% 1 masks the ALERT for the THERM %
3 TA 1 masks the ALERT for the THERM limit
2 TS 1 masks the ALERT for the THERM state;
Table 18. Mask Register 3 (Reg. 0x0A) 7 F1S 1 masks the ALERT for Fan 1 stalling.
6 FA 1 masks the ALERT for fans at ALARM
5 F2S 1 masks the ALERT for Fan 2 stalling. Configuration Register 4 (Address 0x04) to 1. conversions/second), where averaging is not carried out. Table 19. Fault Queue Address 0x06
- SMBus ARA Command
- Read Status Register 1
- Power−On Reset The SMBusALERT clears, even if the condition that caused the SMBusALERT remains. The SMBusALERT is reasserted if the fault queue fills up.
The ADM1034 makes up to 64 measurements per second. the averaging that occurs at the slower conversion rates. must be finished for conversion rates changes to take effect. Table 20. Conversion Rates value of hysteresis is programmable in Register 0x1A. is enabled as an output by default on powerup. Figure 32. THERM Behavior (Bit 1) is not set in Configuration Register 2 (Address 0x02). to the THERM input, which is asserted continuously. Table 21. Conversion Rates allows Pin 7 to operate as an I/O.
speed, and then updating the drive signal applied to the fan. drive signal is determined by the fan response register. to a particular fan to prevent situations like overshoot. Table 23. Fan Response Codes Table 24. Conversion Rates
7 Reserved
3 Reserved
- Manual mode
- Look−up table Manual Mode In manual mode, the ADM1034 is under software control. The software can program the required fan speed value or the target fan speed to the ADM1034, which then outputs that fan speed. Programming Target Fan Speed In this mode, the user programs the target fan speed as a TACH count for N poles or a TACH count for one full rotation of the fan, assuming the number of poles is programmed correctly in the Configuration 3 Register (Address 0x03). Use the following steps to program the target fan speed: 1. Place the ADM1034 into manual mode. Set Bit 7 (Table/SW) of Configuration Register 1 (Address 0x01) = 0. 2. Program the target TACH count (fan speed) using the following equation: TACH Count = (f x 60)/R where: f = clock frequency = 81.92 kHz R = required RPM value Example 1: If the desired speed for Fan 1 is 5000 rpm, program the following value to the TACH count registers: TACH Count = (f x 60)/5000 TACH Count = 983d = 0x03D7 Example 2: If the desired speed for Fan 2 is 3500 rpm, program the following value to the TACH pulse period registers: TACH Count = (f x 60)/3500 TACH Count = 1404d = 0x057C
Table 25. Registers to be Programmed fans run from the same table.
Remote 1 or Remote 2 temperatures. Table 27. Drive X BHVR Bits
00 Local Temperature Controls Fan x
01 Remote 1 Temperature Controls Fan x
10 Remote 2 Temperature Controls Fan x
11 Fan x Runs at Full Speed
are set to 11 and the fan is run at full speed. Table 28. Programming the Hysteresis Configuration Register 2, the fans do not run to full speed. Table 29. THERM Hysteresis Registers Table 30. Programming THERM Hysteresis
Table 31. ADM1034 Registers
Table 32. Register 0x00, # Bytes/Block Read, POR = 0x20, Lock = Y, S/W Reset = Y Table 33. Register 0x01, Configuration Register 1, Power−On Default 0x01, Lock = Y, S/W Reset = Y bit is 0, the ADM1034 is in software/manual control mode. Default = 0. 6 Lock Bit R/W Set this bit to 1 to prevent the user from writing to the ADM1034 registers. 1 = ADM1034 registers locked. 0 = ADM1034 registers unlocked. Default = 0. 5 SDA Timeout R/W 1 = SDA timeout enabled. 0 = SDA timeout disabled. Default = 0. 4 SCL Timeout R/W 1 = SCL timeout enabled. 0 = SDL timeout disabled. Default = 0. 3 ALERT Configuration R/W 0 = SMBusALERT. Default = 0. 1 = ALERT_COMP mode. 2 Enable THERM Timer R/W 1 = timer enabled, 0 = timer disabled. This bit enables THERM as an input. Default = 0. 1 Averaging Off R/W This bit is used to disable averaging at the slower conversion rates (8 Hz and slower). Averaging is automatically disabled at the higher (16, 32, and 64 Hz ) conversion rates. 0 Monitor/STBY R/W Set bit to 1 to enable temperature monitoring. Set bit to 0 to disable it. Table 34. Register 0x02, Configuration Register 2, Power−On Default 0x84, Lock = Y, S/W Reset = Y the channel selector bits. Default = Round Robin = 1. <5:4> Channel Selector R/W This bit determines the channel on which the ADC converts. 3 4:8 Look−Up Table R/W This bit determines how many table points are used to control each fan. 0 = 4 table points for each fan. 1 = all 8 points on one table; this table is used to control both fans. with temperature between the two thresholds. Default = 1 = Linear.
1 Boost Disable R/W Set bit to 1 to prevent the fans from being boosted if either THERM temperature or
previously calculated speed. Default = 0. registers, offset registers, and look−up table registers. This bit self−clears. Default = 0. Table 35. Register 0x03, Configuration Register 3, Power−On Default 0x44, Lock = Y, S/W Reset = Y <7:4> #Poles Fan 2 R/W Write the number of poles on Fan 2 to this register. power−on default = 4 poles = 100. <3:0> #Poles Fan 1 1 R/W Write the number of poles in Fan 1 to this register. power−on default = 4 poles = 100.
Table 36. Register 0x04, Configuration Register 4, Power−On Default 0x00, Lock = Y, S/W Reset = Y is CMOS). 1 = Reference input for THERM. <6:4> THERM % Time Window R/W These bits set the time window over which THERM % is calculated. 3 XOR Test R/W Set this bit to 1 to enable the XOR connectivity test.
2 Enable Remote 2 THERM
is enabled and the Remote 2 temperature exceeeds its THERM limit.
1 Enable Remote 1 THERM
is enabled and the Remote 1 temperature exceeeds its THERM limit.
0 Enable Local THERM
is enabled and the local temperature exceeeds its THERM limit. Table 37. Register 0x05, Configuration Rate Register, Power−On Default 0x07, Lock = Y, S/W Reset = Y 7 Res R This bit is reserved for future use. Do not write to this bit. update the conversion rate until the start of the next round robin. Table 38. Register 0x06, Fault Queue, Power−On Default 0x01, Lock = Y, S/W Reset = Y before an ALERT is generated).
Table 39. Register 0x07, Fan Behavior Register, Power−On Default 0x09, Lock = Y, S/W Reset = Y 7 Fan 2 Off R/W Set this bit to 1 to switch off Fan 2. 6 Fan 1 Off R/W Set this bit to 1 to switch off Fan 1. <3:2> DRIVE2 BHVR R/W These bits determine which temperature source controls the DRIVE2 output. 00 = Local temperature controls DRIVE2. 01 = Remote 1 temperature controls DRIVE2. 10 = Remote 2 temperature controls DRIVE2. <1:0> DRIVE1 BHVR R/W These bits determine which temperature source controls the DRIVE1 output. 00 = Local temperature controls DRIVE1. 01 = Remote 1 temperature controls DRIVE1. 10 = Remote 2 temperature controls DRIVE1. Table 40. Register 0x08, Mask Register 1, Power−On Default 0x52, Lock = N, S/W Reset = Y be set. The status bit is not affected. Default = 0. be set. The status bit is not affected. Default = 1. be set. The status bit is not affected. Default = 0. be set. The status bit is not affected. Default = 1. be set. The status bit is not affected. Default = 0. be set. The status bit is not affected. Default = 0. be set. The status bit is not affected. Default = 1. be set. The status bit is not affected. Default = 0. Table 41. Register 0x09, Mask Register 2, Power−On Default 0x18, Lock = N, S/W Reset = Y
4 THERM % R/W A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 1.
3 THERM Assert R/W A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 0.
2 THERM_State R/W A 1 disables the corresponding interrupt status bit, preventing it from causing the
Table 42. Register 0x0A, Mask Register 3, Power−On Default 0x00, Lock = N, S/W Reset = Y
7 Fan 1 Stalled R/W A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 0. interrupt output. The status bit is not affected. Default = 0.
5 Fan 2 Stalled R/W A 1 disables the corresponding interrupt status bit, preventing it from causing the
interrupt output. The status bit is not affected. Default = 0. 4 Reserved R Reserved. Default = 0. 3 Reserved R Reserved. Default = 0. 2 Reserved R Reserved. Default = 0. 1 Reserved R Reserved. Default = 0. 0 Reserved R Reserved. Default = 0. Table 43. Register 0x0B, Local High Limit, Power−On Default 0x8B, Lock = N, S/W Reset = N Table 44. Register 0x0C, Local Low Limit, Power−On Default 0x54, Lock = N, S/W Reset = N Table 45. Register 0x0D, Local THERM Limit, Power−On Default 0x95, Lock = Y, S/W Reset = Y set and the THERM output is activated. Table 46. Register 0x0E, Remote 1 High Limit, Power−On Default 0x8B, Lock = N, S/W Reset = N Table 47. Register 0x0F, Remote 1 Low Limit, Power−On Default 0x54, Lock = N, S/W Reset = N interrupt status bit is set. Table 48. Register 0x10, Remote 1 THERM Limit, Power−On Default 0x95, Lock = Y, S/W Reset = N is set and the THERM output is activated. Table 49. Register 0x11, Remote 2 High Limit, Power−On Default 0x8B, Lock = N, S/W Reset = N
Table 50. Register 0x12, Remote 2 Low Limit, Power−On Default 0x54, Lock = N, S/W Reset = N interrupt status bit is set. Table 51. Register 0x13, Remote 2 THERM Limit, Power−On Default 0x95, Lock = Y, S/W Reset = N is set and the THERM output is activated. Table 52. Register 0x16, Local Offset Register, Power−On Default 0x00, Lock = Y, S/W Reset = N Table 53. Register 0x17, Remote 1 Offset Register, Power−On Default 0x00, Lock = Y, S/W Reset = N Remote 1 temperature measurement. Resolution = 0.125°C. Maximum offset from -16°C to +15.875°C. Default = 0. Table 54. Register 0x18, Remote 2 Offset Register, Power−On Default 0x00, Lock = Y, S/W Reset = N Remote 2 temperature measurement. Resolution = 0.125°C. Maximum offset from -16°C to +15.875°C. Default = 0. Table 55. Register 0x19, THERM Timer % Limit, Power−On Default 0xFF, Lock = Y, S/W Reset = N corresponding status bit is set. Table 56. Register 0x1A, THERM Hysteresis, Power−On Default 0x05, Lock = Y, S/W Reset = N temperature drops below THERM.
Table 57. Look−Up Table Registers, Lock = Y, S/W Reset = Y Table 58. Register 0x3A, Look−Up Table Hysteresis, Power−On Default 0x05, Lock = Y, S/W Reset = Y look−up table. LSB size = 1°C.
Table 59. Register 0x3C, Fan Response Register, Power−On Default 0x11, Lock = Y, S/W Reset = Y <6:4> Fan 2 Response R/W These bits set the fan’s response in the fan speed control mode. <2:0> Fan 1 Response R/W These bits set the fan’s response in the fan speed control mode. Table 60. Register 0x3D, Device ID, Power−On Default 0x34, Lock = N, S/W Reset = N <7:0> Device ID R This read−only value contains the device ID, which is 0x34. Table 61. Register 0x3E, Company ID, Power−On Default 0x41, Lock = N, S/W Reset = N <7:0> Company ID R This read−only value contains the company ID, which is 0x41. Table 62. Register 0x3F, Revision Register, Power−On Default 0x02, Lock = N, S/W Reset = N <7:0> Revision ID R This read−only value contains the revision ID. Table 63. Register 0x40/41, Local Temp Registers, Power−On Default 0x00, Lock = N, S/W Reset = Y <4:0> Local Temperature LSB R This register contains the LSBs of the last measured local temperature value. <12:5> Local Temperature MSB R This register contains the MSBs of the last measured local temperature value.
Table 64. Register 0x42/43, Remote 1 Temp Registers, Power−On Default 0x00, Lock = N, S/W Reset = Y value. Resolution = 0.03125°C. Table 65. Register 0x44/45, Remote 2 Temp Registers, Power−On Default 0x00, Lock = N, S/W Reset = Y value. Resolution = 0.03125°C. Table 66. Register 0x4A/4B, TACH1 Period, Power−On Default 0xFF, Lock = N, S/W Reset = Y <7:0> Fan 1 Period Count, LSB R This register contains the LSBs of the last measured Fan 1 revolution count. <15:8> Fan 1 Period Count, MSB R This register contains the MSBs of the last measured Fan 1 revolution count. Table 67. Register 0x4C/4D, TACH2 Period, Power−On Default 0xFF, Lock = N, S/W Reset = Y <7:0> Fan 2 Period Count, LSB R This register contains the LSBs of the last measured Fan 2 revolution count. <15:8> Fan 2 Period Count, MSB R This register contains the MSBs of the last measured Fan 2 revolution count. Table 68. Register 0x4E, THERM % On−Time, Power−On Default 0x00, Lock = N, S/W Reset = Y Table 69. Register 0x4F, Status 1, Power−On Default 0x00, Lock = N, S/W Reset = Y 7 Local Temp High R A 1 indicates that the local high limit has been tripped. 6 Local Temp Low R A 1 indicates that the local low limit has been tripped. 5 Remote 1 Temp High R A 1 indicates that the Remote 1 high limit has been tripped. 4 Remote 1 Temp Low R A 1 indicates that the Remote 1 low limit has been tripped.
3 Remote 1 Diode Error R A 1 indicates that a short or an open has been detected on the Remote 1
temperature channel. This test is completed once on each conversion. 2 Remote 2 Temp High R A 1 indicates that the Remote 2 high limit has been tripped. 1 Remote 2 Temp Low R A 1 indicates that the Remote 2 low limit has been tripped.
0 Remote 2 Diode Error R A 1 indicates that a short or an open has been detected on the Remote 2
temperature channel. This test is completed once on each conversion.
http://onsemi.com Table 70. Register 0x50, Status 2, Power−On Default 0x00, Lock = N, S/W Reset = Y 7 Local THERM R A 1 indicates that the local THERM limit has been tripped. 6 Remote 1 THERM R A 1 indicates that the Remote 1 THERM limit has been tripped. 5 Remote 2 THERM R A 1 indicates that the Remote 2 THERM limit has been tripped. 3 THERM Asserted R A 1 indicates that the THERM signal has been asserted low as an input only. 2 THERM_State R A 1 indicates that the THERM pin has been asserted low as an output. Table 71. Register 0x51, Status Register 3, Power−On Default 0x00, Lock = N, S/W Reset = Y 7 Fan 1 Stalled R A 1 indicates that Fan 1 has stalled. instance, when a THERM temperature limit is exceeded. 5 Fan 2 Stalled R A 1 indicates that Fan 2 has stalled. Device Number Temperature Range Package Type Package Option Shipping† ADM1034ARQZ −40°C to +125°C 16−Lead QSOP RQ−16 98 Tube ADM1034ARQZ−REEL −40°C to +125°C 16−Lead QSOP RQ−16 2500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *The “Z’’ suffix indicates Pb−Free part.
http://onsemi.com PACKAGE DIMENSIONS QSOP16 CASE 492−01 ISSUE O MAX MILLIMETERS G R −B− −A− L M0.25 (0.010) T U −T− SEATING PLANE K D16 PL C M0.25 (0.010) T BAS S V N J M F 8 PL DETAIL E DETAIL E H x 45/C0095 RAD. MOLD PIN DIM MIN MAXMIN INCHES A 4.80 4.980.189 0.196 B 3.81 3.990.150 0.157 C 1.55 1.730.061 0.068 D 0.20 0.310.008 0.012 F 0.41 0.890.016 0.035 G 0.64 BSC0.025 BSC H 0.20 0.460.008 0.018 J 0.249 0.1910.0098 0.0075 K 0.10 0.250.004 0.010 L 5.84 6.200.230 0.244 M 0 8 0 N 0 7 0 7 P 0.18 0.280.007 0.011 Q 0.51 DIA0.020 DIA R 0.64 0.890.025 0.035 U 0.64 0.890.025 0.035 V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. THE BOTTOM PACKAGE SHALL BE BIGGER THAN THE TOP PACKAGE BY 4 MILS (NOTE: LEAD SIDE ONLY). BOTTOM PACKAGE DIMENSION SHALL FOLLOW THE DIMENSION STATED IN THIS DRAWING. 4. PLASTIC DIMENSIONS DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 6 MILS PER SIDE. 5. BOTTOM EJECTOR PIN WILL INCLUDE THE COUNTRY OF ORIGIN (COO) AND MOLD CAVITY I.D./C0095/C0095/C0095 /C00950 8 0 /C0095/C0095/C0095 8 /C0095 /C0095/C0095/C0095/C0095 MARK Q P 0.013 X 0.005 DP. MAX RAD. 0.005−0.010 TYP ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ADM1034/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative