ADM1033ARQ

ADM1033 AD | Alldatasheet

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Fan Speed (RPM) Controller ADM1033 Rev. 0 Information furn ished by An alog D evices is believed to be accurate and reliable. However, n o resp onsibility is assume d b y A nalog De vices fo r its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or p atent rights of Analog De vices. Trademarks an d registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.

FEATURES

1 local and 1 remote temperature channel ±1.5°C accuracy on local and remote channels Automatic series resistance cancellation on remote Temperature channels > 1 kΩ Fast (up to 64 measurements per second) SMBus 2.0, 1.1, and 1.0 compliant SMBus address input/LOCATION input to UDID Programmable over-/undertemperature limits Programmable fault queue SMBusALERT output Fail-safe overtemperature comparator output Fan speed (RPM) controller Look-up table for temperature-to-fan-speed control Linear and discrete options for look-up table FAN_FAULT output THERM input, used to time PROCHOT assertions REF input, used as reference for THERM (PROCHOT) 3 V to 5.5 V supply Small 16-lead QSOP package

APPLICATIONS

Telecommunications equipment LCD projectors FUNCTIONAL BLOCK DIAGRAM ALERT Comp ANALOG MULTIPLEXER TACH SMBusALERT THERM SDA SCL GND VCC DRIVE ADM1033 NC LOCATION SMBUS ADDRESS MASK REGISTERS FAULT QUEUE THERM PERCENT TIMER FAULT QUEUE HYSTERESIS REGISTERS OFFSET REGISTERS CONVERSION RATE REGISTER CONFIGURATION REGISTERS BAND GAP REFERENCE BAND GAP TEMPERATURE SENSOR SRC BLOCK FAN SPEED COUNTER TEMPERATURE-TO- FAN-SPEED LOOK-UP TABLE MANUAL FAN SPEED CONTROL REGISTERS FAN RESPONSE TACH SIGNAL CONDITIONING FAN SPEED CONTROLLER ADC LIMIT COMPARATOR VALUE AND LIMIT REGISTERS STATUS REGISTER SERIAL BUS INTERFACE ADDRESS POINTER REGISTER NC NC FAN_FAULT REF ALERT THERM 04937-0-001 NC = NO CONNECT Figure 1.

Rev. 0 | Page 2 of 40 TABLE OF CONTENTS Programming the THERM Limit for Temperature Channels

REVISION HISTORY

8/04—Revision 0: Initial Version

Rev. 0 | Page 3 of 40 GENERAL DESCRIPTION The ADM1033 is a remote and local temperature sensor and fan controller. Its remote channel accurately monitors the temperature of a remote thermal diode, which can be a discrete 2N3904/6 or located on a microprocessor die. The device can monitor its own ambient temperature as well. The ADM1033 is also used to monitor and control the speed of a cooling fan. The user can program a target fan speed, or use the look-up table to input a temperature-to-fan speed profile. The look-up table can be configured to run the fan at discrete speeds (discrete mode) or to ramp the fan speed with tempera- ture (linear mode). The ADM1033 communicates over a 2-wire SMBus 2.0 inter- face. An 8-level LOCATION input allows the user to choose between SMBus 1.1 and SMBus 2.0. The ALERT output indicates error conditions. In addition, the THERM I/O signals overtemperature as an output and times THERM assertions as an input. Pin 8 can be configured as a reference input for the THERM (PROCHOT) input.

Rev. 0 | Page 4 of 40 SPECIFICATIONS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.1 Table 1. Parameter Min Typ Max Units Test Conditions/Comments POWER SUPPLY Supply Voltage, VCC2 3.0 3.3 3.6 V Supply Current, ICC 3 mA Interface inactive, ADC active 900 µA Standby mode Undervoltage Lockout Threshold 2.5 V Power-On Reset Threshold 1 2.4 V TEMPERATURE-TO-DIGITAL CONVERTER Internal Sensor Accuracy ±1 ±2 °C 20°C ≤ TA ≤ 60°C Resolution 0.03125 °C External Diode Sensor Accuracy ±0.5 ±1 °C −40°C ≤ TD ≤ +100°C; TA = +40°C Resolution 0.03125 °C Remote Sensor Source Current 85 µA High level 34 µΑ Mid level 5 µΑ Low level Series Resistance Cancellation 1000 Ω Power Supply Sensitivity ±1 %/V Conversion Time (Local Temperature) 11 ms Averaging enabled Conversion Time (Remote Temperature) 32 ms Averaging enabled Total Conversion Time 43 ms Averaging enabled OPEN-DRAIN DIGITAL OUTPUTS (ALERT, THERM, FAN_FAULT DRIVE) Output Low Voltage, VOL 0.4 V IOUT = −6.0 mA; VCC = +3 V High Level Output Leakage Current, IOH 0.1 1 µA VOUT = VCC; VCC = 3 V DIGITAL INPUT LEAKAGE CURRENT (TACH) Input High Current, IIH −1 µA VIN = VCC Input Low Current, IIL 1 µA VIN = 0 Input Capacitance, CIN 7 pF DIGITAL INPUT LOGIC LEVELS (TACH) Input High Voltage, VIH 2.0 5.5 V Input Low Voltage, VIL −0.3 +0.8 V Hysteresis 500 mV p-p OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA) Output Low Voltage, VOL 0.4 V IOUT = −6.0 mA; VCC = +3 V High Level Output Leakage Current, IOH 0.1 1 µA VOUT = VCC SERIAL BUS DIGITAL INPUTS (SCL, SDA) Input High Voltage, VIH 2.1 V Input Low Voltage, VIL 0.8 V Hysteresis 500 mV ANALOG INPUTS (LOCATION, REF) Input Resistance 80 125 160 kΩ

VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge. 2 Operation at 5.5 V is guaranteed by design, not production tested. 3 Guaranteed by design, not production tested. 4 SMBus timeout disabled by default. See the SMBus Timeout section for more information. Figure 2. Serial Bus Timing Diagram

Rev. 0 | Page 6 of 40 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Value Positive Supply Voltage (VCC) −0.3 V to +6.5 V Voltage on Any Input or Output Pin except FAN_FAULT and LOCATION −0.3 V to +6.5 V Voltage on FAN_FAULT1 VCC Voltage on LOCATION VCC + 0.3V Input Current at Any Pin ±20 mA Maximum Junction Temperature (TJmax) 150°C Storage Temperature Range −65°C to +150°C Lead Temperature, Soldering (10 sec) 300°C IR Reflow Peak Temperature 220°C ESD Rating—All Pins 1500 V 1 During power-up, the voltage on FAN_FAULT should not be higher than VCC. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS 16-Lead QSOP Package: θJA = 150°C/W, θJC = 39°C/W ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulates on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Figure 3. Pin Configuration Table 3. Pin Function Descriptions 1 DRIVE DRIVE Pin Drives the Fan. Open-drain output. Requires a pull-up resistor. 2 TACH Fan Speed Measurement Input. Connects to the fan’s TACH output to measure the fan speed. if not masked. Automatically goes high again when the measured parameter falls back within its limits. 5 GND Ground for Analog and Digital Circuitry. 6 VCC Power. Can be powered by 3.3 V standby power, if monitoring in low power states is required. an INTEL CPU. A timer measures assertion times on the THERM pin (either input or output). 8 FAN_FAULT/REF FAN_FAULT: Open-Drain Output. Asserts low whenever the fan stalls. REF: Analog Input Reference for THERM input. 9 D− Cathode Connection for the Thermal Diode or Diode-Connected Transistor. 10 D+ Anode Connection for the Thermal Diode or Diode-Connected Transistor. discoverable mode), and to set the LLL bits in the UDID (in ARP-capable mode). not provided elsewhere in the system. not provided elsewhere in the system.

Figure 4. Temperature Error vs. PCB Track Resistance, DXP to GND and VCC Figure 5. Remote Temperature Error vs. D+, D− Capacitance Figure 6. Remote Temperature Error vs. Series Resistance on D+ and D−

01 M 2M 3M 4M 65M

Figure 7. Remote Temperature Error vs. Power Supply Noise Frequency

01 M 2M 4M3M 5M 6M

Figure 8. Remote Temperature Error vs. Common-Mode Noise Frequency

01 M 3M2M 5M4M 6M

Figure 9. Remote Temperature Error vs. Differential-Mode Noise Frequency

Table 4. Internal Register Descriptions Configuration Provides control and configuration of various functions on the device. Conversion Rate Determines the number of measurements per second completed by the ADM1033. of data is always a register address, which is written to the address pointer register. Status Provides the status of each limit comparison. Interrupt Mask Allows the option to mask ALERTs due to particular out-of-limit conditions. Value and Limit Stores the results of temperature and fan speed measurements, along with their limit values. Contains the temperature value at which THERM is asserted and determines the level of hysteresis. Look-Up Table Used to program the look-up table for the fan-speed-to-temperature profile. percentage of a time window. The user can program the length of the time window. Table 5. Resistor Ratios for Setting LOCATION Bits 1 FD denotes fixed-and-discoverable mode, ARP denotes ARP-capable mode. Table 6. UDID Values represents SMBus 2.0 as the Interface version.

Rev. 0 | Page 12 of 40 SMBus 2.0 FIXED-AND-DISCOVERABLE MODE The ADM1033 supports fixed-and-discoverable mode, which is backward-compatible with SMBus 1.0 and 1.1. Fixed-and- discoverable mode supports all the same functionality as ARP- capable mode, except for assign address—in which case it powers up with a fixed address and is not changed by the assign address call. The fixed address is determined by the state of the LOCATION pin on power-up. SMBus 2.0 READ AND WRITE OPERATIONS The master initiates a data transfer by establishing a start condition, defined as a high-to-low transition on the serial data line (SDA) while the serial clock line (SCL) remains high. This indicates that an address/data stream is to follow. All slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, which consist of a 7- bit address (MSB first) plus an R/W bit. The last bit determines the direction of the data transfer (whether data is written to or read from the slave device). 1. The peripheral that corresponds to the transmitted address responds by pulling the data line low during the low period before the 9th clock pulse. This pulse is known as the acknowledge bit. All other devices on the bus remain idle while the selected device waits for data to be read from or written to it. If the R/W bit is a 0, the master writes to the slave device. If the R/W bit is a 1, the master reads from it. 2. Data is sent over the serial bus in sequences of nine clock pulses—eight bits of data followed by an acknowledge bit from the slave device. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, as a low-to-high transition when the clock is high might be interpreted as a stop signal. The number of data bytes that can be transmitted over the serial bus in a single read or write operation is limited only by what the master and slave devices can handle. 3. When all data bytes have been read or written, stop conditions are established. In write mode, the master pulls the data line high during the tenth clock pulse to assert a stop condition. In read mode, the master device overrides the acknowledge bit by pulling the data line high during the low period before the ninth clock pulse. This is known as no acknowledge. The master takes the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. It is not possible to mix read and write in one operation, because the type of operation is determined at the beginning and cannot be changed without starting a new operation. To write data to one of the device data registers or read data from it, the address pointer register (APR) must be set so that the correct data register is addressed. The first byte of a write operation always contains an address that is stored in the APR. If data is to be written to the device, the write operation contains a second data byte. The second data byte is written to the register selected by the APR. As shown in Figure 18, the device address is sent over the bus, followed by R/ W set to 0. This is followed by two data bytes. The first data byte is the address of the designated internal data register, which is stored in the APR. The second data byte is the data to be written to the internal data register. When reading data from a register there are two possibilities:

• If the ADM1033’s APR value is unknown or incorrect, it must be set to the correct value before data can be read from the desired data register. To do this, perform a write to the ADM1033 as before; but this time send only the data byte containing the register. (See Figure 19.) A read operation is then performed. With the serial bus address and the R/ W bit set to 1, the data byte is read from the data register. (See Figure 20.)
• If the APR is known to be already at the desired address, data can be read from the corresponding data register without first writing to the APR. In this case, Figure 19 can be omitted. In Figure 18 to Figure 20, the serial bus address is determined by the state of the LOCATION pin on power-up.

resolution of the local temperature sensor is 0.03125°C. Table 7. Temperature Data Format for Table 8. Local and Remote Sensor Extended Resolution series with the remote thermal diode. is unsuitable for mass production. Figure 27. Measuring Temperature Using Discrete Transistors

the ADM1033 offer the systems designer added flexibility. (Bit 4) of Configuration Register 2 (Address 0x02). Table 11. Channel Selector

0 Local Channel (default)

1 Remote Channel

urements, ensuring correct readings in the value registers. Table 12. Offset Registers Table 13. Offset Register Values

microcontroller of an out-of-limit condition. Table 14. Temperature Limit Registers Table 15. THERM Limit Register whether the measured value is compared to a high or low limit. remote temperature measurement with averaging enabled. Once the conversion time elapses, the round robin starts again. synchronized with the temperature measurements. located at Addresses 0x4F to 0x51. register is read or an ARA is completed. pulled the ALERT output low. notifies the system supervisor of an out-of-limit condition. error condition has been cleared. falls back within the programmed limits. read the status register (after the triggering event has cleared). limit, its associated status bit is set in the status register.

Table 16. Status Register 1 (Reg. 0x4F)

7 LH 1 = Local high temperature limit has been

6 LL 1 = Local low temperature limit has been

5 RH 1= Remote high temperature limit has

4 RL 1 = Remote low temperature limit has

3 RD 1 = Remote diode error; indicates an

open or short on the D1+/D1− pins. Table 17. Status Register 2 (Reg. 0x50)

7 LT 1 = Local THERM temperature limit has

6 RT 1 = Remote THERM temperature limit has

4 T% 1 = THERM timer limit has been

3 TA 1 = One of the THERM limits has been

Table 18. Status Register 3 (Reg. 0x51)

6 FA 1= Fan ALARM speed, indicates fan is

0 ALERT 1= SMBusALERT low, indicates the

outputs, called ALERT Comp and SMBusALERT. register is read or an ARA is completed. no other measurement is outside its limits. assuming no other measurement channel is outside its limits. and SMBusALERT, unless otherwise stated. Figure 31. How ALERT Comparator and SMBusALERT Outputs Work

1. Detect an SMBus assertion.
2. Enter the interrupt handler.
3. Read the status register to identify the interrupt source.
4. Mask the interrupt source by setting the appropriate mask

bit in the interrupt mask registers (Reg. 0x08 to Reg. 0x0A).

1. Take the appropriate action for a given interrupt source.
2. Exit the interrupt handler.
3. Periodically poll the status register. If the interrupt status bit

has cleared, reset the corresponding interrupt mask bit to 0. behave as shown in Figure 32. Figure 32. Handling SMBusALERTs being asserted; the appropriate status bit is set as normal. Table 19. Mask Register 1 (Reg. 0x08)

7 LH 1 masks the ALERT for the local high

6 LL 1 masks the ALERT for the local low

5 RH 1 masks the ALERT for the remote high

4 RL 1 masks the ALERT for the remote low

3 RD 1 masks the ALERT for the remote diode

Table 20. Mask Register 2 (Reg. 0x09)

4 T% 1 masks the ALERT for the THERM timer

3 TA 1 masks the ALERT for the THERM limit

2 TS 1 masks the ALERT for a transition on

Table 21. Mask Register 3 (Reg. 0x0A) 7 FS 1 masks the ALERT for fan stalling.

6 FA 1 masks the ALERT for fan running at

in Configuration Register 4 (Address 0x04) to 1. Table 22. Fault Queue (Address 0x06)

• SMBus ARA command
• Read Status Register 1
• Power-on reset The SMBusALERT clears, even if the condition that caused the SMBusALERT remains. The SMBusALERT is reasserted, if the fault queue fills up. CONVERSION RATE REGISTER The ADM1033 makes up to 64 measurements per second. However, for the sake of reduced power consumption and better noise immunity, users can run the ADM1033 at a slower conversion rate. Averaging does not occur at rates of 16, 32, and 64 conversions per second. Table 23 lists the available rates. The conversion rate register is located at Address 0x05. Note that the current round-robin loop must be completed before the newly programmed conversion rate can take effect.

Table 23. Conversion Rates an output by default on power-up. Figure 33. THERM Behavior

set in Configuration Register 2 (Address 0x02). correct threshold for an AGTL+ signal. (Address 0x04) using Bits <6:4> (THERM % on-time window). THERM % on-time register (Address 0x4E). A THERM % (0x19) limit is also associated with this register. the THERM input, which is asserted all the time. Table 24. THERM % On-Time Window to allow Pin 7 to operate as an I/O. Configuration Register 4 (Address 0x04). percentage of the chosen time window. the time window has elapsed, assuming it is not masked.

Pin 2 is the TACH input intended for fan speed measurement.

0 V to 5 V, either resistive attenuation of the fan signal or diode

Figure 36. Fan with TACH Pull-Up to Voltage > 5 V, Clamped with Zener Diode Figure 37. Fan with Strong TACH Pull-Up to Voltage > VCC or Totem Pole the Zener current, as shown in Figure 37. Or, resistive attenuation can be used, as shown in Figure 38.

2 V < VPULL-UP × R2/(RPULL-UP + R1 + R2) < 5 V

ground. Consider this when calculating resistor values. 1 kΩ, suitable values for R1 and R2 would be 100 kΩ and 47 kΩ. This gives a high input voltage of 3.83 V. Figure 38. Fan with Strong TACH Pull-Up to Voltage > VCC to Totem Pole proportional to the fan speed. that the ADM1033 can measure for a full revolution. measure the fan speed accurately. Figure 39. Fan Speed Measurement for a 4-Pole Fan

Table 25. TACH Value Registers preventing erroneous fan speed measurement readings. stalled or is running very slowly (<75 rpm). Register 3 (Address 0x03) is correct for the fan used. Configuration 2 Register (Address 0x02) is not set to 1. prevent situations like overshoot. second. Table 26 lists the available options. Table 26. Fan Response Codes Table 27. Fan Response Register (Address 0x3C)

Figure 42. Programming Two Points on the Look-Up Table until the temperature drops below the T7 temperature value. decreasing temperature can be different. only if the same curve is to be used for both fans). runs to full speed. This overrides the table. Table 29. Look-Up Table Register Addresses increases with temperature to FSX+1 at temperature TX+1. speed once the temperature threshold is exceeded. temperature or the remote temperature controls the fan. In default, the remote temperature controls the fan. Table 30. Drive BHVR Bits

00 Local Temperature Controls the Fan

01 Remote Temperature Controls the Fan

10 Remote Temperature Controls the Fan

11 Fan Runs at Full Speed

as important in linear mode. Table 31. Programming the Hysteresis The hysteresis register of the look-up table is at Address 0x3A.

Table 34. ADM1033 Registers

Table 35. Register 0x00, # Bytes/Block Read, Power-On Reset = 0x20, Lock = Y, S/W Reset = Y <7:0> # Bytes Block Read R/W Block reads are # bytes/block read long. The maximum is 32 bytes, the SMBus transaction limit. Table 36. Register 0x01, Configuration Register 1, Power-On Default = 0x01, Lock = Y, SW Reset = Y 6 Lock Bit R/W Set to 1 to prevent the user from writing to the ADM1033 registers. 1 = ADM1033 registers locked. 0 = ADM1033 registers unlocked. Default = 0. 5 SDA Timeout R/W 1 = SDA timeout enabled. 0 = SDA timeout disabled. Default = 0. 4 SCL Timeout R/W 1 = SCL timeout enabled. 0 = SDL timeout disabled. Default = 0. 2 Enable THERM Timer R/W 1 = timer enabled, 0 = timer disabled. Enables THERM as an input. Default = 0. disabled at the higher (16, 32, and 64) conversion rates. Default = Averaging On = 0. Table 37. Register 0x02, Configuration Register 2, Power-On Default = 0x84, Lock = Y, SW Reset = Y channel, which is determined by the channel selector bits.) Default = Round Robin = 1. <6:5> Reserved R/W Reserved. 4 Channel Selector R/W 0 = local temperature measurements, 1 = remote temperature measurements. temperature between the two thresholds. Default = 1 = linear. exceeded. Under these conditions, the fans run at the previously calculated speed. Default = 0. offset registers, and look-up table registers. This bit self-clears. Default = 0. Table 38. Register 0x03, Configuration Register 3, Power-On Default = 0x44, Lock = Y, SW Reset = Y should be an even number only.

Table 39. Register 0x04, Configuration Register 4, Power-On Default = 0x00, Lock = Y, SW Reset = Y 7 FAN_FAULT REF R/W Sets the function for Pin 8. 0 = Default = FAN_FAULT Output (THERM Input is CMOS). 1 = Reference Input for THERM . <6:4> THERM % Time Window R/W These bits set the time window over which THERM % is calculated. 3 XOR Test R/W Set this bit to 1 to enable the XOR connectivity test. enabled and the remote temperature exceeds its THERM limit. enabled and the local temperature exceeds its THERM limit. Table 40. Register 0x05, Conversion Rate Register, Power-On Default = 0x0A, Lock = Y, SW Reset = Y 7 Reserved R/W Reserved. Do not write a 1 to this bit. update the conversion rate until the start of the next round robin. Table 41. Register 0x06, Fault Queue, Power-On Default = 0x01, Lock = Y, SW Reset = Y before an ALERT is generated).

Table 42. Register 0x07, Fan BHVR Register, Power-On Default = 0x09, Lock = Y, SW Reset = Y

6 Fan Off R/W When this bit is set to 1, the fan switches off, regardless of programmed target

<1:0> DRIVE BHVR R/W Determine which temperature source controls the DRIVE Output. DRIVE. 10 = remote temperature controls the DRIVE. 11 = DRIVE at full speed. Table 43. Register 0x08, Mask Register 1, Power-On Default = 0x52, Lock = N, SW Reset = Y

7 Local Temp High R/W A 1 disables the corresponding interrupt status bit from causing the interrupt

output to be set. The status bit is not affected. Default = 0.

6 Local Temp Low R/W A 1 disables the corresponding interrupt status bit from causing the interrupt

output to be set. The status bit is not affected. Default = 1.

5 Remote High R/W A 1 disables the corresponding interrupt status bit from causing the interrupt

output to be set. The status bit is not affected. Default = 0.

4 Remote Low R A 1 disables the corresponding interrupt status bit from causing the interrupt

output to be set. The status bit is not affected. Default = 1.

3 Remote Diode Error R A 1 disables the corresponding interrupt status bit from causing the interrupt

output to be set. The status bit is not affected. Default = 0. Table 44. Register 0x09, Mask Register 2, Power-On Default = 0x10, Lock = N, SW Reset = Y

4 THERM % R/W A 1 disables the corresponding interrupt status bit from setting the interrupt

output. The status bit is not affected. Default = 0.

3 THERM Assert R/W A 1 disables the corresponding interrupt status bit from setting the interrupt

output. The status bit is not affected. Default = 0.

2 THERM_State R/W A 1 disables the corresponding interrupt status bit from setting the interrupt

Table 45. Register 0x0A, Mask Register 3, Power-On Default = 0x00, Lock = N, SW Reset = Y

7 Fan Stalled R/W A 1 disables the corresponding interrupt status bit from setting the interrupt

output. The status bit is not affected. Default = 0.

6 Fan Alarm Speed R/W A 1 disables the corresponding interrupt status bit from setting the interrupt

output. The status bit is not affected. Default = 0. 5 Reserved R Reserved. Default = 0. 4 Reserved R Reserved. Default = 0. 3 Reserved R Reserved. Default = 0. 2 Reserved R Reserved. Default = 0. 1 Reserved R Reserved. Default = 0. 0 Reserved R Reserved. Default = 0.

Table 46. Register 0x0B, Local High Limit, Power-On Default = 0x8B, Lock = N, SW Reset = N Table 47. Register 0x0C, Local Low Limit, Power-On Default = 0x54, Clock = N, SW Reset = N Table 48. Register 0x0D, Local THERM Limit, Power-On Default = 0x95, Lock = Y, SW Reset = N and the THERM output is activated. Table 49. Register 0x0E, Remote High Limit, Power-On Default = 0x8B, Lock = N, SW Reset = N Table 50. Register 0x0F, Remote Low Limit, Power-On Default = 0x54, Lock = N, SW Reset = N Table 51. Register 0x10, Remote THERM Limit, Power-On Default = 0x95, Lock = Y, SW Reset = N Table 52. Register 0x16, Local Offset Register, Power-On Default = 0x00, Lock = Y, SW Reset = N Table 53. Register 0x17, Remote Offset Register, Power-On Default = 0x00, Lock = Y, SW Reset = N Table 54. Register 0x19, THERM Timer % Limit, Power-On Default = 0xFF, Lock = Y, SW Reset = N the time window, then the corresponding status bit is set.

Table 55. Register 0x1A, THERM Hysteresis, Power-On Default = 0x05, Lock = Y, SW Reset = N limit − hysteresis, the THERM is deactivated. Table 56. Look-Up Table Registers, Lock = Y, SW Reset = Y Table 57. Register 0x3A, Look-Up Table Hysteresis, Power-On Default = 0x02, Lock = Y, SW Reset = Y the look-up table. LSB size = 1°C. Table 58. Register 0x3, Fan Response Register, Power-On Default = 0x11, Lock = Y, SW Reset = Y <2:0> Fan Response R/W These bits set the fan’s response in the rpm control mode.

Table 59. Register 0x3D, Device ID, Power-On Default = 0x33, Lock = N, SW Reset = N <7:0> Device ID R This read-only value contains the device ID, which is 0x33. Table 60. Register 0x3E, Company ID, Power-On Default = 0x41, Lock = N, SW Reset = N <7:0> Company ID R This read-only value contains the company ID, which is 0x41. Table 61. Register 0x3D, Revision Register, Power-On Default = 0x02, Lock = N, SW Reset = N <7:0> Revision ID R This read-only value contains the revision ID. Table 62. Register 0x40/41, Local Temperature Registers, Power-On Default = 0x02, Lock = N, SW Reset = Y <12:5> Local Temperature MSB R Contains the MSBs of the last measured local temperature value. Resolution = 1°C. Table 63. Register 0x42/43, Remote Temperature Registers, Power-On Default = 0x00, Lock = N, SW Reset = Y <12:5> Remote Temperature MSB R Contains the MSBs of the last measured remote temperature value. Resolution = 1°C. Table 64. Register 0x4A/4B, TACH Period, Power-On Default = 0xFF, Lock = N, SW Reset = Y <7:0> Fan Period Count, LSB R This register contains the LSBs of the last measured fan revolution count. <15:8> Fan Period Count, MSB R This register contains the MSBs of the last measured fan revolution count. Table 65. Register 0x4E, THERM % On-Time; Power-On Default = 0x00, Lock = N, SW Reset = Y Table 66. Register 0x4F, Status 1, Power-On Default = 0x00, Lock = N, SW Reset = Y 7 Local Temp High R A 1 indicates the local high limit has been tripped. 6 Local Temp Low R A 1 indicates the local low limit has been tripped. 5 Remote Temp High R A 1 indicates the remote high limit has been tripped. 4 Remote Temp Low R A 1 indicates the remote low limit has been tripped.

3 Remote Diode Error R A 1 indicates a short or an open has been detected on the remote temperature

channel. This test is completed once on each conversion.

Table 67. Register 0x50, Status 2, Power-On Default = 0x00, Lock = N, SW Reset = Y 7 Local THERM R A 1 indicates the local THERM limit has been tripped. 6 Remote THERM R A 1 indicates the remote THERM limit has been tripped. 5 Reserved R Reserved for future use. 4 THERM % Exceeded R A 1 indicates the THERM signal has been asserted for longer than the programmed limit. Clear on read. If THERM % Limit = 0x00 and THERM is asserted, it reasserts immediately. 3 THERM Asserted R A 1 indicates the THERM signal has been asserted low, as an input only. 2 THERM_State R A 1 indicates the THERM pin has been asserted low as an output. Table 68. Register 0x51, Status Register 3, Power-On Default = 0x00, Lock = N, SW Reset = Y 7 Fan Stalled R A 1 indicates the fan has stalled. THERM temperature limit is exceeded). status register to determine if an ALERT condition has occurred in any of the status registers.

Figure 44. 16-Lead Shrink Small Outline Package [QSOP]

Rev. 0 | Page 40 of 40 NOTES © 2004 A nalog D evices, Inc. All rig hts reserv ed. Tra demarks an d registered tra demarks are the prop erty of their respective owners . D04937–0– 8/04(0)