ADM1031 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 30
Technical content
Features
- Optimized for Pentium III ♦ Reduced Guard−banding Software ♦ Automatic Fan Speed Control, Independent of CPU Intervention After Initial Setup
- 0.125°C Resolution on External Temperature Channels
- Control Loop to Minimal Acoustic Noise and Battery Consumption
- Remote Temperature Measurement Accurate to 1°C Using Remote Diode (Two Channels)
- Local Sensor with 0.25°C Resolution
- Pulse Width Modulation (PWM) Fan Control for 2 Fans
- Programmable PWM Frequency and PWM Duty Cycle
- Tach Fan Speed Measurement (Two Channels)
- Analog Input to Measure Fan Speed of 2−Wire Fans (Using Sense Resistor)
- 2−Wire System Management Bus (SMBus) with ARA Support
- Overtemperature THERM Output Pin for CPU Throttling
- Programmable INT Output Pin
- Configurable Offsets for Temperature Channels 3.0 V to 5.5 V Supply Range
- Shutdown Mode to Minimize Power Consumption
- Limit Comparison of All Monitored Values
- This is a Pb−Free Device
Applications
- Notebook PCs, Network Servers, and Personal Computers
- Telecommunications Equipment http://onsemi.com xxx = Specific Device Code # = Pb −Free Package YY = Date Code WW = Work Week See detailed ordering and shipping information in the package dimensions section on page 29 of this data sheet.
ORDERING INFORMATION
#YYWW QSOP−16 CASE 492 TACH1/AIN1 PWM_OUT2 TACH2/AIN2 THERM VCC GND PWM_OUT1 INT(SMBALERT) D1+ FAN_FAULT D1– D2– D2+ SCL ADM1031
15 SDA
Figure 1. Functional Block Diagram NOTE: This device is ESD sensitive. Use standard ESD precautions when handling. NOTE: /C0113JA is specified for the worst−case conditions, that is, a device soldered in a circuit board for surface−mount packages.
http://onsemi.com PIN ASSIGNMENT Pin No. Mnemonic Description 1 PWM_OUT1 Digital Output, Open−Drain. Pulse width modulated output to control fan speed. Requires pullup resistor (10 k/C0087 typical). 2 TACH1/AIN1 Digital/Analog Input. Fan tachometer input to measure FAN1 fan speed. Can be reprogrammed as an analog input to measure speed of a 2−wire fan via a sense resistor (2 /C0087 typical). 3 PWM_OUT2 Digital Output, Open−Drain. Pulse width modulated output to control FAN2 fan speed. Requires pullup resistor (10 k/C0087 typical). 4 TACH2/AIN2 Digital/Analog Input. Fan tachometer input to measure FAN2 fan speed. Can be reprogrammed as an analog input to measure speed of a 2−wire fan via a sense resistor (2 /C0087 typical). 5 GND System Ground. 6 VCC Power. Can be powered by 3.3 V standby power if monitoring in low power states is required. 7 THERM Digital I/O, Open−Drain. An active low thermal overload output that indicates a violation of a temperature set point (overtemperature). Also acts as an input to provide external fan control. When this pin is pulled low by an external signal, a status bit is set, and the fan speed is set to full−on. Requires pullup resistor (10 k/C0087). 8 FAN_FAULT Digital Output, Open−Drain. Can be used to signal a fan fault. Drives second fan to full speed if one fan fails. Requires pullup resistor (typically 10 k/C0087). 9 D1– Analog Input. Connected to cathode of first remote temperature−sensing diode. The temperature−sensing element is either a Pentium III substrate transistor or a general−purpose 2N3904. 10 D1+ Analog Input. Connected to anode of first remote temperature−sensing diode. 11 D2– Analog Input. Connected to cathode of second remote temperature−sensing diode. 12 D2+ Analog Input. Connected to anode of second remote temperature−sensing diode. 13 ADD Three−State Logic Input. Sets two lower bits of device SMBus address. 14 INT(SMBALERT) Digital Output, Open−Drain. Can be programmed as an interrupt (SMBus ALERT) output for temperature/fan speed interrupts. Requires pullup resistor (10 k/C0087 typical). 15 SDA Digital I/O, Serial Bus Bidirectional Data. Open−drain output. Requires pullup resistor (2.2 k/C0087 typical). 16 SCL Digital Input, Serial Bus Clock. Requires pullup resistor (2.2 k/C0087 typical). ELECTRICAL CHARACTERISTICS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. (Note 1) Parameter Test Conditions/Comments Min Typ Max Unit POWER SUPPLY Supply Voltage, VCC 3.0 3.3 3.6 V Supply Current, ICC Interface inactive, ADC active Standby mode 1.4 3.0 mA /C0109A TEMPERATURE−TO−DIGITAL CONVERTER Local Sensor Accuracy ±1.0 ±3.0 °C Resolution 0.25 °C Remote Diode1 Sensor Accuracy 60°C ≤ TD ≤ 100°C ±0.5 ±1.0 °C Remote Diode2 Sensor Accuracy 60°C ≤ TD ≤ 100°C ±0.5 ±1.75 °C Resolution 0.125 °C Remote Sensor Source Current High level Low level 180 /C0109A OPEN−DRAIN DIGITAL OUTPUTS (THERM, INT, FAN_FAULT, PWM_OUT) Output Low Voltage, VOL IOUT = –6.0 mA; VCC = 3.0 V 0.4 V High−Level Output Leakage Current, IOH VOUT = VCC; VCC = 3.0 V 0.1 1.0 /C0109A
- Typicals are at T A = 25°C and represent most likely parametric norm. Shutdown current typ is measured with VCC = 3.3 V.
- ADD is a three −state input that can be pulled high, low, or left open−circuit.
- Timing specifications are tested at logic levels of V IL = 0.8 V for a falling edge and VIH = 2.2 V for a rising edge.
Figure 2. Diagram for Serial Bus Timing
the function of each register, see Table 14 through Table 29. to the address pointer register. These registers provide status of each limit comparison. speed measurements, along with their limit values. frequency, and speed range for the fans used. run when the device is in automatic fan speed control mode. Control of the ADM1031 is carried out via the SMBus. until the device is powered off, then on again. Table 1. ADD Pin Truth Table
- The facility to make hardwired changes at the
than one ADM1031 is used in a system.
- The master initiates data transfer by establishing a
then the master reads from the slave device.
- Data is sent over the serial bus in sequences of
an acknowledge bit from the slave device.
and slave devices can handle.
- When all data bytes have been read or written,
during the low period before the ninth clock pulse. tenth clock pulse to assert a stop condition. changed without starting a new operation. byte, and perform the functions described next. be written to the internal data register.
- If the ADM1031’s address pointer register value is
to the register. This is shown in Figure 16.
- If the address pointer register is known to be
- Although it is possible to read a data byte from a data register without first writing to the address pointer register, if the address pointer register is already at the correct value, it is not possible to write data to a register without writing to the address pointer register. This is because the first data byte of a write is always written to the address pointer register.
- In Figure 15, Figure 16, and Figure 17, the serial bus address is shown as the default value 01011(A1)(A0), where A1 and A0 are set by the three−state ADD pin.
- The ADM1031 also supports the Read Byte protocol, as described in the system management bus specification.
Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
http://onsemi.com 4. Try to minimize the number of copper/solder joints, which can cause thermocouple effects. Where copper/solder joints are used, make sure that they are in both the D+ and D– path and at the same temperature. Thermocouple effects should not be a major problem as 1°C corresponds to about 200 /C0109V , and thermocouple voltages are about 3 /C0032/C0109V/°C of temperature difference. Unless there are two thermocouples with a big temperature differential between them, thermocouple voltages should be much less than 200 /C0109V. 5. Place a 0.1 /C0109F bypass capacitor close to the ADM1031. 6. If the distance to the remote sensor is more than 8 inches, the use of twisted pair cable is recommended. This works up to about 6 to 12 feet. 7. For extra long distances (up to 100 feet), use a shielded twisted pair cable, such as the Belden #8451 microphone cable. Connect the twisted pair to D+ and D– and the shield to GND close to the ADM1031. Leave the remote end of the shield unconnected to avoid ground loops. Because the measurement technique uses switched current sources, excessive cable and/or filter capacitance can affect the measurement. When using long cables, the filter capacitor C1 can be reduced or removed. In any case the total shunt capacitance should not exceed 1000 pF. Cable resistance can also introduce errors. One ohm series resistance introduces about 0.5°C error. Addressing the Device ADD (Pin 13) is a three −state input. It is sampled, on powerup to set the lowest two bits of the serial bus address. Up to three addresses are available to the systems designer via this address pin. This reduces the likelihood of conflicts with other devices attached to the system management bus. The Interrupt System The ADM1031 has two interrupt outputs, INT and THERM. These have different functions. INT responds to violations of software programmed temperature limits and is maskable. THERM is intended as a “fail−safe” interrupt output that cannot be masked. If the temperature is below the low temperature limit, the INT pin is asserted low to indicate an out−of−limit condition. If the temperature exceeds the high temperature limit, the INT pin is also asserted low. A third limit, THERM limit, can be programmed into the device to set the temperature limit above which the overtemperature THERM pin is asserted low. The behavior of the high limit and THERM limit is as follows: 1. Whenever the temperature measured exceeds the high temperature limit, the INT pin is asserted low. 2. If the temperature exceeds the THERM limit, the THERM output asserts low. This can be used to throttle the CPU clock. If the THERM−to−Fan Enable bit (Bit 7 of THERM behavior/revision register) is cleared to 0, then the fans do not run full−speed. The THERM limit can be programmed at a lower temperature than the high temperature limit. This allows the system to run in silent mode, where the CPU can be throttled while the cooling fan is off. If the temperature continues to increase, and exceeds the high temperature limit, an INT is generated. Software can then decide whether the fan should run to cool the CPU. This allows the system to run in silent mode. 3. If the THERM −to−Fan Enable bit is set to 1, then the fan runs full−speed whenever THERM is asserted low. In this case, both throttling and active cooling take place. If the high temperature limit is programmed to a lower value than the THERM limit, exceeding the high temperature limit asserts INT low. Software could change the speed of the fan depending on temperature readings. If the temperature continues to increase and exceeds the THERM limit, THERM asserts low to throttle the CPU and the fan runs full−speed. This allows the system to run in performance mode, where active cooling takes place and the CPU is only throttled at high temperature. Using the high temperature limit and the THERM limit in this way allows the user to gain maximum performance from the system by only slowing it down, should it be at a critical temperature. Although the ADM1031 does not have a dedicated interrupt mask register, clearing the appropriate enable bits in Configuration Register 2 clears the appropriate interrupts and masks out future interrupts on that channel. Disabling interrupt bits prevents out −of−limit conditions from generating an interrupt or setting a bit in the status registers. Using THERM as an Input The THERM pin is an open−drain input/output pin. When used as an output, it signals overtemperature conditions. When asserted low as an output, the fan is driven full−speed if the THERM −to−Fan Enable bit is set to 1 (Bit 7 of Register 0×3F). When THERM is pulled low as an input, the THERM bit (Bit 7) of Status Register 2 is set to 1, and the fans are driven full−speed. Note that the THERM−to−Fan Enable bit has no effect whenever THERM is used as an input. If THERM is pulled low as an input, and the THERM−to−Fan Enable bit = 0, then the fans are still driven full−speed. The THERM−to−Fan Enable bit only affects the behavior of THERM when used as an output. Status Registers All out−of−limit conditions are flagged by status bits in Status Register 1 (0×02) and Status Register 2 (0×03). Bit 0 (Alarm Speed) and Bit 1 (Fan Fault) of Status Register 1, once set, can be cleared by reading Status Register 1. Once the alarm speed bit is cleared, this bit is not reasserted on the next monitoring cycle even if the condition still persists. This bit can be reasserted only if the fan is no longer at alarm
Figure 22. PWM Duty Cycle vs. Temperature Slope control slope. The TMIN can be changed in increments of 4°C. Figure 23. Effect of Increasing TMIN Value on 0×21) program the fan spin−up times. Table 5. Fan Spin−Up Times which temperature channel/channels control each fan. Table 6. Auto Mode Fan Behavior
00 Remote Temperature 1 Controls Fan 1
01 Remote Temperature 1 Controls Fan 1 and 2
10 Remote Temperature 2 Controls Fan 1 and 2
11 Maximum Speed Calculated by Local and Remote
temperature being measured, drives the fans. value is 40°C. The local temperature’s TMAX is thus 60°C. Consider if both temperature channels measure 40 °C. Both control loops calculate a PWM duty cycle of 66%.
Table 7. Programming PWM Duty Cycle TMAX = Temperature at which fan runs full−speed. TMIN = Temperature at which fan turns on. Max DC = Maximum duty cycle (100%) = 15 decimal. configuration register (default = 33% = 5 decimal). RANGE = PWM duty cycle vs. temperature slope. selects software control (Default = 1). <5:3> PWM Frequency Driving the Fan. Fan 2 in automatic fan speed control mode.
MIN can be programmed in 4°C increments. remote temperature readings. Configuration Register 1 (Register 0×00) to 1. 80 time slots and low for 160 time slots. Figure 27. 33% PWM Duty Cycle Presented
80 TIME
160 TIME
240 TIME SLOTS
2, 4, and 8. The ramp rates are actually discrete time slots. shows how the filtered mode algorithm operates.
- Program a value for TMIN.
- Program a value for the slope TRANGE.
- Program a value for fan spin−up time.
- Program the desired automatic fan speed control
- Program a ramp rate for the filtered mode.
- Program the ADC sample rate in the fan filter
- Set Bit 0 to enable fan filtered mode for Fan 1.
- Set Bit 1 to enable the fan filtered mode for Fan 2.
- Select automatic fan speed control mode by setting
Bit 7 of Configuration Register 1. clearing Bit 7 of Configuration Register 1 (Register 0×00). Table 10. PWM Duty Cycle Select Mode set the PWM duty cycle for Fan 2. programmed to run at the desired RPM value. 0×00) to 0 places the ADM1031 under software control. selects RPM feedback mode for each fan. fan speed measured can be before generating an interrupt.
http://onsemi.com Example 1: If the desired value for RPM feedback mode is 5000 RPM, the count to be programmed is: Count = (f × 60)/R × N Since the desired RPM value, R, is 5000 RPM, the value for count is: N = 2: Count = (11250 × 60)/5000 × 2 Count = 675000/10000 Count = 67 (assumes 2 tach pulses/rev) Example 2: If the desired value for RPM feedback mode is 3650 RPM, the count to be programmed is: Count = (f × 60)/R × N Since the desired RPM value, R, is 3650 RPM, the value for count is: N = 2: Count = (11250 × 60)/3650 × 2 Count = 675000/7300 Count = 92 (assumes 2 tach pulses/rev) Once the count value has been calculated, it should be written to the fan tach high limit register. It should be noted that in RPM feedback mode, there is no high limit register for underspeed detection that can be programmed as there are in the other fan speed control modes. The only time each fan indicates a fan failure condition is whenever the count reaches 255. Since the speed range N = 2, the fan fails if its speed drops below 1324 RPM. Programming RPM Values 1. Choose the RPM value to be programmed. 2. Set speed range value N = 2. 3. Calculate count value based on RPM and speed range values chosen. Use the count equation to calculate the count value. 4. Clear Bit 7 of Configuration Register 1 (Register 0×00) to place the ADM1031 under software control. 5. Write a 1 to Bit 5 of Configuration Register 1 to place the device in RPM feedback mode. 6. Write the calculated count value to the fan tach high limit register (Register 0×10). The fan speed now goes to the desired RPM value and maintains that fan speed. RPM Feedback Mode Limitations RPM feedback mode only controls fan RPM over a limited fan speed range of about 75% to 100%. However, this should be enough range to overcome fan−manufacturing tolerance. In practice, however, the program must not function at too low an RPM value for the fan to run at, or the RPM mode does not operate. To find the lowest RPM value allowed for a given fan, do the following: 1. Run the fan at 53% PWM duty cycle in software mode. Clear Bit 5 and Bit 7 of Configuration Register 1 (Register 0×00) to enter PWM duty cycle mode. Write 0×08 to the fan speed configuration register (Register 0×22) to set the PWM output to 53% duty cycle. 2. Measure the fan RPM. This represents the fan RPM below which the RPM mode fails to operate. Do not program a lower RPM than this value when using RPM feedback mode. 3. Ensure that speed range N = 2 when using RPM feedback mode. Fan Drive and Speed Measurement Fans come in a variety of different options. One distinguishing feature of fans is the number of poles that a fan has internally. The most common fans available have four, six, or eight poles. The number of poles the fan has generally affects the number of pulses per revolution the fan outputs. If the ADM1031 is used to drive fans other than 4 −pole fans that output 2 tach pulses/revolution, then the fan speed measurement equation needs to be adjusted to calculate and display the correct fan speed, and also to program the correct count value in RPM feedback mode. Fan Speed Measurement Equations For a 4−pole fan (2 tach pulses/rev): Fan RPM = (f × 60)/Count × N For a 6−pole fan (3 tach pulses/rev): Fan RPM = (f × 60)/(Count × N × 1.5) For an 8−pole fan (4 tach pulses/rev): Fan RPM = (f × 60)/(Count × N × 2) If in doubt as to the number of poles the fans used have, or the number of tach output pulses/rev, consult the fan manufacturer’s data sheet, or contact the fan vendor for more information. Fan Drive Using PWM Control The external circuitry required to drive a fan using PWM control is extremely simple. A single NMOS FET is the only drive transistor required. The specifications of the MOSFET depend on the maximum current required by the fan being driven. Typical notebook fans draw a nominal 170 mA, and so SOT devices can be used where board space is a constraint. If driving several fans in parallel from a single PWM output, or driving larger server fans, the MOSFET needs to handle the higher current requirements. The only other stipulation is that the MOSFET should have a gate voltage drive, V GS <3.3 V , for direct interfacing to the PWM_OUT pin. The MOSFET should also have a low on−resistance to ensure that there is not significant voltage drop across the FET. This would reduce the maximum operating speed of the fan.
Figure 34. Interfacing the ADM1031 to a 3−Wire Fan
5.0 V OR 12 V
system’s fan drive requirements. signal conditioning allows accurate monitoring of fan speed. server fans that draw more current, RSENSE can be reduced. developed across the fan, and the fan then spins faster. Figure 35. Interfacing the ADM1031 to a 2−Wire Fan negative−going spikes are more than 250 mV in amplitude. speed to be reliably determined. Figure 36. Fan Speed Sensing Waveform at Characteristics Register 2 (0 ×21) as shown in Table 11. Table 11. Oscillator Frequencies
Figure 39. Typical Application Circuit CONTROLS WHETHER TACH1/AIN1 AND TACH2/AIN2 ARE ANALOG OR DIGITAL INPUTS.
5.0 V MAX
Table 12. Registers Value Registers 0x08–0x1E See Table 13. is the ADM1031, this register contains 0x31. This register is read only. register should not be read from or written to in normal operation.
Table 13. Value Registers 0x06 R Extended Temperature Resolution (see Table 18). 0x08 R/W Fan 1 Speed. This register contains the value of the Fan 1 tach measurement. 0x09 R/W Fan 2 Speed. This register contains the value of the Fan 2 tach measurement. 0x0A R Local Temperature Value. This register contains the 8 MSBs of the local temperature measurement. 0x0B R Remote 1 Temperature Value. This register contains the 8 MSBs of the Remote 1 temperature reading. 0x0C R Remote 2 Temperature Value. This register contains the 8 MSBs of the Remote 2 temperature reading. Table 14. Register 0/C012100 Configuration Register 1 Power−On Default = 90H
0 MONITOR R/W Setting this bit to a “1” enables monitoring of temperature and enables measurement
2 TACH/AIN R/W Clearing this bit to “0” selects digital fan speed measurement via the TACH pins. 4 FAN_FAULT Enable R/W Logic 1 enables FAN_FAULT pin; Logic 0 disables FAN_FAULT output. 6−5 PWM Mode R/W These two bits control the behavior of the fans in auto fan speed control mode. 00 = Remote Temp 1 controls Fan 1; Remote Temp 2 controls Fan 2. 01 = Remote Temp 1 controls Fan 1 and Fan 2. 10 = Remote Temp 2 controls Fan 1 and Fan 2. 11 = Max of Local Temp and Remote Temp 1 and 2 drives Fans 1 and 2. These two bits have the following effect in software control mode. 00 = Program PWM duty cycles for Fans 1 and 2. 11 = Program RPM Speeds for Fans 1 and 2.
Table 15. Register 0/C012101 Configuration 2 Power−On Default = 7FH when a diode fault is detected on powerup. except when a diode fault is detected on powerup. 7 SW Reset R/W When set to “1,” resets the device. Self−clears. Powerup Default = 0. Table 16. Register 0/C012102 Status Register 1 Power−On Default = 00H reasserted on next monitoring cycle, even if the fan is still running at alarm speed. 1 Fan 1 Fault R This bit is set to “1” if Fan 1 becomes stuck or is running under speed. still outside the Remote 1 Temp Low Limit, this bit reasserts on next monitoring cycle. cleared on a read of Status Register 1. reading the Status Register 1.
6 Local Temp High R This bit is set to “1” if a short or open is detected on the Remote 1 temperature
reading the Status Register 1. still outside the Local Temp Low Limit, this bit reasserts on next monitoring cycle. Table 17. Register 0/C012103 Status Register 2 Powerup Default = 00H reasserted on next monitoring cycle, even if the fan is still running at alarm speed. 1 Fan 2 Fault R This bit is set to “1” if Fan 2 becomes stuck or is running under speed. cleared on reading Status Register 2.
Table 18. Register 0/C012106 Extended Temperature Resolution Power−On Default = 00H <2:0> Remote Temp 1 R Holds extended temperature resolution bits for Remote 1 channel. <5:3> Remote Temp 2 R Holds extended temperature resolution bits for Remote 2 channel. <7:6> Local Temp R Holds extended temperature resolution bits for local temperature channel. Table 19. Register 0/C012120 Fan Characteristics Register 1 Power−On Default = 5DH <2:0> Fan 1 Spin−Up R/W These bits contain the fan spin−up time to allow Fan 1 to overcome its own inertia. <5:3> PWM 1 Frequency R/W These bits allow programmability of the nominal PWM 1 output frequency driving Fan 1. Table 20. Register 0/C012121 Fan Characteristics Register 2 Power−On Default = 5H <2:0> Fan 2 Spin−Up R/W These bits contain the fan spin−up time to allow Fan 2 to overcome its own inertia. <5:3> PWM 2 Frequency R/W These bits allow programmability of the nominal PWM 2 output frequency driving Fan 1.
Table 21. Register 0/C012122 Fan Speed Configuration Register Power−On Default = 55H 0x05 for 33% PWM duty cycle. 0x05 for 33% PWM duty cycle. Table 22. Register 0/C012123 Fan Filter Register Power−On Default = 50H <7> Spin−Up Disable R/W When set to 1, disables fan spin−up. <4:2> ADC Sample Rate R/W These bits set the sampling rate for the ADC. <1> Fan 2 Filter En R/W This bit enables fan filtering for Fan 2. <0> Fan 1 Filter En R/W This bit enables fan filtering for Fan 1. Table 23. Register 0/C012124 Local Temp TMIN/TRANGE Power−On Default = 41H increments. Default is 32°C. based on the local temperature readings.
Table 24. Register 0/C012125 Remote 1 Temp TMIN/TRANGE Power−On Default = 61H increments. Default is 32°C. based on the Remote 1 Temp Readings. Table 25. Register 0/C012126 Remote 2 Temp TMIN/TRANGE Power−On Default = 61H 4°C increments. Default is 32°C. based on the Remote 2 Temp Readings. Table 26. Register 0/C01213F THERM Behavior/Revision Power−On Default = 80H <7> THERM−to−Fan En R/W Setting this bit to 1, enables the fan to run full−speed when THERM is asserted low. system to run in silent mode. (Power−On Default = 1). <3:0> Revision R This nibble contains the revision number for the ADM1031.
http://onsemi.com Table 27. Register 0/C01210D Local Temperature Offset Power−On Default = 00H this bit is set to 1, the local offset is subtracted from the Local Temperature Reading. Table 28. Register 0/C01210E Remote 1 Temperature Offset Power−On Default = 00H <7> Sign R/W When this bit is 0, the remote offset is added to the Remote 1 Temperature Reading. <6.4> Unused R/W Unused. Read back 0. <3:0> Remote 1 Offset R/W These four bits are used to add an offset to the Remote 1 Temperature Reading. temperature reading, depending on the sign bit. Table 29. Register 0/C01210F Remote 2 Temperature Offset Power−On Default = 00H <7> Sign R/W When this bit is 0, the remote offset is added to the Remote 2 Temperature Reading. <6.4> Unused R/W Unused. Read back 0. <3:0> Remote 2 Offset R/W These four bits are used to add an offset to the Remote 2 Temperature Reading. temperature reading, depending on the sign bit. Device Order Number* Package Type Package Option Shipping† ADM1031ARQZ 16−Lead QSOP RQ−16
98 Tube
ADM1031ARQZ−REEL 2500 Tape & Reel ADM1031ARQZ−R7 1000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *These are Pb−Free packages.
http://onsemi.com PACKAGE DIMENSIONS QSOP−16 CASE 492−01 ISSUE O MAX MILLIMETERS G R −B− −A− L M0.25 (0.010) T U −T− SEATING PLANE K D16 PL C M0.25 (0.010) T BAS S V N J M F 8 PL DETAIL E DETAIL E H x 45/C0095 RAD. MOLD PIN DIM MIN MAXMIN INCHES A 4.80 4.980.189 0.196 B 3.81 3.990.150 0.157 C 1.55 1.730.061 0.068 D 0.20 0.310.008 0.012 F 0.41 0.890.016 0.035 G 0.64 BSC0.025 BSC H 0.20 0.460.008 0.018 J 0.249 0.1910.0098 0.0075 K 0.10 0.250.004 0.010 L 5.84 6.200.230 0.244 M 0 8 0 N 0 7 0 7 P 0.18 0.280.007 0.011 Q 0.51 DIA0.020 DIA R 0.64 0.890.025 0.035 U 0.64 0.890.025 0.035 V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. THE BOTTOM PACKAGE SHALL BE BIGGER THAN THE TOP PACKAGE BY 4 MILS (NOTE: LEAD SIDE ONLY). BOTTOM PACKAGE DIMENSION SHALL FOLLOW THE DIMENSION STATED IN THIS DRAWING. 4. PLASTIC DIMENSIONS DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 6 MILS PER SIDE. 5. BOTTOM EJECTOR PIN WILL INCLUDE THE COUNTRY OF ORIGIN (COO) AND MOLD CAVITY I.D./C0095/C0095/C0095 /C00950 8 0 /C0095/C0095/C0095 8 /C0095 /C0095/C0095/C0095/C0095 MARK Q P 0.013 X 0.005 DP. MAX RAD. 0.005−0.010 TYP ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ADM1031/D Pentium is a registered trademark of Intel Corporation. LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative