ADM1022

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REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a ADM1022 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 Low-Cost PC Temperature Monitor and Fan Control ASIC FUNCTIONAL BLOCK DIAGRAM 2.5V BANDGAP REFERENCE ADDRESS POINTER REGISTER ADC RESET GENERATOR 1 ANALOG MULTIPLEXER ADM1022RST1 RST2 D1+ D1– D2+/GPI D2–/THERM GND SDA SCL ADD/NTEST_OUT MR VCC 20k/H9024 VCC VMON FAN_SPD/NTEST_IN INT FAN_OFF LIMIT COMPARATORS INTERRUPT STATUS REGISTERS MASK GATING CONFIGURATION REGISTER SERIAL BUS INTERFACE INT MASK REGISTER ANALOG OUTPUT REGISTER AND 8-BIT DAC VALUE AND LIMIT REGISTERS RESET GENERATOR 2 BANDGAP TEMPERATURE SENSOR

FEATURES

External Temperature Measurement with Remote Diode (Two Channels) On-Chip Temperature Sensor Interrupt and Over-Temperature Outputs Fault Tolerant Fan Control Brownout Detection LDCM Support System Management Bus (SMBus) Standby Mode to Minimize Power Consumption Limit Comparison of all Monitored Values

APPLICATIONS

Network Servers and Personal Computers Microprocessor-Based Office Equipment Test Equipment and Measuring Instruments GENERAL DESCRIPTION The ADM1022 is a low cost temperature monitor and fan con- troller for microprocessor-based systems. The temperature of one or two remote sensor diodes may be measured, allowing monitoring of processor temperature in single- or dual-pro- cessor systems. Measured values can be read out via a serial System Manage- ment Bus, and values for limit comparisons can be programmed in over the same serial bus. The ADM1022 also contains a DAC for fan speed control. Automatic hardware temperature trip points are provided and the fan will be driven to full speed if they are exceeded. Finally, the chip has two supply voltage monitors for brownout detection. The ADM1022’s 3.0 V to 5.5 V supply voltage range, low supply current, and SMBus interface make it ideal for a wide range of applications. These include hardware monitoring and protection applications in personal computers, electronic test equipment and office electronics.

REV. 0–2– ADM1022–SPECIFICATIONS Parameter Min Typ 1 Max Unit Test Conditions POWER SUPPLY Supply Voltage, VCC 3.0 3.30 5.5 V Supply Current, ICC 1.4 2.6 mA Interface Inactive, ADC Active TEMPERATURE-TO-DIGITAL CONVERTER Internal Sensor Accuracy ±3 °C ±1 ±2 °CT A = 85°C, Tested at Wafer Sort Resolution 1 °C External Diode Sensor Accuracy ±5 °C ±3 °CT A = 85°C, Tested at Wafer Sort Resolution 1 °C Remote Sensor Source Current 60 90 130 µA High Level (D+ = D– +0.65 V) 3.5 5.5 7.5 µA Low Level (D+ = D– +0.65 V) Total Monitoring Cycle Time, t C 200 ms ANALOG OUTPUT Output Voltage Range 0 2.5 V Total Unadjusted Error, TUE ±5% I L = 2 mA Full-Scale Error ±1 ±3% Zero Error ±2 LSB No Load Differential Nonlinearity, DNL ±1 LSB Monotonic by Design Integral Nonlinearity ±1 LSB Output Source Current 2 mA Output Sink Current 1 mA VOLTAGE MONITOR THRESHOLDS Reset Threshold, VMON, VCC 2.85 2.925 3.00 V Measured with V CC Falling Hysteresis 50 mV MR INPUT MR Minimum Pulsewidth, t MR 10 µs MR Glitch Immunity 100 ns MR to RST2 Propagation Delay, t MD 0.5 µs MR Pull-Up Resistance 10 20 30 k Ω RESET OUTPUTS, RST1, RST2 Reset Output Voltage, V OL 0.3 V I SINK = 1.2 mA VCC = VTH(MAX) Reset Active Timeout Period, t RP 140 180 560 ms VCC to Reset Delay, t D 20 µs DIGITAL OUTPUT ADD/NTEST_OUT 2 Output High Voltage, V OH 2.4 V I OUT = 3.0 mA Output Low Voltage, V OL 0.4 V OPEN-DRAIN DIGITAL OUTPUTS (INT, THERM, RST2, RST1) Output Low Voltage, V OL 0.4 V I OUT = –3.0 mA High Level Output Leakage Current, I OH 0.1 1 µAV OUT = VCC OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA) Output Low Voltage, V OL 0.4 V I OUT = –3.0 mA High Level Output Leakage Current, I OH 0.1 1 µAV OUT = VCC SERIAL BUS DIGITAL INPUTS (SCL, SDA) Input High Voltage, V IH 2.1 V (min) Input Low Voltage, V IL 0.8 V (max) Input Leakage Current ±5 µA Hysteresis 500 mV (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.)

1Typicals are at T A = 25°C and represent most likely parametric norm. Standby current typ is measured with V CC = 3.3 V. 2ADD is a three-state input that may be pulled high, low or left open-circuit. 3Timing specifications are tested at logic levels of V IL = 0.8 V for a falling edge and V IH = 2.2 V for a rising edge. Specifications subject to change without notice. Figure 1. Diagram for Serial Bus Timing

REV. 0 ADM1022 –4– ABSOLUTE MAXIMUM RATINGS * CC + 0.3 V Voltage on Any Other Input Lead Temperature, Soldering *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL CHARACTERISTICS 16-Lead QSOP Package θJA = 105°C/W θJA = 39°C/W ORDERING GUIDE Temperature Package Package Model Range Description Option ADM1022ARQ 0 °C to 85°C 16-Lead QSOP RQ-16 PIN CONFIGURATION TOP VIEW (Not to Scale) FAN_OFF MR RST1 GND VCC VMON RST2 FAN_SPD/NTEST_IN SDA SCL INT ADD/NTEST_OUT D2+/GPI D2–/THERM D1+ D1– ADM1022

REV. 0 ADM1022 –5– PIN FUNCTION DESCRIPTION Pin No. Mnemonic Description 1 FAN_OFF Digital Output (Open-Drain) Fan Off Request. When asserted low this indicates a request to shut off the fan independent of the FAN_SPD output. When negated (output FET off) it indicates that the fan may be turned on. 2 MR Digital Input, Manual Reset. A logic low on this input causes RST2 to be asserted. Once this input is negated that output will remain asserted for t RP. This input has an internal 20 k Ω pull-up resistor. Leave unconnected if not used. 3 RST1 Digital I/O (Open-Drain). This pin is asserted low while V CC remains below the reset threshold. It remains asserted for tRP after the reset condition is terminated. It is bidirectional so the ADM1022 can be optionally reset; external logic must be used to prevent system auxiliary reset from occurring when used as an input. 4 GND GROUND. Power and Signal Ground. CC POWER 3.3 V. Power source and voltage monitor input for first reset generator. 6V MON Analog Input. Voltage monitor input for second reset generator. 7 RST2 Digital Output (Open-Drain). This pin is asserted low under any of the following conditions: – VMON or VCC remains below the reset threshold – while MR is held low – while RST1 is asserted. It remains asserted for t RP after the reset conditions are terminated. 8 FAN_SPD/NTEST_IN Analog Output/Test Input. An active-high input that enables NAND board-level connectivity testing. Refer to section on NAND testing. Used as an analog output for fan speed control when NAND test is not selected. 9 D1– Remote Thermal Diode Negative Input. This is the negative input (current sink) from the remote thermal diode. This also serves as the negative input into the A/D. 10 D1+ Remote Thermal Diode Positive Input. This is the positive input (current source) from the remote thermal diode. This serves as the positive input into the A/D. 11 D2–/ THERM Analog Input/Digital I/O (Open-Drain). Can be programmed as negative input for a second diode temperature sensor, or as a digital I/O pin. In this case it is an active low thermal overload output that indicates a violation of a temperature set point (over-temperature). Also acts as an input to provide external fan control. When this pin is pulled low by an external signal, a status bit is set and the fan speed is set to full on. 12 D2+/GPI Analog/Digital Input. Can be programmed as the positive input for a second diode sensor, or as a general-purpose logic input. In this case it can be programmed as an active high or active low input that sets Bit 4 of the Status Registers. This bit can only be reset by reading the status registers, pro- vided GPI is in the inactive state. 13 ADD/NTEST_OUT Digital I/O. The lowest order programmable bit of the SMBus Address. ADD is sampled at power- up and changing it wh ile powered on will have no immediate effect. This pin also functions as an output when doing a NAND test. 14 INT Digital Output (Open Drain), System Interrupt Outp ut. This signal indicates a violation of a set trip point. The output is enabled when Bit 1 of the Configuration Register is set to 1. The default state is disabled. 15 SCL Digital Input SMBus Clock. 16 SDA Digital I/O (Open-Drain) SMBus Bidirectional Data.

Figure 8. Temperature Error vs. Differential-Mode Noise Figure 9. Standby Supply Current vs. Supply Voltage

100 POWER RESET TIMEOUT – ms

Figure 10. Power-up Reset vs. Temperature ambient temperature to be monitored. in over the same serial bus. The ADM1022 also contains a DAC for fan speed control. will be asserted if the software or hardware limits are exceeded. tional. A manual reset input is also provided. of each register is given in Tables IV to IX. Configuration Register:Provides control and configuration. is written to the Address Pointer Register. ments are stored in these registers, along with their limit values. put DAC is stored in this register. control of a master device, e.g., the PIIX4. mined by the logical states of Pin 13 (ADD/ NTEST_OUT).

REV. 0 ADM1022 –8– If ADD is left open-circuit the default address will be 0101100. The facility to make hardwired changes to A1 and A0 allows the user to avoid conflicts with other devices sharing the same serial bus; for example, if more than one ADM1022 is used in a system. The serial bus protocol operates as follows: 1. The master initiates data transfer by establishing a START condition, defined as a high-to-low transition on the serial data line SDA while the serial clock line SCL remains high. This indicates that an address/data stream will follow. All slave peripherals connected to the serial bus respond to the START condition, and shift in the next eight bits, consisting of a 7-bit address (MSB first) plus an R/ W bit, which deter- mines the direction of the data transfer, i.e., whether data will be written to or read from the slave device. The peripheral whose address corresponds to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the Acknowl- edge Bit. All other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. If the R/W bit is a 0, the master will write to the slave device. If the R/W bit is a one, the master will read from the slave device. 2. Data is sent over the serial bus in sequences of nine clock pulses, eight bits of data followed by an Acknowledge Bit from the slave device. Tr ansitions on the data line must occur during the low period of the clock signal and remain stable during the high period, as a low-to-high transition when the clock is high may be interpreted as a STOP signal. The number of data bytes that can be transmitted over the serial bus in a single READ or WRITE operation is limited only by what the master and slave devices can handle. 3. When all data bytes have been read or written, stop conditions are established. In WRITE mode, the master will pull the data line high during the 10th clock pulse to assert a STOP condition. In READ mode, the master device will override the acknowledge bit by pulling the data line high during the low period before the 9th clock pulse. This is known as No Acknowledge. The master will then take the data line low during the low period before the 10th clock pulse, then high during the 10th clock pulse to assert a S TOP condition. Any number of bytes of data may be transferred over the serial bus in one operation, but it is not possible to mix read and write in one operation, because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. In the case of the ADM1022, write operations contain either one or two bytes, and read operations contain one byte, and perform the following functions: To write data to one of the device data registers or read data from it, the Address Pointer Register must be set so that the correct data register is addressed, then data can be written into that register or read from it. The first byte of a write operation always contains an address that is stored in the Address Pointer Register. If data is to be written to the device, then the write operation contains a second data byte that is written to the reg- ister selected by the address pointer register. This is illustrated in Figure 11a. The device address is sent over the bus followed by R/ W set to 0. This is followed by two data bytes. The first data byte is the address of the internal data register to be written to, which is stored in the Address Pointer Register. The second data byte is the data to be written to the internal data register. When reading data from a register there are two possibilities: 1. If the ADM1022’s Address Pointer Register value is unknown or not the desired value, it is first necessary to set it to the cor- rect value before data can be read from the desired data register. This is done by performing a write to the ADM1022 as before, but only the data byte containing the register address is sent, as data is not to be written to the register. This is shown in Figure 11b. A read operation is then performed consisting of the serial bus address, R/W bit set to 1, followed by the data byte read from the data register. This is shown in Figure 11c. 2. If the Address Pointer Register is known to be already at the desired address, data can be read from the corresponding data register without first writing to the Address Pointer Reg- ister, so Figure 11b can be omitted. NOTES 1. Although it is possible to read a data byte from a data register without first writing to the Address Pointer Register, if the Address Pointer Register is already at the correct value, it is not possible to write data to a register without writing to the Address Pointer Register, because the first data byte of a write is always written to the Address Pointer Register. 2. In Figures 11a to 11c, the serial bus address is shown as the default value 01011(A1)(A0), where A1 and A0 are set by the three-state ADD pin. 3. The ADM1022 also supports the Read Byte protocol, as described in the System Management Bus specification.

no other limits, or in the event of a software malfunction. but they may be programmed with higher or lower values.

1. It makes the values in registers 13h and 14h the active limits,

and disables read-only registers 17h and 18h.

1. It locks the data into registers 13h and 14h, so they cannot

asserted or a Power-On Reset occurs. THERM pin (Pin 11) low. Bit 6 of the Status Register is also set. The ADM1022 has two interrupt outputs, INT and THERM. intended as a “fail-safe” interrupt output that cannot be masked. least three consecutive conversions. Figure 15. Operation of INT Output c) an interrupt is generated by another source. of the Interrupt (INT) Status Registers. sponding bit is also set in the mirror register at address 4Ch. rupt output. The contents of this register are cleared when read.

earlier with regard to fault tolerant fan speed control. Figure 16. Operation of THERM Output and FAN_OFF will be negated. to set that bit high or low as appropriate. (INT_Enable) is high, and Bit 2 (INT_Clear) is low.

8 MASK BITS

THERM IS PULLED LOW EXTERNALLY. Figure 17. Interrupt Register Structure

5 V OPERATION

age higher than 3.3 V by adding an input attenuator. reset voltage of the V MON input. Figure 20. Scaling VMON to a Higher Reset Voltage errors due to variations in this input resistance. Register high. This bit automatically clears after being set. only be exited once the ADM1022 is powered down. propagation delay of 500 ns. Figure 21. NAND Tree On power-up, the Interrupt functionality of the device is disabled.

REV. 0 ADM1022 –16– Table IV. Registers Address A7–A0 Register Name in Hex Comments Value Registers 0x13–0x3A See Table V. Company ID 0x3E This location will contain the company identification number. This register is read only. Revision 0x3F This location will contain the revision number of the part in the lower four bits of the register [3:0]. The upper four bits reflect the ADM1022 Version Number [7:4]. The first version is 1100. The next version of ADM1022 would be 1101, etc. For instance, if the stepping were A0 and this part is an ADM1022, this register would read 1100 0000. This register is read only. Configuration Register 0x40 See Table VI. Power-On Value = 0010 0101. Interrupt Status Register 0x41 See Table VII. Power-On Value = 0000 0000. Reserved for Future Use 0x42 Interrupt Mask Register 0x43 See Table VIII. Power-On Value = 0000 0000. Reserved for Future Use 0x44 Reserved for Future Use 0x47 Reserved for Future Use 0x4A Interrupt Status Register Mirror 0x4C See Table IX. Power-On Value = 0000 0000. Table V. Registers 0x13–0x3A Value Registers Address Read/Write Description 0x13 Read/Write Programmable Local Temp Sensor Automatic Trip Point—Default 70°C. This register can only be written to if the write once bit in the configuration register (0x40, Bit 3) has not been set. 0x14 Read/Write Programmable Remote Thermal Diode Automatic Trip Point—Default 100 °C. This register can only be written to if the write once bit in the configuration register (0x40, Bit 3) has not been set. 0x15 Read/Write T est Register for manufacturer’s use only. Do not write to this register. 0x17 Read Only Default Local Temp Sensor Automatic Trip Point—Default 70 °C. Cannot be changed. Dis- abled when Bit 3 of Configuration Register is set. 0x18 Read Only Def ault Remote Thermal Diode Automatic Trip Point—Default 100°C. Cannot be changed. Disabled when Bit 3 of Configuration Register is set. 0x19 Read/Write A nalog Output, FAN_SPD (Defaults to 0x00h). 0x20 Read Only External Temperature Value Diode 2. 0x26 Read Only External Temperature Value Diode 1. 0x27 R ead Only Int ernal Temperature. 0x2B Read/Write External Temperature Diode 2 High Limit. 0x2C Read/Write External Temperature Diode 2 Low Limit. 0x37 Read/Write External Temperature Diode 1 High Limit. 0x38 Read/Write External Temperature Diode 1 Low Limit. 0x39 Read/Write Internal Temperature High Limit. 0x3A Read/Write Internal Temperature Low Limit.

REV. 0 ADM1022 –17– Table VI. Register 0x40 Configuration Register Bit Name Read/Write Description 0 START Read/Write Setting this bit to a “1” enables startup of ADM1022; clearing this bit to a “0” places ADM1022 in standby mode. Caution: The INT output will not be cleared if the user clears this bit after an interrupt has occurred (see “ INT Clear” bit). At startup tempera- ture monitoring and limit checking functions begin. Note, all limit values should be pro- grammed into ADM1022 prior to using the standard thermal interrupt mechanism based upon high and low limits. (Power-Up Default = 1.) 1 INT Enable Read/Write Setting this bit to a “1” enables the INT output. 1 = Enabled 0 = Disabled (Power-Up Default = 0). 2 INT Clear Read/Write This bit clears the INT output when set (1) without affecting the contents of the Interrupt Status Register. (Power-Up Default = 1.) 3 Programmable Read/Write Setting this bit to a “1” will lock in the value set into the Programmable Local and Remote Automatic Trip Once Automatic Trip Point Registers (Value Register locations 0x13 and 0x14). Furthermore, Point Lock Bit when this bit is set, the values in the Default Local and Remote Automatic Trip Point Registers (Value Register locations 0x17 and 0x18) will no longer have an effect on the THERM, FAN_SPD or FAN-OFF outputs. This bit cannot be written again until after RST2 has been asserted or Power-On Reset occurs. (Power-Up Default = 0.) 4 Soft Reset Read/Write Setting this bit to a “1” will restore power-up default values to the Configuration Regis- ter, Interrupt Status Register, Interrupt Status Register Mirror, Interrupt Mask Register. This bit automatically clears itself since the power-on default is zero. 5 FAN OFF Read/Write Setting this bit to a “1” will cause the FAN OFF pin to be floated. Clearing this bit to “0” will cause the FAN OFF pin to be driven low, which requests that the fan be turned off. This bit will be unconditionally set if the THERM pin is ever asserted. Reading this bit reflects the state of the FAN-OFF output buffer. Due to the open-drain nature of this pin the value read does not represent the actual state of the external circuit connected to it. (Power-Up Default = 1.) 6 GPI Invert Read/Write Setting this bit to a “1” will invert the GPI i nput for the purpose of level detection and interrupt generation. Clearing this bit to a “0” leaves the GPI input unmodified. (Power- Up Default = 0.)

7 D2 Read/Write Setting this bit configures Pins 11 and 12 as inputs for a second diode temperature sen-

sor. Clearing this bit configures Pin 11 as THERM output and Pin 12 as general purpose logic input (GPI). (Power-Up Default = 0.) Table VII. Register 0x41 Interrupt Status Register. Power-On Default <7:0> = 00h Bit Name Read/Write Description 0 Int. Temp Error Read Only A one indicates that one of the internal temperature sensor limits has been exceeded. 1 Ext. Temp2 Error Read Only A one indicates that one of the limits for the second external temperature sensor has been exceeded. 2 Diode 2 Fault Read Only A one indicates either a short- or open-circuit fault on remote sensor diode 2. 3 Reserved Read Only Undefined. 4 GPI Input Read Only A “1” indicates that the GPI pin is asserted. The polarity of the GPI pin is determined by GPI Invert (Bit 6) in the Configuration Register. For example, if GPI Invert is cleared, this bit will be “1” when the GPI pin is high (“1”); this bit will be “0” when the GPI pin is low (“0”). If GPI Invert is set, this bit will be “1” when the GPI pin is low (“0”); this bit will be “0” when the GPI pin is high (“1”). Note that the state of GPI is not latched; this bit simply reflects the state or inverted state of the GPI pin. Note: if this bit is “1” reading this register will NOT clear it to “0.” 5 Ext. Temp1 Error Read Only A one indicates that one of the limits for the first external temperature sensor has been exceeded. 6 THERM Input Read Only A one indicates that the thermal overload ( THERM) line has been asserted externally. 7 Diode 1 Fault Read Only A one indicates either a short- or open-circuit fault on remote sensor diode 1. NOTE: An error that causes continuous interrupts to be generated may be masked in its respective mask register until the error can be alleviated.

REV. 0 ADM1022 –18– Table VIII. 0x43 Interrupt Mask Register. Power-On Default <7:0> = 00h Bit Name Read/Write Description 0 Int. Temp Error Read Only A one disables the corresponding interrupt status bit for the INT output. 1 Ext. Temp2 Error Read Only A one disables the corresponding interrupt status bit for the INT output. 2 Diode 2 Fault Read Only A one disables the corresponding interrupt status bit for the INT output. 3 Reserved Read Only Undefined. 4 GPI Input Read/Write A one disables the corresponding interrupt status bit for the INT output. 5 Ext. Temp1 Error Read/Write A one disables the corresponding interrupt status bit for the INT output. 6 THERM Input Read/Write A one disables the corresponding interrupt status bit for the INT output. 7 Diode 1 Fault Read/Write A one disables the corresponding interrupt status bit for the INT output. Table IX. Register 0x4C Interrupt Status Register Mirror. Power-On Default <7:0> = 00h Bit Name Read/Write Description 0 Int. Temp Error Read Only A one indicates that one of the internal temperature sensor limits has been exceeded. 1 Ext. Temp2 Error Read Only A one indicates that one of the limits for the second external temperature sensor has been exceeded. 2 Diode 2 Fault Read Only A one indicates either a short- or open-circuit fault on remote sensor diode 2.

3 Reserved Read Only Undefined

4 GPI Input Read Only A “1” indicates that the GPI pin is a sserted. The polarity of the GPI pin is determined by GPI Invert (Bit 6) in the Configuration Register. For example, if GPI Invert is cleared, this bit will be “1” when the GPI pin is high (“1”); this bit will be “0” when the GPI pin is low (“0.”) If GPI Invert is set, this bit will be “1” when the GPI pin is low (“0”); this bit will be “0” when the GPI pin is high (“1”). Note that the state of GPI is not latched; this bit simply reflects the state or inverted state of the GPI pin. Note: if this bit is “1” reading this register will NOT clear it to “0.” 5 Ext. Temp1 Error Read Only A one indicates that one of the limits for the first external temperature sensor has been exceeded.

6 THERM Input Read Only A one indicates that the thermal overload ( THERM) line has been asserted

externally. 7 Diode 1 Fault Read Only A one indicates either a short- or open-circuit fault on remote sensor diode 1.

REV. 0 ADM1022 –19– OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead QSOP (RQ-16) 16 9 0.197 (5.00) 0.189 (4.80) 0.244 (6.20) 0.228 (5.79) PIN 1 0.157 (3.99) 0.150 (3.81) SEATING PLANE 0.010 (0.25) 0.004 (0.10) 0.012 (0.30) 0.008 (0.20) 0.025 (0.64) BSC 0.059 (1.50) MAX 0.069 (1.75) 0.053 (1.35) 0.010 (0.20) 0.007 (0.18) 0.050 (1.27) 0.016 (0.41) 8/H11543 0/H11543 REF: JEDEC 0.150" SSOP – DRAWING NUMBER MO-137 C3617–2.5–4/00 (rev. 0) 00057 PRINTED IN U.S.A.